Hello, Teams
Based on TDA4VM SoC variant design,We have occured an image output problem from our current project, On our urrent design,The TDA4 processor receives the camera module MIPI data from the deserializer and send out the video image through PHY after figured out the camera datas, there are 5 out of 35pcs boards appears this kind of image output failure, We have debugged these failure boards and measurement the MIPI CLK signal (differental signal) when the TDA4 processor can not recognized and analytic the MIPI CLK Isignal as below:
Failure boards MIPI CLK signal:
The MIPI CLK signal seems abnormal as the amplitude of the CLK is up to +/-400mV even the CLK frequency is around 600MHZ which is OK ,
Also we have measured the MIPI CLK signal on a good sample that can output video image as below: the amplitude of the good MIPI CLK is just up to around +/- 200mV, While after we resodered a new TDA4 chip on the failure sample then the video image can figure out, So we are not sure why the MIPI CLK signal abnormal and is there any configuration to set or any kind of root cause can be advised from TI expert from Hardware or Software design?
Good smaples MIPI CLK signal:
THANKS and wait fot your reply!
, have chance not work ,
.