DRA821U: How to use the main domain SPI under mcusw

Cherry Zhou

Part Number: DRA821U
Other Parts Discussed in Thread: SYSCONFIG, DRA829, DRA821

Hi team,

Here's an issue from the customer may need your help:

Using ti-processor-SDK-RTOS-j7200-EVM-08_00_00_12/mcusw/mcal_drv/mcal/examples/SPI examples, the customer has built and generated j7200_evm/mcspi_app_mcu2_1_debug.appimage.

Then use the MulticoreImageGen tool to generate lateapp1, copy into SD card, and use the sbl boot method. After running, the program was found to be unable to enter the SPI interrupt and get stuck.

By checking the code, SPI_Pbcfg.c is configured with SPI_unit_MCU_MCSPI0 and McspiApp_Startup.c uses SPI_unit_MCSPI3. Then change SPI_Pbcfg.c to use SPI3.

After running, the program is stuck in the SPI_mcspiReset function of SPI_McSPI.C:

CSL_REG32_FINS(baseAddr + MCSPI_SYSCONFIG,MCSPI_SYSCONFIG_SOFTRESET,MCSPI_SYSCONFIG_SOFTRESET_on)

The customer would like to know how to control the main domain SPI on mcu2_1 and are there examples that run successfully can be provided?

Could you help check this case? Thanks.

Best Regards,

Cherry

over 3 years ago

0 Erick Narvaez over 3 years ago

TI__Mastermind 36307 points

Hi Cherry,

I looked at the example as you mentioned. Yes, the current configuration for mcu2_1 for the McSPI app seems to use the MCU_MCSPI0 in the Pbcfg.c, but the MCSPI3 in the Startup.c. I went ahead and tried the routine you mentioned is crashing:

CSL_REG32_FINS(baseAddr + MCSPI_SYSCONFIG,MCSPI_SYSCONFIG_SOFTRESET,MCSPI_SYSCONFIG_SOFTRESET_on)

But with the MCSPI3 instead, and it is working fine. While debugging, I even manually wrote the "1" into the SOFTRESET field of the SYSCONFIG register and that had no issues, the MCSPI_SYSSTATUS showed that the status was OK after the reset. Can you try toggling this value manually to see that it is not the problem?

Write a "1" to the SOFTRESET field of the MCSPI_SYSCONFIG register, then check the value of the MCSPI_SYSSTATUS and make sure it is a 1.

Regards,

Erick

0 Long Jiang over 3 years ago in reply to Erick Narvaez

Prodigy 140 points

Hi, Erick Narvaez:

I am the customer who ask this question.

do you use ds821 for this experimet?

When I use dra829, it is working fine, but when I use dra821, it gets stuck.

Regards,

jiang long

0 Cherry Zhou over 3 years ago in reply to Long Jiang

TI__Mastermind 22235 points

Hi Erick,

Thanks for your support and jiang long is the customer I mentioned, you could discuss on this issue together and if you need any other help please let me know.

Thanks and regards,

Cherry

0 Erick Narvaez over 3 years ago in reply to Cherry Zhou

TI__Mastermind 36307 points

Hello Jiang Long,

I did use DRA829, I have now tried with DRA821, and I see the issue you are facing. I believe the clocking is currently not enabled, let me see if I can give you a patch to enable this MCSPI3 in the main domain on DRA821.

Regards,

Erick

0 Erick Narvaez over 3 years ago in reply to Erick Narvaez

TI__Mastermind 36307 points

Hello Jiang Long,

I've located the source of the issue. The main domain MCSPI are enabled by default in J721E because they share a PSC with other peripherals that are enabled (usart, etc.)

You will need to add the MCSPI peripheral in the pdk/packages/ti/board/src/j7200_evm/board_clock.c:

Look for gBoardClkModuleMainIDGroup2[], you can add the TISCI_DEV_MCSPI3 (corresponds to 269 in j7200). This should enable the registers and you should be able to get past this issue.

Regards,

Erick

0 Erick Narvaez over 3 years ago in reply to Erick Narvaez

TI__Mastermind 36307 points

Also, if you wish to enable the MCSPI3 from the app itself, please take a look at this FAQ:https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1003426/faq-tda4vm-how-to-enable-power-for-a-module-can-adc-etc-from-remote-core-firmware

0 Long Jiang over 3 years ago in reply to Erick Narvaez

Prodigy 140 points

Hello Erick

I add TISCI_DEV_MCSPI3 in gBoardClkModuleMainIDGroup2[], but the proplem still exists.

SPI_FUNC_TEXT_SECTION static void Spi_mcspiReset(uint32 baseAddr)
{
    StatusType status;
    TickType startCount = 0U, tempCount, elaspsedCount = 0U;
    
    UART_printf("Spi_mcspiReset1 baseAddr = 0x%x\r\n", baseAddr);
    CSL_REG32_FINS(
        baseAddr + MCSPI_SYSCONFIG,
        MCSPI_SYSCONFIG_SOFTRESET,
        MCSPI_SYSCONFIG_SOFTRESET_ON);
    UART_printf("Spi_mcspiReset2\r\n");
    
    ...
}

I add printf here and log shows program get stuck at SOFTRESET.

SPI_APP: Variant - Post Build being used !!!
I am in Spi_Init
Spi_mcspiReset1 baseAddr = 0x2130000

J7200_evm version is PROC079E3D and PROC105E8(001)

Regards,

Jiang Long

0 Long Jiang over 3 years ago in reply to Erick Narvaez

Prodigy 140 points

HI, Erick

did you forget this question?

I still have the same problem after adding TISCI_DEV_MCSPI3 in gBoardClkModuleMainIDGroup2[]

I dont know what to do next

Regards,

jiang long

+1 Erick Narvaez over 3 years ago in reply to Long Jiang

TI__Mastermind 36307 points

Hello,

Did you apply the patch correctly? I was able to verify the fix on my side with the following steps:

1) Re-build the SBL Image, tiboot3.bin, in the PDK with the following command from ti-processor-sdk-rtos-j7200-evm-08_02_00_05/pdk_j7200_08_02_00_21/packages/ti/build:

make allclean

make pdk_libs

make sbl_mmcsd_img

2) Copy SBL Image onto SD Card (renames .tiimage to tiboot3.bin):

cp ti-processor-sdk-rtos-j7200-evm-08_02_00_05/pdk_j7200_08_02_00_21/packages/ti/boot/sbl/binary/j7200_evm/mmcsd/bin/sbl_mmcsd_img_mcu1_0_release.tiimage /media/boot/tiboot3.bin

3) Boot the board, now SBL will correctly initialize the clocks with patch in place

Please let me know if this resolves your issue.

Regards,

Erick

0 Long Jiang over 3 years ago in reply to Erick Narvaez

Prodigy 140 points

Hi, Erick

After I update the sbl it works!

I used to think that just by changing the app, the clock can be enabled, because the app run AppUtils_Init(), but I didn't expect it to be initialized in sbl.

This resolves my issue. Thanks.

Regards,

jiang long

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DRA821U: How to use the main domain SPI under mcusw