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AM5728: Use Blackhawk USB560v2 Emulator to Perform System Trace

Part Number: AM5728


We are using Blackhawk USB560v2 to perform system trace. The example code that Blackhawk provided contains the following definitions. My question is what corresponding values for the AM5728 processor are. Note that we want to do the trace for the DSP core. 

/*******************************************************************************
* C6678 Base Address Definitions
******************************************************************************/

#define STM_XPORT_BASE_ADDR       0x20000000
#define STM_CHAN_RESOLUTION       0x1000
#define STM_CONFIG_BASE_ADDR      0x02421000

Thank you for the support!

  • Joe,

    My apologies for the slow reply.  Are you attempting to configure STM from your application?  Alternatively, it should be possible to configure it from the debugger.  

    Regards,

    John

  • Yes, I am. Could you help me to get these three values for AM5728 processor? I am new to this debugger, if you could also let me know how to configure it from the debugger, that would be great. Thank you! 

  • Hi Joe,

    Please refer the the System Trace User's Guide. It covers both Processor (PC) Trace and System (STM) Trace:

    https://www.ti.com/lit/ug/spruhm7b/spruhm7b.pdf

    Thanks

    ki

  • Hi Ki/JohnS,

    Thank for sending me the Trace Analyzer manual. According to Blackhawk's white paper, however, I will have to make our code changes first in order to use the Trace Analyzer.  And to make the code changes, I have got stuck on getting three values specific to TI AM5728 processor (see my original post). So far I have not got any answers specific to my question. Any help is appreciated!

  • Hello Joe,
    John asked if I could provide inputs from the device side. I have used processor trace and system trace on this device in the past with TI-CCS-XDS and Lauterbach-TRACE32. I have not used it with the Blackhawk but it should work in a similar manner to the XDS. The AM5728 offers several types of trace sources (processor-arm, processor-dsp, stm, interconnect-probes).  Tools can program on each of these sources to emit traffic into the SOCs trace network.  That trace network flows into an onchip memory (TBR) or to an external interface (TPIU).  The base debug hardware should be able to read from and display trace from the "small~32K" onchip memory.  Special hardware is needed to use the "large~1-8GB" external interface receivers.
    For XDS boxes you will need to run a gel on the target which configures the path from the CPU to the onchip memory or from the CPU to the external pins.  The relevant GELs are these:
       C:\ti\ccs1120\ccs\ccs_base\emulation\boards\am574x\gel\AM574x_stm.gel
       C:\ti\ccs1120\ccs\ccs_base\emulation\boards\am574x\gel\AM574x_tpiu.gel
    The gels at C:\ti\ccs1120\ccs\ccs_base\emulation\boards\am574x\gel\ are designed to run with bare metal systems and are useful for initial board checkout.  They can initialize all the clocks and power, then help load test code into one of the cores. If you have code which already sets up all the clocks then you should not run all the gels at this level but only ones which can help spot debug what you care about.  Running all the gels will conflict and crash your target and the application. For the debug trace to work the system clocks need to be setup so it needs to be in gel or in your own code.  If you are new to the tools and advanced trace starting at bare metal (like a bootloader) is probably the best way to learn.  Trying to use them against a large and custom complex application is hard without a foundation.
    Regards,
    Richard W.