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TDA4VM: To Support USB super speed on J721S2

Part Number: TDA4VM

Hi,

We would like to use the USB 3.0 TYPE A (host, super speed). As we know that the SDK(8.0.4) configures the SERDES to support EDP + PCIe.

Could you provide a sample Linux device tree configure to support USB + EDP?

USB -> LANE1

EDP->LANE 2 and LANE3

Thanks,

Ethan

  • Ethan,

    We will review this request on the latest upcoming SDK (SDK 8.4) to be made available publicly on 30-Aug-2022 and then share an update with you.

    Please wait for a few weeks to allow us to feedback on this topic, we will try to expedite as much as possible.

    Regards
    Karthik

  • Hi Karthik,

    Thanks a lot. I got it.

    Ethan

  • Customer has moved to the SDK 8.4 and the USB cannot work on the J721S2 platform.

    Default setting in the SDK needs some changes, TI to provide guidance.

  • Hi Ethan,

    Are you enabling this at U-Boot level or kernel level? Could you please elaborate the requirement?

    - Keerthy

  • Hi Keerthy,

    We would like to enable it at the kernel level.

    Thanks,

    Ethan

  • Keerthy,

    We have tested it. It cannot work.

    Ethan

  • Ethan,

    Just double checking did you make sure that the overlay was applied correctly & still you observed the failure?

    For the J721s2  EVM, the SERDES is shared between display port and PCIe as default (Note SERDES can support only two protocols at the same time).
    For the non-default EVM configurations, the USB3 patch is pushed to: .git.ti.com/.../k3-j721s2-usb3.dtso

    Hence this is untested on our EVM.

    - Keerthy

  • Keerthy,

    Yes, we still can observe this failure.

    -Ethan

  • My colleague will respond on this thread today.

  • Hi Ethan ,

    We have checked with the patch at our end and it works fine .

    Can you check the DP switch settings and make sure that it follow below configuration. 

    MCU3 = 0 MCU4 = 1 

    Thanks 

    Diwakar 

  • Hi Diwakar,

    What is DP switch? Can you give me a more specific description?

    Thanks,

    Ethan

  • Hi Diwakar,

    If you mean that to set the USB host mode or device mode. We have set the USB to host mode on our design.

    USB3.pdf

    Thanks,

    Ethan

  • Hi Ethan

    Did this you tested on a EVM or on a custom board ?

    Regards 

    Diwakar 

  • Hi Diwakar,

    It's on a custom board.

    Thanks,

    Ethan 

  • Hi Ethan 

    The patch shared above was for a EVM .

    Can you share the dtsi changes which you made for custom board and dmesg log on your custom board  .

    Regards

    Diwakar 

  • Hi Diwakar,

    Here is the dtsi file.

    k3-j721s2-main.txt
    // SPDX-License-Identifier: GPL-2.0
    /*
     * Device Tree Source for J721S2 SoC Family Main Domain peripherals
     *
     * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
     */
    #include <dt-bindings/phy/phy.h>
    
    / {
    	serdes_refclk: serdes-refclk {
    		#clock-cells = <0>;
    		compatible = "fixed-clock";
    	};
    };
    
    &cbass_main {
    	msmc_ram: sram@70000000 {
    		compatible = "mmio-sram";
    		reg = <0x0 0x70000000 0x0 0x400000>;
    		#address-cells = <1>;
    		#size-cells = <1>;
    		ranges = <0x0 0x0 0x70000000 0x400000>;
    
    		atf-sram@0 {
    			reg = <0x0 0x20000>;
    		};
    
    		vpu_sram: vpu-sram@20000 {
    			reg = <0x20000 0x1f800>;
    		};
    
    		tifs-sram@1f0000 {
    			reg = <0x1f0000 0x10000>;
    		};
    
    		l3cache-sram@200000 {
    			reg = <0x200000 0x200000>;
    		};
    	};
    
    	scm_conf: scm-conf@104000 {
    		compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
    		reg = <0x00 0x00104000 0x00 0x18000>;
    		#address-cells = <1>;
    		#size-cells = <1>;
    		ranges = <0x00 0x00 0x00104000 0x18000>;
    
    		serdes_ln_ctrl: mux-controller0 {
    			compatible = "mmio-mux";
    			#mux-control-cells = <1>;
    			mux-reg-masks = <0x80 0x3>, <0x84 0x3>, /* SERDES0 lane0/1 select */
    					<0x88 0x3>, <0x8c 0x3>; /* SERDES0 lane2/3 select */
    		};
    
    		usb_serdes_mux: mux-controller1 {
    			compatible = "mmio-mux";
    			#mux-control-cells = <1>;
    			mux-reg-masks = <0x0 0x8000000>; /* USB0 to SERDES0 lane 1/3 mux */
    		};
    
    		edp_serdes_mux: mux-controller2 {
    			compatible = "mmio-mux";
    			#mux-control-cells = <1>;
    			/* EDP0 to SERDES0 lane 0/1 or 2/3 mux */
    			mux-reg-masks = <0x310 0x10000000>;
    		};
    
    		phy_gmii_sel_cpsw: phy@34 {
    			compatible = "ti,am654-phy-gmii-sel";
    			reg = <0x34 0x4>;
    			#phy-cells = <1>;
    		};
    	};
    
    	gic500: interrupt-controller@1800000 {
    		compatible = "arm,gic-v3";
    		#address-cells = <2>;
    		#size-cells = <2>;
    		ranges;
    		#interrupt-cells = <3>;
    		interrupt-controller;
    		reg = <0x00 0x01800000 0x00 0x200000>, /* GICD */
    		      <0x00 0x01900000 0x00 0x100000>; /* GICR */
    
    		/* vcpumntirq: virtual CPU interface maintenance interrupt */
    		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
    
    		gic_its: msi-controller@1820000 {
    			compatible = "arm,gic-v3-its";
    			reg = <0x00 0x01820000 0x00 0x10000>;
    			socionext,synquacer-pre-its = <0x1000000 0x400000>;
    			msi-controller;
    			#msi-cells = <1>;
    		};
    	};
    
    	main_gpio_intr: interrupt-controller@a00000 {
    		compatible = "ti,sci-intr";
    		reg = <0x00 0x00a00000 0x00 0x800>;
    		ti,intr-trigger-type = <1>;
    		interrupt-controller;
    		interrupt-parent = <&gic500>;
    		#interrupt-cells = <1>;
    		ti,sci = <&sms>;
    		ti,sci-dev-id = <148>;
    		ti,interrupt-ranges = <8 360 56>;
    	};
    
    	main_pmx0: pinctrl@11c000 {
    		compatible = "pinctrl-single";
    		/* Proxy 0 addressing */
    		reg = <0x0 0x11c000 0x0 0x120>;
    		#pinctrl-cells = <1>;
    		pinctrl-single,register-width = <32>;
    		pinctrl-single,function-mask = <0xffffffff>;
    	};
    
    	main_crypto: crypto@4e00000 {
    		compatible = "ti,j721e-sa2ul";
    		reg = <0x00 0x4e00000 0x00 0x1200>;
    		power-domains = <&k3_pds 297 TI_SCI_PD_SHARED>;
    		#address-cells = <2>;
    		#size-cells = <2>;
    		ranges = <0x00 0x04e00000 0x00 0x04e00000 0x00 0x30000>;
    
    		dmas = <&main_udmap 0xca40>, <&main_udmap 0x4a40>,
    				<&main_udmap 0x4a41>;
    		dma-names = "tx", "rx1", "rx2";
    		dma-coherent;
    	};
    
    	main_uart0: serial@2800000 {
    		compatible = "ti,j721e-uart", "ti,am654-uart";
    		reg = <0x00 0x02800000 0x00 0x200>;
    		interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
    		current-speed = <115200>;
    		clocks = <&k3_clks 146 3>;
    		clock-names = "fclk";
    		power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
    	};
    
    	main_uart1: serial@2810000 {
    		compatible = "ti,j721e-uart", "ti,am654-uart";
    		reg = <0x00 0x02810000 0x00 0x200>;
    		interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
    		current-speed = <115200>;
    		clocks = <&k3_clks 350 3>;
    		clock-names = "fclk";
    		power-domains = <&k3_pds 350 TI_SCI_PD_EXCLUSIVE>;
    	};
    
    	main_uart2: serial@2820000 {
    		compatible = "ti,j721e-uart", "ti,am654-uart";
    		reg = <0x00 0x02820000 0x00 0x200>;
    		interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
    		current-speed = <115200>;
    		clocks = <&k3_clks 351 3>;
    		clock-names = "fclk";
    		power-domains = <&k3_pds 351 TI_SCI_PD_EXCLUSIVE>;
    	};
    
    	main_uart3: serial@2830000 {
    		compatible = "ti,j721e-uart", "ti,am654-uart";
    		reg = <0x00 0x02830000 0x00 0x200>;
    		interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
    		current-speed = <115200>;
    		clocks = <&k3_clks 352 3>;
    		clock-names = "fclk";
    		power-domains = <&k3_pds 352 TI_SCI_PD_EXCLUSIVE>;
    	};
    
    	main_uart4: serial@2840000 {
    		compatible = "ti,j721e-uart", "ti,am654-uart";
    		reg = <0x00 0x02840000 0x00 0x200>;
    		interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
    		current-speed = <115200>;
    		clocks = <&k3_clks 353 3>;
    		clock-names = "fclk";
    		power-domains = <&k3_pds 353 TI_SCI_PD_EXCLUSIVE>;
    	};
    
    	main_uart5: serial@2850000 {
    		compatible = "ti,j721e-uart", "ti,am654-uart";
    		reg = <0x00 0x02850000 0x00 0x200>;
    		interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
    		current-speed = <115200>;
    		clocks = <&k3_clks 354 3>;
    		clock-names = "fclk";
    		power-domains = <&k3_pds 354 TI_SCI_PD_EXCLUSIVE>;
    	};
    
    	main_uart6: serial@2860000 {
    		compatible = "ti,j721e-uart", "ti,am654-uart";
    		reg = <0x00 0x02860000 0x00 0x200>;
    		interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>;
    		current-speed = <115200>;
    		clocks = <&k3_clks 355 3>;
    		clock-names = "fclk";
    		power-domains = <&k3_pds 355 TI_SCI_PD_EXCLUSIVE>;
    	};
    
    	main_uart7: serial@2870000 {
    		compatible = "ti,j721e-uart", "ti,am654-uart";
    		reg = <0x00 0x02870000 0x00 0x200>;
    		interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
    		current-speed = <115200>;
    		clocks = <&k3_clks 356 3>;
    		clock-names = "fclk";
    		power-domains = <&k3_pds 356 TI_SCI_PD_EXCLUSIVE>;
    	};
    
    	main_uart8: serial@2880000 {
    		compatible = "ti,j721e-uart", "ti,am654-uart";
    		reg = <0x00 0x02880000 0x00 0x200>;
    		interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>;
    		current-speed = <115200>;
    		clocks = <&k3_clks 357 3>;
    		clock-names = "fclk";
    		power-domains = <&k3_pds 357 TI_SCI_PD_EXCLUSIVE>;
    	};
    
    	main_uart9: serial@2890000 {
    		compatible = "ti,j721e-uart", "ti,am654-uart";
    		reg = <0x00 0x02890000 0x00 0x200>;
    		interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
    		current-speed = <115200>;
    		clocks = <&k3_clks 358 3>;
    		clock-names = "fclk";
    		power-domains = <&k3_pds 358 TI_SCI_PD_EXCLUSIVE>;
    	};
    
    	gpu: gpu@4e20000000 {
    		compatible = "ti,j721s2-pvr", "img,pvr-bxs64";
    		reg = <0x4e 0x20000000 0x00 0x80000>;
    		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
    		power-domains = <&k3_pds 130 TI_SCI_PD_EXCLUSIVE>,
    						<&k3_pds 373 TI_SCI_PD_EXCLUSIVE>;
    		power-domain-names = "gpu_0", "gpucore_0";
    		clocks = <&k3_clks 130 1>;
    	};
    
    	main_gpio0: gpio@600000 {
    		compatible = "ti,j721e-gpio", "ti,keystone-gpio";
    		reg = <0x00 0x00600000 0x00 0x100>;
    		gpio-controller;
    		#gpio-cells = <2>;
    		interrupt-parent = <&main_gpio_intr>;
    		interrupts = <145>, <146>, <147>, <148>, <149>;
    		interrupt-controller;
    		#interrupt-cells = <2>;
    		ti,ngpio = <66>;
    		ti,davinci-gpio-unbanked = <0>;
    		power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
    		clocks = <&k3_clks 111 0>;
    		clock-names = "gpio";
    	};
    
    	main_gpio2: gpio@610000 {
    		compatible = "ti,j721e-gpio", "ti,keystone-gpio";
    		reg = <0x00 0x00610000 0x00 0x100>;
    		gpio-controller;
    		#gpio-cells = <2>;
    		interrupt-parent = <&main_gpio_intr>;
    		interrupts = <154>, <155>, <156>, <157>, <158>;
    		interrupt-controller;
    		#interrupt-cells = <2>;
    		ti,ngpio = <66>;
    		ti,davinci-gpio-unbanked = <0>;
    		power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>;
    		clocks = <&k3_clks 112 0>;
    		clock-names = "gpio";
    	};
    
    	main_gpio4: gpio@620000 {
    		compatible = "ti,j721e-gpio", "ti,keystone-gpio";
    		reg = <0x00 0x00620000 0x00 0x100>;
    		gpio-controller;
    		#gpio-cells = <2>;
    		interrupt-parent = <&main_gpio_intr>;
    		interrupts = <163>, <164>, <165>, <166>, <167>;
    		interrupt-controller;
    		#interrupt-cells = <2>;
    		ti,ngpio = <66>;
    		ti,davinci-gpio-unbanked = <0>;
    		power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
    		clocks = <&k3_clks 113 0>;
    		clock-names = "gpio";
    	};
    
    	main_gpio6: gpio@630000 {
    		compatible = "ti,j721e-gpio", "ti,keystone-gpio";
    		reg = <0x00 0x00630000 0x00 0x100>;
    		gpio-controller;
    		#gpio-cells = <2>;
    		interrupt-parent = <&main_gpio_intr>;
    		interrupts = <172>, <173>, <174>, <175>, <176>;
    		interrupt-controller;
    		#interrupt-cells = <2>;
    		ti,ngpio = <66>;
    		ti,davinci-gpio-unbanked = <0>;
    		power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
    		clocks = <&k3_clks 114 0>;
    		clock-names = "gpio";
    	};
    //Ming++ for spi 0 device 202200822 >> 	
    	main_spi0: spi@2100000 {
    		compatible = "ti,am654-mcspi","ti,omap4-mcspi";
    		reg = <0x0 0x2100000 0x0 0x400>;
    		interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
    		clocks = <&k3_clks 339 1>;
    		power-domains = <&k3_pds 339 TI_SCI_PD_EXCLUSIVE>;
    		#address-cells = <1>;
    		#size-cells = <0>;
    	};
    //Ming++ for pwm 1 device 202200822 >>
    //	main_ehrpwm1: pwm@3010000 {
    //		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
    //		#pwm-cells = <1>;
    //		reg = <0x0 0x3010000 0x0 0x100>;
    //		power-domains = <&k3_pds 161 TI_SCI_PD_EXCLUSIVE>;
    //		clocks = <&ehrpwm_tbclk 1>, <&k3_clks 161 0>;
    //		clock-names = "tbclk", "fck";
    //	};	
    //Ming++ for gpu device 202200822 >>
    //    gpu: gpu@4e20000000 {
    //        compatible = "ti,j721e-pvr", "img,pvr-ge8430";
    //        reg = <0x4e 0x20000000 0x00 0x80000>;
    //        reg-names = "gpu_regs";
    //        interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
    //        power-domains = <&k3_pds 130 TI_SCI_PD_EXCLUSIVE>;
    //        power-domain-names = "gpu_0";
    //        clocks = <&k3_clks 130 0>;
    //        clock-names = "ctrl";
    //    };
    //Ming++<<	
    	main_i2c0: i2c@2000000 {
    		compatible = "ti,j721e-i2c", "ti,omap4-i2c";
    		reg = <0x00 0x02000000 0x00 0x100>;
    		interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
    		#address-cells = <1>;
    		#size-cells = <0>;
    		clocks = <&k3_clks 214 1>;
    		clock-names = "fck";
    		power-domains = <&k3_pds 214 TI_SCI_PD_EXCLUSIVE>;
    	};
    
    	main_i2c1: i2c@2010000 {
    		compatible = "ti,j721e-i2c", "ti,omap4-i2c";
    		reg = <0x00 0x02010000 0x00 0x100>;
    		interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
    		#address-cells = <1>;
    		#size-cells = <0>;
    		clocks = <&k3_clks 215 1>;
    		clock-names = "fck";
    		power-domains = <&k3_pds 215 TI_SCI_PD_EXCLUSIVE>;
    	};
    
    	main_i2c2: i2c@2020000 {
    		compatible = "ti,j721e-i2c", "ti,omap4-i2c";
    		reg = <0x00 0x02020000 0x00 0x100>;
    		interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>;
    		#address-cells = <1>;
    		#size-cells = <0>;
    		clocks = <&k3_clks 216 1>;
    		clock-names = "fck";
    		power-domains = <&k3_pds 216 TI_SCI_PD_EXCLUSIVE>;
    	};
    
    	main_i2c3: i2c@2030000 {
    		compatible = "ti,j721e-i2c", "ti,omap4-i2c";
    		reg = <0x00 0x02030000 0x00 0x100>;
    		interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>;
    		#address-cells = <1>;
    		#size-cells = <0>;
    		clocks = <&k3_clks 217 1>;
    		clock-names = "fck";
    		power-domains = <&k3_pds 217 TI_SCI_PD_EXCLUSIVE>;
    	};
    
    	main_i2c4: i2c@2040000 {
    		compatible = "ti,j721e-i2c", "ti,omap4-i2c";
    		reg = <0x00 0x02040000 0x00 0x100>;
    		interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>;
    		#address-cells = <1>;
    		#size-cells = <0>;
    		clocks = <&k3_clks 218 1>;
    		clock-names = "fck";
    		power-domains = <&k3_pds 218 TI_SCI_PD_EXCLUSIVE>;
    	};
    
    	main_i2c5: i2c@2050000 {
    		compatible = "ti,j721e-i2c", "ti,omap4-i2c";
    		reg = <0x00 0x02050000 0x00 0x100>;
    		interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
    		#address-cells = <1>;
    		#size-cells = <0>;
    		clocks = <&k3_clks 219 1>;
    		clock-names = "fck";
    		power-domains = <&k3_pds 219 TI_SCI_PD_EXCLUSIVE>;
    	};
    
    	main_i2c6: i2c@2060000 {
    		compatible = "ti,j721e-i2c", "ti,omap4-i2c";
    		reg = <0x00 0x02060000 0x00 0x100>;
    		interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
    		#address-cells = <1>;
    		#size-cells = <0>;
    		clocks = <&k3_clks 220 1>;
    		clock-names = "fck";
    		power-domains = <&k3_pds 220 TI_SCI_PD_EXCLUSIVE>;
    	};
    
    	vpu: video-codec@4210000 {
    		compatible = "cnm,cm521c-vpu";
    		reg = <0x00 0x4210000 0x00 0x10000>;
    		interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
    		clocks = <&k3_clks 179 2>;
    		clock-names = "vcodec";
    		power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
    		sram = <&vpu_sram>;
    	};
    
    	main_sdhci0: mmc@4f80000 {
    		compatible = "ti,j721e-sdhci-8bit";
    		reg = <0x00 0x04f80000 0x00 0x1000>,
    		      <0x00 0x04f88000 0x00 0x400>;
    		interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
    		power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
    		clocks = <&k3_clks 98 7>, <&k3_clks 98 1>;
    		clock-names =  "clk_ahb", "clk_xin";
    		assigned-clocks = <&k3_clks 98 1>;
    		assigned-clock-parents = <&k3_clks 98 2>;
    		bus-width = <8>;
    		ti,otap-del-sel-legacy = <0x0>;
    		ti,otap-del-sel-mmc-hs = <0x0>;
    		ti,otap-del-sel-ddr52 = <0x6>;
    		ti,otap-del-sel-hs200 = <0x8>;
    		ti,itap-del-sel-legacy = <0x10>;
    		ti,itap-del-sel-mmc-hs = <0xa>;
    		ti,strobe-sel = <0x77>;
    		ti,clkbuf-sel = <0x7>;
    		ti,trm-icp = <0x8>;
    		mmc-ddr-1_8v;
    		mmc-hs200-1_8v;
    		dma-coherent;
    	};
    
    	main_sdhci1: mmc@4fb0000 {
    		compatible = "ti,j721e-sdhci-4bit";
    		reg = <0x00 0x04fb0000 0x00 0x1000>,
    		      <0x00 0x04fb8000 0x00 0x400>;
    		interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
    		power-domains = <&k3_pds 99 TI_SCI_PD_EXCLUSIVE>;
    		clocks = <&k3_clks 99 8>, <&k3_clks 99 1>;
    		clock-names =  "clk_ahb", "clk_xin";
    		assigned-clocks = <&k3_clks 99 1>;
    		assigned-clock-parents = <&k3_clks 99 2>;
    		bus-width = <4>;
    		ti,otap-del-sel-legacy = <0x0>;
    		ti,otap-del-sel-sd-hs = <0x0>;
    		ti,otap-del-sel-sdr12 = <0xf>;
    		ti,otap-del-sel-sdr25 = <0xf>;
    		ti,otap-del-sel-sdr50 = <0xc>;
    		ti,otap-del-sel-sdr104 = <0x5>;
    		ti,otap-del-sel-ddr50 = <0xc>;
    		ti,itap-del-sel-legacy = <0x0>;
    		ti,itap-del-sel-sd-hs = <0x0>;
    		ti,itap-del-sel-sdr12 = <0x0>;
    		ti,itap-del-sel-sdr25 = <0x0>;
    		ti,clkbuf-sel = <0x7>;
    		ti,trm-icp = <0x8>;
    		dma-coherent;
    		/* Masking support for SDR104 capability */
    		sdhci-caps-mask = <0x00000003 0x00000000>;
    	};
    
    	main_navss: bus@30000000 {
    		compatible = "simple-mfd";
    		#address-cells = <2>;
    		#size-cells = <2>;
    		ranges = <0x00 0x30000000 0x00 0x30000000 0x00 0x0c400000>;
    		ti,sci-dev-id = <224>;
    		dma-coherent;
    		dma-ranges;
    
    		main_navss_intr: interrupt-controller@310e0000 {
    			compatible = "ti,sci-intr";
    			reg = <0x00 0x310e0000 0x00 0x4000>;
    			ti,intr-trigger-type = <4>;
    			interrupt-controller;
    			interrupt-parent = <&gic500>;
    			#interrupt-cells = <1>;
    			ti,sci = <&sms>;
    			ti,sci-dev-id = <227>;
    			ti,interrupt-ranges = <0 64 64>,
    					      <64 448 64>,
    					      <128 672 64>;
    		};
    
    		main_udmass_inta: msi-controller@33d00000 {
    			compatible = "ti,sci-inta";
    			reg = <0x00 0x33d00000 0x00 0x100000>;
    			interrupt-controller;
    			#interrupt-cells = <0>;
    			interrupt-parent = <&main_navss_intr>;
    			msi-controller;
    			ti,sci = <&sms>;
    			ti,sci-dev-id = <265>;
    			ti,interrupt-ranges = <0 0 256>;
    		};
    
    		secure_proxy_main: mailbox@32c00000 {
    			compatible = "ti,am654-secure-proxy";
    			#mbox-cells = <1>;
    			reg-names = "target_data", "rt", "scfg";
    			reg = <0x00 0x32c00000 0x00 0x100000>,
    			      <0x00 0x32400000 0x00 0x100000>,
    			      <0x00 0x32800000 0x00 0x100000>;
    			interrupt-names = "rx_011";
    			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
    		};
    
    		hwspinlock: spinlock@30e00000 {
    			compatible = "ti,am654-hwspinlock";
    			reg = <0x00 0x30e00000 0x00 0x1000>;
    			#hwlock-cells = <1>;
    		};
    
    		mailbox0_cluster0: mailbox@31f80000 {
    			compatible = "ti,am654-mailbox";
    			reg = <0x00 0x31f80000 0x00 0x200>;
    			#mbox-cells = <1>;
    			ti,mbox-num-users = <4>;
    			ti,mbox-num-fifos = <16>;
    			interrupt-parent = <&main_navss_intr>;
    		};
    
    		mailbox0_cluster1: mailbox@31f81000 {
    			compatible = "ti,am654-mailbox";
    			reg = <0x00 0x31f81000 0x00 0x200>;
    			#mbox-cells = <1>;
    			ti,mbox-num-users = <4>;
    			ti,mbox-num-fifos = <16>;
    			interrupt-parent = <&main_navss_intr>;
    		};
    
    		mailbox0_cluster2: mailbox@31f82000 {
    			compatible = "ti,am654-mailbox";
    			reg = <0x00 0x31f82000 0x00 0x200>;
    			#mbox-cells = <1>;
    			ti,mbox-num-users = <4>;
    			ti,mbox-num-fifos = <16>;
    			interrupt-parent = <&main_navss_intr>;
    		};
    
    		mailbox0_cluster3: mailbox@31f83000 {
    			compatible = "ti,am654-mailbox";
    			reg = <0x00 0x31f83000 0x00 0x200>;
    			#mbox-cells = <1>;
    			ti,mbox-num-users = <4>;
    			ti,mbox-num-fifos = <16>;
    			interrupt-parent = <&main_navss_intr>;
    		};
    
    		mailbox0_cluster4: mailbox@31f84000 {
    			compatible = "ti,am654-mailbox";
    			reg = <0x00 0x31f84000 0x00 0x200>;
    			#mbox-cells = <1>;
    			ti,mbox-num-users = <4>;
    			ti,mbox-num-fifos = <16>;
    			interrupt-parent = <&main_navss_intr>;
    		};
    
    		mailbox0_cluster5: mailbox@31f85000 {
    			compatible = "ti,am654-mailbox";
    			reg = <0x00 0x31f85000 0x00 0x200>;
    			#mbox-cells = <1>;
    			ti,mbox-num-users = <4>;
    			ti,mbox-num-fifos = <16>;
    			interrupt-parent = <&main_navss_intr>;
    		};
    
    		mailbox0_cluster6: mailbox@31f86000 {
    			compatible = "ti,am654-mailbox";
    			reg = <0x00 0x31f86000 0x00 0x200>;
    			#mbox-cells = <1>;
    			ti,mbox-num-users = <4>;
    			ti,mbox-num-fifos = <16>;
    			interrupt-parent = <&main_navss_intr>;
    		};
    
    		mailbox0_cluster7: mailbox@31f87000 {
    			compatible = "ti,am654-mailbox";
    			reg = <0x00 0x31f87000 0x00 0x200>;
    			#mbox-cells = <1>;
    			ti,mbox-num-users = <4>;
    			ti,mbox-num-fifos = <16>;
    			interrupt-parent = <&main_navss_intr>;
    		};
    
    		mailbox0_cluster8: mailbox@31f88000 {
    			compatible = "ti,am654-mailbox";
    			reg = <0x00 0x31f88000 0x00 0x200>;
    			#mbox-cells = <1>;
    			ti,mbox-num-users = <4>;
    			ti,mbox-num-fifos = <16>;
    			interrupt-parent = <&main_navss_intr>;
    		};
    
    		mailbox0_cluster9: mailbox@31f89000 {
    			compatible = "ti,am654-mailbox";
    			reg = <0x00 0x31f89000 0x00 0x200>;
    			#mbox-cells = <1>;
    			ti,mbox-num-users = <4>;
    			ti,mbox-num-fifos = <16>;
    			interrupt-parent = <&main_navss_intr>;
    		};
    
    		mailbox0_cluster10: mailbox@31f8a000 {
    			compatible = "ti,am654-mailbox";
    			reg = <0x00 0x31f8a000 0x00 0x200>;
    			#mbox-cells = <1>;
    			ti,mbox-num-users = <4>;
    			ti,mbox-num-fifos = <16>;
    			interrupt-parent = <&main_navss_intr>;
    		};
    
    		mailbox0_cluster11: mailbox@31f8b000 {
    			compatible = "ti,am654-mailbox";
    			reg = <0x00 0x31f8b000 0x00 0x200>;
    			#mbox-cells = <1>;
    			ti,mbox-num-users = <4>;
    			ti,mbox-num-fifos = <16>;
    			interrupt-parent = <&main_navss_intr>;
    		};
    
    		mailbox1_cluster0: mailbox@31f90000 {
    			compatible = "ti,am654-mailbox";
    			reg = <0x00 0x31f90000 0x00 0x200>;
    			#mbox-cells = <1>;
    			ti,mbox-num-users = <4>;
    			ti,mbox-num-fifos = <16>;
    			interrupt-parent = <&main_navss_intr>;
    		};
    
    		mailbox1_cluster1: mailbox@31f91000 {
    			compatible = "ti,am654-mailbox";
    			reg = <0x00 0x31f91000 0x00 0x200>;
    			#mbox-cells = <1>;
    			ti,mbox-num-users = <4>;
    			ti,mbox-num-fifos = <16>;
    			interrupt-parent = <&main_navss_intr>;
    		};
    
    		mailbox1_cluster2: mailbox@31f92000 {
    			compatible = "ti,am654-mailbox";
    			reg = <0x00 0x31f92000 0x00 0x200>;
    			#mbox-cells = <1>;
    			ti,mbox-num-users = <4>;
    			ti,mbox-num-fifos = <16>;
    			interrupt-parent = <&main_navss_intr>;
    		};
    
    		mailbox1_cluster3: mailbox@31f93000 {
    			compatible = "ti,am654-mailbox";
    			reg = <0x00 0x31f93000 0x00 0x200>;
    			#mbox-cells = <1>;
    			ti,mbox-num-users = <4>;
    			ti,mbox-num-fifos = <16>;
    			interrupt-parent = <&main_navss_intr>;
    		};
    
    		mailbox1_cluster4: mailbox@31f94000 {
    			compatible = "ti,am654-mailbox";
    			reg = <0x00 0x31f94000 0x00 0x200>;
    			#mbox-cells = <1>;
    			ti,mbox-num-users = <4>;
    			ti,mbox-num-fifos = <16>;
    			interrupt-parent = <&main_navss_intr>;
    		};
    
    		mailbox1_cluster5: mailbox@31f95000 {
    			compatible = "ti,am654-mailbox";
    			reg = <0x00 0x31f95000 0x00 0x200>;
    			#mbox-cells = <1>;
    			ti,mbox-num-users = <4>;
    			ti,mbox-num-fifos = <16>;
    			interrupt-parent = <&main_navss_intr>;
    		};
    
    		mailbox1_cluster6: mailbox@31f96000 {
    			compatible = "ti,am654-mailbox";
    			reg = <0x00 0x31f96000 0x00 0x200>;
    			#mbox-cells = <1>;
    			ti,mbox-num-users = <4>;
    			ti,mbox-num-fifos = <16>;
    			interrupt-parent = <&main_navss_intr>;
    		};
    
    		mailbox1_cluster7: mailbox@31f97000 {
    			compatible = "ti,am654-mailbox";
    			reg = <0x00 0x31f97000 0x00 0x200>;
    			#mbox-cells = <1>;
    			ti,mbox-num-users = <4>;
    			ti,mbox-num-fifos = <16>;
    			interrupt-parent = <&main_navss_intr>;
    		};
    
    		mailbox1_cluster8: mailbox@31f98000 {
    			compatible = "ti,am654-mailbox";
    			reg = <0x00 0x31f98000 0x00 0x200>;
    			#mbox-cells = <1>;
    			ti,mbox-num-users = <4>;
    			ti,mbox-num-fifos = <16>;
    			interrupt-parent = <&main_navss_intr>;
    		};
    
    		mailbox1_cluster9: mailbox@31f99000 {
    			compatible = "ti,am654-mailbox";
    			reg = <0x00 0x31f99000 0x00 0x200>;
    			#mbox-cells = <1>;
    			ti,mbox-num-users = <4>;
    			ti,mbox-num-fifos = <16>;
    			interrupt-parent = <&main_navss_intr>;
    		};
    
    		mailbox1_cluster10: mailbox@31f9a000 {
    			compatible = "ti,am654-mailbox";
    			reg = <0x00 0x31f9a000 0x00 0x200>;
    			#mbox-cells = <1>;
    			ti,mbox-num-users = <4>;
    			ti,mbox-num-fifos = <16>;
    			interrupt-parent = <&main_navss_intr>;
    		};
    
    		mailbox1_cluster11: mailbox@31f9b000 {
    			compatible = "ti,am654-mailbox";
    			reg = <0x00 0x31f9b000 0x00 0x200>;
    			#mbox-cells = <1>;
    			ti,mbox-num-users = <4>;
    			ti,mbox-num-fifos = <16>;
    			interrupt-parent = <&main_navss_intr>;
    		};
    
    		main_ringacc: ringacc@3c000000 {
    			compatible = "ti,am654-navss-ringacc";
    			reg = <0x0 0x3c000000 0x0 0x400000>,
    			      <0x0 0x38000000 0x0 0x400000>,
    			      <0x0 0x31120000 0x0 0x100>,
    			      <0x0 0x33000000 0x0 0x40000>;
    			reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
    			ti,num-rings = <1024>;
    			ti,sci-rm-range-gp-rings = <0x1>;
    			ti,sci = <&sms>;
    			ti,sci-dev-id = <259>;
    			msi-parent = <&main_udmass_inta>;
    		};
    
    		main_udmap: dma-controller@31150000 {
    			compatible = "ti,j721e-navss-main-udmap";
    			reg = <0x0 0x31150000 0x0 0x100>,
    			      <0x0 0x34000000 0x0 0x80000>,
    			      <0x0 0x35000000 0x0 0x200000>;
    			reg-names = "gcfg", "rchanrt", "tchanrt";
    			msi-parent = <&main_udmass_inta>;
    			#dma-cells = <1>;
    
    			ti,sci = <&sms>;
    			ti,sci-dev-id = <263>;
    			ti,ringacc = <&main_ringacc>;
    
    			ti,sci-rm-range-tchan = <0x0d>, /* TX_CHAN */
    						<0x0f>, /* TX_HCHAN */
    						<0x10>; /* TX_UHCHAN */
    			ti,sci-rm-range-rchan = <0x0a>, /* RX_CHAN */
    						<0x0b>, /* RX_HCHAN */
    						<0x0c>; /* RX_UHCHAN */
    			ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */
    		};
    
    		cpts@310d0000 {
    			compatible = "ti,j721e-cpts";
    			reg = <0x0 0x310d0000 0x0 0x400>;
    			reg-names = "cpts";
    			clocks = <&k3_clks 226 5>;
    			clock-names = "cpts";
    			interrupts-extended = <&main_navss_intr 391>;
    			interrupt-names = "cpts";
    			ti,cpts-periodic-outputs = <6>;
    			ti,cpts-ext-ts-inputs = <8>;
    		};
    	};
    
    	main_cpsw: ethernet@c200000 {
    		compatible = "ti,j721e-cpsw-nuss";
    		#address-cells = <2>;
    		#size-cells = <2>;
    		reg = <0x0 0xc200000 0x0 0x200000>;
    		reg-names = "cpsw_nuss";
    		ranges = <0x0 0x0 0x0 0xc200000 0x0 0x200000>;
    		dma-coherent;
    		clocks = <&k3_clks 28 28>;
    		clock-names = "fck";
    		power-domains = <&k3_pds 28 TI_SCI_PD_EXCLUSIVE>;
    
    		dmas = <&main_udmap 0xc640>,
    		       <&main_udmap 0xc641>,
    		       <&main_udmap 0xc642>,
    		       <&main_udmap 0xc643>,
    		       <&main_udmap 0xc644>,
    		       <&main_udmap 0xc645>,
    		       <&main_udmap 0xc646>,
    		       <&main_udmap 0xc647>,
    		       <&main_udmap 0x4640>;
    		dma-names = "tx0", "tx1", "tx2", "tx3",
    			    "tx4", "tx5", "tx6", "tx7",
    			    "rx";
    
    		ethernet-ports {
    			#address-cells = <1>;
    			#size-cells = <0>;
    
    			main_cpsw_port1: port@1 {
    				reg = <1>;
    				ti,mac-only;
    				label = "port1";
    				phys = <&phy_gmii_sel_cpsw 1>;
    			};
    		};
    
    		main_cpsw_mdio: mdio@f00 {
    			compatible = "ti,cpsw-mdio","ti,davinci_mdio";
    			reg = <0x0 0xf00 0x0 0x100>;
    			#address-cells = <1>;
    			#size-cells = <0>;
    			clocks = <&k3_clks 28 28>;
    			clock-names = "fck";
    			bus_freq = <1000000>;
    		};
    
    		cpts@3d000 {
    			compatible = "ti,am65-cpts";
    			reg = <0x0 0x3d000 0x0 0x400>;
    			clocks = <&k3_clks 28 3>;
    			clock-names = "cpts";
    			interrupts-extended = <&gic500 GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
    			interrupt-names = "cpts";
    			ti,cpts-ext-ts-inputs = <4>;
    			ti,cpts-periodic-outputs = <2>;
    		};
    	};
    
    	usbss0: cdns-usb@4104000 {
    		compatible = "ti,j721e-usb";
    		reg = <0x00 0x04104000 0x00 0x100>;
    		clocks = <&k3_clks 360 16>, <&k3_clks 360 15>;
    		clock-names = "ref", "lpm";
    		assigned-clocks = <&k3_clks 360 16>; /* USB2_REFCLK */
    		assigned-clock-parents = <&k3_clks 360 17>;
    		power-domains = <&k3_pds 360 TI_SCI_PD_EXCLUSIVE>;
    		#address-cells = <2>;
    		#size-cells = <2>;
    		ranges;
    		dma-coherent;
    
    		usb0: usb@6000000 {
    			compatible = "cdns,usb3";
    			reg = <0x00 0x06000000 0x00 0x10000>,
    			      <0x00 0x06010000 0x00 0x10000>,
    			      <0x00 0x06020000 0x00 0x10000>;
    			reg-names = "otg", "xhci", "dev";
    			interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
    				     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
    				     <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
    			 interrupt-names = "host", "peripheral", "otg";
    			 maximum-speed = "super-speed";
    			 dr_mode = "otg";
    		};
    	};
    
    	serdes_wiz0: wiz@5060000 {
    		compatible = "ti,j721e-wiz-10g";
    		#address-cells = <1>;
    		#size-cells = <1>;
    		power-domains = <&k3_pds 365 TI_SCI_PD_EXCLUSIVE>;
    		clocks = <&k3_clks 365 0>, <&k3_clks 365 3>, <&serdes_refclk>;
    		clock-names = "fck", "core_ref_clk", "ext_ref_clk";
    		num-lanes = <4>;
    		#reset-cells = <1>;
    		ranges = <0x5060000 0x0 0x5060000 0x10000>,
    			 <0xa030a00 0x0 0xa030a00 0x40>; /* DPTX PHY */
    
    		assigned-clocks = <&k3_clks 365 3>;
    		assigned-clock-parents = <&k3_clks 365 7>;
    
    		wiz0_pll0_refclk: pll0-refclk {
    			clocks = <&k3_clks 365 3>, <&serdes_refclk>;
    			clock-output-names = "wiz0_pll0_refclk";
    			#clock-cells = <0>;
    			assigned-clocks = <&wiz0_pll0_refclk>;
    			assigned-clock-parents = <&k3_clks 365 3>;
    		};
    
    		wiz0_pll1_refclk: pll1-refclk {
    			clocks = <&k3_clks 365 3>, <&serdes_refclk>;
    			clock-output-names = "wiz0_pll1_refclk";
    			#clock-cells = <0>;
    			assigned-clocks = <&wiz0_pll1_refclk>;
    			assigned-clock-parents = <&k3_clks 365 3>;
    		};
    
    		wiz0_refclk_dig: refclk-dig {
    			clocks = <&k3_clks 365 3>, <&serdes_refclk>;
    			clock-output-names = "wiz0_refclk_dig";
    			#clock-cells = <0>;
    			assigned-clocks = <&wiz0_refclk_dig>;
    			assigned-clock-parents = <&k3_clks 365 3>;
    		};
    
    		wiz0_cmn_refclk_dig_div: cmn-refclk-dig-div {
    			clocks = <&wiz0_refclk_dig>;
    			#clock-cells = <0>;
    		};
    
    		serdes0: serdes@5060000 {
    			/*
    			 * Note: we also map DPTX PHY registers as the Torrent
    			 * needs to manage those.
    			 */
    			compatible = "ti,j721e-serdes-10g";
    			reg = <0x05060000 0x00010000>,
    			      <0xa030a00 0x40>; /* DPTX PHY */
    			reg-names = "torrent_phy", "dptx_phy";
    			resets = <&serdes_wiz0 0>;
    			reset-names = "torrent_reset";
    			clocks = <&wiz0_pll0_refclk>;
    			clock-names = "refclk";
    			#address-cells = <1>;
    			#size-cells = <0>;
    
    			torrent_phy_dp: phy@2 {
    				reg = <2>;
    				resets = <&serdes_wiz0 3>;
    				cdns,phy-type = <PHY_TYPE_DP>;
    				cdns,num-lanes = <2>;
    				cdns,max-bit-rate = <5400>;
    				#phy-cells = <0>;
    			};
    		};
    	};
    
    	pcie1_rc: pcie@2910000 {
    		compatible = "ti,j7200-pcie-host", "ti,j721e-pcie-host";
    		reg = <0x00 0x02910000 0x00 0x1000>,
    		      <0x00 0x02917000 0x00 0x400>,
    		      <0x00 0x0d800000 0x00 0x00800000>,
    		      <0x00 0x18000000 0x00 0x00001000>;
    		reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
    		interrupt-names = "link_state";
    		interrupts = <GIC_SPI 330 IRQ_TYPE_EDGE_RISING>;
    		device_type = "pci";
    		ti,syscon-pcie-ctrl = <&scm_conf 0x074>;
    		max-link-speed = <3>;
    		num-lanes = <4>;
    		power-domains = <&k3_pds 276 TI_SCI_PD_EXCLUSIVE>;
    		clocks = <&k3_clks 276 41>;
    		clock-names = "fck";
    		#address-cells = <3>;
    		#size-cells = <2>;
    		bus-range = <0x0 0xff>;
    		vendor-id = <0x104c>;
    		device-id = <0xb013>;
    		msi-map = <0x0 &gic_its 0x0 0x10000>;
    		dma-coherent;
    		ranges = <0x01000000 0x0 0x18001000  0x00 0x18001000  0x0 0x0010000>,
    			 <0x02000000 0x0 0x18011000  0x00 0x18011000  0x0 0x7fef000>;
    		dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>;
    		#interrupt-cells = <1>;
    		interrupt-map-mask = <0 0 0 7>;
    		interrupt-map = <0 0 0 1 &pcie1_intc 0>, /* INT A */
    				<0 0 0 2 &pcie1_intc 0>, /* INT B */
    				<0 0 0 3 &pcie1_intc 0>, /* INT C */
    				<0 0 0 4 &pcie1_intc 0>; /* INT D */
    
    		pcie1_intc: interrupt-controller {
    			interrupt-controller;
    			#interrupt-cells = <1>;
    			interrupt-parent = <&gic500>;
    			interrupts = <GIC_SPI 324 IRQ_TYPE_EDGE_RISING>;
    		};
    	};
    
    	pcie1_ep: pcie-ep@2910000 {
    		compatible = "ti,j7200-pcie-ep", "ti,j721e-pcie-ep";
    		reg = <0x00 0x02910000 0x00 0x1000>,
    		      <0x00 0x02917000 0x00 0x400>,
    		      <0x00 0x0d800000 0x00 0x00800000>,
    		      <0x00 0x18000000 0x00 0x08000000>;
    		reg-names = "intd_cfg", "user_cfg", "reg", "mem";
    		interrupt-names = "link_state";
    		interrupts = <GIC_SPI 330 IRQ_TYPE_EDGE_RISING>;
    		ti,syscon-pcie-ctrl = <&scm_conf 0x074>;
    		max-link-speed = <3>;
    		num-lanes = <4>;
    		power-domains = <&k3_pds 276 TI_SCI_PD_EXCLUSIVE>;
    		clocks = <&k3_clks 276 41>;
    		clock-names = "fck";
    		max-functions = /bits/ 8 <6>;
    		max-virtual-functions = /bits/ 8 <4 4 4 4 0 0>;
    		dma-coherent;
    	};
    
    	main_r5fss0: r5fss@5c00000 {
    		compatible = "ti,j721s2-r5fss";
    		ti,cluster-mode = <0>;
    		#address-cells = <1>;
    		#size-cells = <1>;
    		ranges = <0x5c00000 0x00 0x5c00000 0x20000>,
    			 <0x5d00000 0x00 0x5d00000 0x20000>;
    		power-domains = <&k3_pds 277 TI_SCI_PD_EXCLUSIVE>;
    
    		main_r5fss0_core0: r5f@5c00000 {
    			compatible = "ti,j721s2-r5f";
    			reg = <0x5c00000 0x00010000>,
    			      <0x5c10000 0x00010000>;
    			reg-names = "atcm", "btcm";
    			ti,sci = <&sms>;
    			ti,sci-dev-id = <279>;
    			ti,sci-proc-ids = <0x06 0xff>;
    			resets = <&k3_reset 279 1>;
    			firmware-name = "j721s2-main-r5f0_0-fw";
    			ti,atcm-enable = <1>;
    			ti,btcm-enable = <1>;
    			ti,loczrama = <1>;
    		};
    
    		main_r5fss0_core1: r5f@5d00000 {
    			compatible = "ti,j721s2-r5f";
    			reg = <0x5d00000 0x00010000>,
    			      <0x5d10000 0x00010000>;
    			reg-names = "atcm", "btcm";
    			ti,sci = <&sms>;
    			ti,sci-dev-id = <280>;
    			ti,sci-proc-ids = <0x07 0xff>;
    			resets = <&k3_reset 280 1>;
    			firmware-name = "j721s2-main-r5f0_1-fw";
    			ti,atcm-enable = <1>;
    			ti,btcm-enable = <1>;
    			ti,loczrama = <1>;
    		};
    	};
    
    	main_r5fss1: r5fss@5e00000 {
    		compatible = "ti,j721s2-r5fss";
    		ti,cluster-mode = <0>;
    		#address-cells = <1>;
    		#size-cells = <1>;
    		ranges = <0x5e00000 0x00 0x5e00000 0x20000>,
    			 <0x5f00000 0x00 0x5f00000 0x20000>;
    		power-domains = <&k3_pds 278 TI_SCI_PD_EXCLUSIVE>;
    
    		main_r5fss1_core0: r5f@5e00000 {
    			compatible = "ti,j721s2-r5f";
    			reg = <0x5e00000 0x00010000>,
    			      <0x5e10000 0x00010000>;
    			reg-names = "atcm", "btcm";
    			ti,sci = <&sms>;
    			ti,sci-dev-id = <281>;
    			ti,sci-proc-ids = <0x08 0xff>;
    			resets = <&k3_reset 281 1>;
    			firmware-name = "j721s2-main-r5f1_0-fw";
    			ti,atcm-enable = <1>;
    			ti,btcm-enable = <1>;
    			ti,loczrama = <1>;
    		};
    
    		main_r5fss1_core1: r5f@5f00000 {
    			compatible = "ti,j721s2-r5f";
    			reg = <0x5f00000 0x00010000>,
    			      <0x5f10000 0x00010000>;
    			reg-names = "atcm", "btcm";
    			ti,sci = <&sms>;
    			ti,sci-dev-id = <282>;
    			ti,sci-proc-ids = <0x09 0xff>;
    			resets = <&k3_reset 282 1>;
    			firmware-name = "j721s2-main-r5f1_1-fw";
    			ti,atcm-enable = <1>;
    			ti,btcm-enable = <1>;
    			ti,loczrama = <1>;
    		};
    	};
    
    	c71_0: dsp@64800000 {
    		compatible = "ti,j721s2-c71-dsp";
    		reg = <0x00 0x64800000 0x00 0x00080000>,
    		      <0x00 0x64e00000 0x00 0x0000c000>;
    		reg-names = "l2sram", "l1dram";
    		ti,sci = <&sms>;
    		ti,sci-dev-id = <8>;
    		ti,sci-proc-ids = <0x30 0xff>;
    		resets = <&k3_reset 8 1>;
    		firmware-name = "j721s2-c71_0-fw";
    	};
    
    	c71_1: dsp@65800000 {
    		compatible = "ti,j721s2-c71-dsp";
    		reg = <0x00 0x65800000 0x00 0x00080000>,
    		      <0x00 0x65e00000 0x00 0x0000c000>;
    		reg-names = "l2sram", "l1dram";
    		ti,sci = <&sms>;
    		ti,sci-dev-id = <11>;
    		ti,sci-proc-ids = <0x31 0xff>;
    		resets = <&k3_reset 11 1>;
    		firmware-name = "j721s2-c71_1-fw";
    	};
    
    	main_mcan0: can@2701000 {
    		compatible = "bosch,m_can";
    		reg = <0x00 0x02701000 0x00 0x200>,
    		      <0x00 0x02708000 0x00 0x8000>;
    		reg-names = "m_can", "message_ram";
    		power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
    		clocks = <&k3_clks 182 0>, <&k3_clks 182 1>;
    		clock-names = "hclk", "cclk";
    		interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
    			     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
    		interrupt-names = "int0", "int1";
    		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
    	};
    
    	main_mcan1: can@2711000 {
    		compatible = "bosch,m_can";
    		reg = <0x00 0x02711000 0x00 0x200>,
    		      <0x00 0x02718000 0x00 0x8000>;
    		reg-names = "m_can", "message_ram";
    		power-domains = <&k3_pds 183 TI_SCI_PD_EXCLUSIVE>;
    		clocks = <&k3_clks 183 0>, <&k3_clks 183 1>;
    		clock-names = "hclk", "cclk";
    		interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
    			     <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
    		interrupt-names = "int0", "int1";
    		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
    	};
    
    	main_mcan2: can@2721000 {
    		compatible = "bosch,m_can";
    		reg = <0x00 0x02721000 0x00 0x200>,
    		      <0x00 0x02728000 0x00 0x8000>;
    		reg-names = "m_can", "message_ram";
    		power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>;
    		clocks = <&k3_clks 184 0>, <&k3_clks 184 1>;
    		clock-names = "hclk", "cclk";
    		interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
    			     <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
    		interrupt-names = "int0", "int1";
    		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
    	};
    
    	main_mcan3: can@2731000 {
    		compatible = "bosch,m_can";
    		reg = <0x00 0x02731000 0x00 0x200>,
    		      <0x00 0x02738000 0x00 0x8000>;
    		reg-names = "m_can", "message_ram";
    		power-domains = <&k3_pds 185 TI_SCI_PD_EXCLUSIVE>;
    		clocks = <&k3_clks 185 0>, <&k3_clks 185 1>;
    		clock-names = "hclk", "cclk";
    		interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
    			     <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
    		interrupt-names = "int0", "int1";
    		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
    	};
    
    	main_mcan4: can@2741000 {
    		compatible = "bosch,m_can";
    		reg = <0x00 0x02741000 0x00 0x200>,
    		      <0x00 0x02748000 0x00 0x8000>;
    		reg-names = "m_can", "message_ram";
    		power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>;
    		clocks = <&k3_clks 186 0>, <&k3_clks 186 1>;
    		clock-names = "hclk", "cclk";
    		interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
    			     <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
    		interrupt-names = "int0", "int1";
    		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
    	};
    
    	main_mcan5: can@2751000 {
    		compatible = "bosch,m_can";
    		reg = <0x00 0x02751000 0x00 0x200>,
    		      <0x00 0x02758000 0x00 0x8000>;
    		reg-names = "m_can", "message_ram";
    		power-domains = <&k3_pds 187 TI_SCI_PD_EXCLUSIVE>;
    		clocks = <&k3_clks 187 0>, <&k3_clks 187 1>;
    		clock-names = "hclk", "cclk";
    		interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>,
    			     <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
    		interrupt-names = "int0", "int1";
    		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
    	};
    
    	main_mcan6: can@2761000 {
    		compatible = "bosch,m_can";
    		reg = <0x00 0x02761000 0x00 0x200>,
    		      <0x00 0x02768000 0x00 0x8000>;
    		reg-names = "m_can", "message_ram";
    		power-domains = <&k3_pds 188 TI_SCI_PD_EXCLUSIVE>;
    		clocks = <&k3_clks 188 0>, <&k3_clks 188 1>;
    		clock-names = "hclk", "cclk";
    		interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
    			     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
    		interrupt-names = "int0", "int1";
    		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
    	};
    
    	main_mcan7: can@2771000 {
    		compatible = "bosch,m_can";
    		reg = <0x00 0x02771000 0x00 0x200>,
    		      <0x00 0x02778000 0x00 0x8000>;
    		reg-names = "m_can", "message_ram";
    		power-domains = <&k3_pds 189 TI_SCI_PD_EXCLUSIVE>;
    		clocks = <&k3_clks 189 0>, <&k3_clks 189 1>;
    		clock-names = "hclk", "cclk";
    		interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
    			     <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
    		interrupt-names = "int0", "int1";
    		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
    	};
    
    	main_mcan8: can@2781000 {
    		compatible = "bosch,m_can";
    		reg = <0x00 0x02781000 0x00 0x200>,
    		      <0x00 0x02788000 0x00 0x8000>;
    		reg-names = "m_can", "message_ram";
    		power-domains = <&k3_pds 190 TI_SCI_PD_EXCLUSIVE>;
    		clocks = <&k3_clks 190 0>, <&k3_clks 190 1>;
    		clock-names = "hclk", "cclk";
    		interrupts = <GIC_SPI 576 IRQ_TYPE_LEVEL_HIGH>,
    			     <GIC_SPI 577 IRQ_TYPE_LEVEL_HIGH>;
    		interrupt-names = "int0", "int1";
    		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
    	};
    
    	main_mcan9: can@2791000 {
    		compatible = "bosch,m_can";
    		reg = <0x00 0x02791000 0x00 0x200>,
    		      <0x00 0x02798000 0x00 0x8000>;
    		reg-names = "m_can", "message_ram";
    		power-domains = <&k3_pds 191 TI_SCI_PD_EXCLUSIVE>;
    		clocks = <&k3_clks 191 0>, <&k3_clks 191 1>;
    		clock-names = "hclk", "cclk";
    		interrupts = <GIC_SPI 579 IRQ_TYPE_LEVEL_HIGH>,
    			     <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>;
    		interrupt-names = "int0", "int1";
    		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
    	};
    
    	main_mcan10: can@27a1000 {
    		compatible = "bosch,m_can";
    		reg = <0x00 0x027a1000 0x00 0x200>,
    		      <0x00 0x027a8000 0x00 0x8000>;
    		reg-names = "m_can", "message_ram";
    		power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;
    		clocks = <&k3_clks 192 0>, <&k3_clks 192 1>;
    		clock-names = "hclk", "cclk";
    		interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>,
    			     <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>;
    		interrupt-names = "int0", "int1";
    		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
    	};
    
    	main_mcan11: can@27b1000 {
    		compatible = "bosch,m_can";
    		reg = <0x00 0x027b1000 0x00 0x200>,
    		      <0x00 0x027b8000 0x00 0x8000>;
    		reg-names = "m_can", "message_ram";
    		power-domains = <&k3_pds 193 TI_SCI_PD_EXCLUSIVE>;
    		clocks = <&k3_clks 193 0>, <&k3_clks 193 1>;
    		clock-names = "hclk", "cclk";
    		interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>,
    			     <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>;
    		interrupt-names = "int0", "int1";
    		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
    	};
    
    	main_mcan12: can@27c1000 {
    		compatible = "bosch,m_can";
    		reg = <0x00 0x027c1000 0x00 0x200>,
    		      <0x00 0x027c8000 0x00 0x8000>;
    		reg-names = "m_can", "message_ram";
    		power-domains = <&k3_pds 194 TI_SCI_PD_EXCLUSIVE>;
    		clocks = <&k3_clks 194 0>, <&k3_clks 194 1>;
    		clock-names = "hclk", "cclk";
    		interrupts = <GIC_SPI 588 IRQ_TYPE_LEVEL_HIGH>,
    			     <GIC_SPI 589 IRQ_TYPE_LEVEL_HIGH>;
    		interrupt-names = "int0", "int1";
    		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
    	};
    
    	main_mcan13: can@27d1000 {
    		compatible = "bosch,m_can";
    		reg = <0x00 0x027d1000 0x00 0x200>,
    		      <0x00 0x027d8000 0x00 0x8000>;
    		reg-names = "m_can", "message_ram";
    		power-domains = <&k3_pds 195 TI_SCI_PD_EXCLUSIVE>;
    		clocks = <&k3_clks 195 0>, <&k3_clks 195 1>;
    		clock-names = "hclk", "cclk";
    		interrupts = <GIC_SPI 591 IRQ_TYPE_LEVEL_HIGH>,
    			     <GIC_SPI 592 IRQ_TYPE_LEVEL_HIGH>;
    		interrupt-names = "int0", "int1";
    		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
    	};
    
    	main_mcan14: can@2681000 {
    		compatible = "bosch,m_can";
    		reg = <0x00 0x02681000 0x00 0x200>,
    		      <0x00 0x02688000 0x00 0x8000>;
    		reg-names = "m_can", "message_ram";
    		power-domains = <&k3_pds 197 TI_SCI_PD_EXCLUSIVE>;
    		clocks = <&k3_clks 197 0>, <&k3_clks 197 1>;
    		clock-names = "hclk", "cclk";
    		interrupts = <GIC_SPI 594 IRQ_TYPE_LEVEL_HIGH>,
    			     <GIC_SPI 595 IRQ_TYPE_LEVEL_HIGH>;
    		interrupt-names = "int0", "int1";
    		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
    	};
    
    	main_mcan15: can@2691000 {
    		compatible = "bosch,m_can";
    		reg = <0x00 0x02691000 0x00 0x200>,
    		      <0x00 0x02698000 0x00 0x8000>;
    		reg-names = "m_can", "message_ram";
    		power-domains = <&k3_pds 199 TI_SCI_PD_EXCLUSIVE>;
    		clocks = <&k3_clks 199 0>, <&k3_clks 199 1>;
    		clock-names = "hclk", "cclk";
    		interrupts = <GIC_SPI 597 IRQ_TYPE_LEVEL_HIGH>,
    			     <GIC_SPI 598 IRQ_TYPE_LEVEL_HIGH>;
    		interrupt-names = "int0", "int1";
    		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
    	};
    
    	main_mcan16: can@26a1000 {
    		compatible = "bosch,m_can";
    		reg = <0x00 0x026a1000 0x00 0x200>,
    		      <0x00 0x026a8000 0x00 0x8000>;
    		reg-names = "m_can", "message_ram";
    		power-domains = <&k3_pds 201 TI_SCI_PD_EXCLUSIVE>;
    		clocks = <&k3_clks 201 0>, <&k3_clks 201 1>;
    		clock-names = "hclk", "cclk";
    		interrupts = <GIC_SPI 784 IRQ_TYPE_LEVEL_HIGH>,
    			     <GIC_SPI 785 IRQ_TYPE_LEVEL_HIGH>;
    		interrupt-names = "int0", "int1";
    		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
    	};
    
    	main_mcan17: can@26b1000 {
    		compatible = "bosch,m_can";
    		reg = <0x00 0x026b1000 0x00 0x200>,
    		      <0x00 0x026b8000 0x00 0x8000>;
    		reg-names = "m_can", "message_ram";
    		power-domains = <&k3_pds 206 TI_SCI_PD_EXCLUSIVE>;
    		clocks = <&k3_clks 206 0>, <&k3_clks 206 1>;
    		clock-names = "hclk", "cclk";
    		interrupts = <GIC_SPI 787 IRQ_TYPE_LEVEL_HIGH>,
    			     <GIC_SPI 788 IRQ_TYPE_LEVEL_HIGH>;
    		interrupt-names = "int0", "int1";
    		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
    	};
    
    	mhdp: dp-bridge@a000000 {
    		compatible = "ti,j721e-mhdp8546";
    		/*
    		 * Note: we do not map DPTX PHY area, as that is handled by
    		 * the PHY driver.
    		 */
    		reg = <0x0 0xa000000 0x0 0x30a00>, /* DSS_EDP0_V2A_CORE_VP_REGS_APB */
    		      <0x0 0x4f40000 0x0 0x20>;    /* DSS_EDP0_INTG_CFG_VP */
    		reg-names = "mhdptx", "j721e-intg";
    
    		clocks = <&k3_clks 156 19>;
    
    		phys = <&torrent_phy_dp>;
    		phy-names = "dpphy";
    
    		interrupt-parent = <&gic500>;
    		interrupts = <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>;
    
    		power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
    
    		dp0_ports: ports {
    			#address-cells = <1>;
    			#size-cells = <0>;
    		};
    	};
    
    	dphy0: phy@4480000 {
    		compatible = "ti,j721e-dphy";
    		reg = <0x0 0x04480000 0x0 0x1000>;
    		clocks = <&k3_clks 363 8>, <&k3_clks 363 14>;
    		clock-names = "psm", "pll_ref";
    		#phy-cells = <0>;
    		power-domains = <&k3_pds 363 TI_SCI_PD_EXCLUSIVE>;
    		assigned-clocks = <&k3_clks 363 14>;
    		assigned-clock-parents = <&k3_clks 363 15>;
    		assigned-clock-rates = <19200000>;
    	};
    
    	dsi0: dsi@4800000 {
    		compatible = "ti,j721e-dsi";
    		reg = <0x0 0x04800000 0x0 0x100000>, <0x0 0x04710000 0x0 0x100>;
    		clocks = <&k3_clks 154 4>, <&k3_clks 154 1>;
    		clock-names = "dsi_p_clk", "dsi_sys_clk";
    		power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
    		interrupt-parent = <&gic500>;
    		interrupts = <GIC_SPI 600 IRQ_TYPE_LEVEL_HIGH>;
    		phys = <&dphy0>;
    		phy-names = "dphy";
    
    		dsi0_ports: ports {
    			#address-cells = <1>;
    			#size-cells = <0>;
    			port@0 {
    				reg = <0>;
    			};
    			port@1 {
    				reg = <1>;
    			};
    		};
    	};
    
    	dss: dss@4a00000 {
    		compatible = "ti,j721e-dss";
    		reg =
    			<0x00 0x04a00000 0x00 0x10000>, /* common_m */
    			<0x00 0x04a10000 0x00 0x10000>, /* common_s0*/
    			<0x00 0x04b00000 0x00 0x10000>, /* common_s1*/
    			<0x00 0x04b10000 0x00 0x10000>, /* common_s2*/
    
    			<0x00 0x04a20000 0x00 0x10000>, /* vidl1 */
    			<0x00 0x04a30000 0x00 0x10000>, /* vidl2 */
    			<0x00 0x04a50000 0x00 0x10000>, /* vid1 */
    			<0x00 0x04a60000 0x00 0x10000>, /* vid2 */
    
    			<0x00 0x04a70000 0x00 0x10000>, /* ovr1 */
    			<0x00 0x04a90000 0x00 0x10000>, /* ovr2 */
    			<0x00 0x04ab0000 0x00 0x10000>, /* ovr3 */
    			<0x00 0x04ad0000 0x00 0x10000>, /* ovr4 */
    
    			<0x00 0x04a80000 0x00 0x10000>, /* vp1 */
    			<0x00 0x04aa0000 0x00 0x10000>, /* vp2 */
    			<0x00 0x04ac0000 0x00 0x10000>, /* vp3 */
    			<0x00 0x04ae0000 0x00 0x10000>, /* vp4 */
    			<0x00 0x04af0000 0x00 0x10000>; /* wb */
    
    		reg-names = "common_m", "common_s0",
    			"common_s1", "common_s2",
    			"vidl1", "vidl2","vid1","vid2",
    			"ovr1", "ovr2", "ovr3", "ovr4",
    			"vp1", "vp2", "vp3", "vp4",
    			"wb";
    
    		clocks =	<&k3_clks 158 0>,
    				<&k3_clks 158 2>,
    				<&k3_clks 158 5>,
    				<&k3_clks 158 14>,
    				<&k3_clks 158 18>;
    		clock-names = "fck", "vp1", "vp2", "vp3", "vp4";
    
    		power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>;
    
    		interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>,
    			     <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>,
    			     <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>,
    			     <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
    		interrupt-names = "common_m",
    				  "common_s0",
    				  "common_s1",
    				  "common_s2";
    
    		dss_ports: ports {
    		};
    	};
    };
    

    Thanks,

    Ethan

  • Hi Ethan 

    1.Is this is the only change you are doing for the USB to work on lane 1 there are couple of more properties for USB define in 

    k3-j721s2-common-proc-board.dts  are they present in your final dts ?

    like :

          main_usbss0_pins_default: main-usbss0-pins-default {
    pinctrl-single,pins = <
    J721S2_IOPAD(0x0ec, PIN_OUTPUT, 6) /* (AG25) TIMER_IO1.USB0_DRVVBUS */
    >;
    };

    2. can you share all the changes you are using for the dts also share the dmesg logs .

    Regards 

    Diwakar 

  • Hi Diwakar,

    Here is k3-j721s2-common-proc-board.dts,

    k3-j721s2-common-proc-board.txt
    // SPDX-License-Identifier: GPL-2.0
    /*
     * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
     *
     * Common Processor Board: https://www.ti.com/tool/J721EXCPXEVM
     */
    
    /dts-v1/;
    
    #include "k3-j721s2-som-p0.dtsi"
    #include <dt-bindings/net/ti-dp83867.h>
    #include <dt-bindings/phy/phy-cadence.h>
    #include <dt-bindings/phy/phy.h>
    #include <dt-bindings/mux/ti-serdes.h>
    
    / {
    	compatible = "ti,j721s2-evm", "ti,j721s2";
    	model = "Texas Instruments J721S2 EVM";
    
    	chosen {
    		stdout-path = "serial2:115200n8";
    		bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x2880000";
    	};
    
    	aliases {
    		serial2 = &main_uart8;
    		mmc0 = &main_sdhci0;
    		mmc1 = &main_sdhci1;
    		spi0 = &ospi0;
    		can0 = &mcu_mcan0;
    		can1 = &main_mcan0;
    		can2 = &main_mcan1;
    		can3 = &main_mcan2;
    		ethernet0 = &cpsw_port1;
    		ethernet1 = &main_cpsw_port1;
    	};
    
    	evm_12v0: fixedregulator-evm12v0 {
    		/* main supply */
    		compatible = "regulator-fixed";
    		regulator-name = "evm_12v0";
    		regulator-min-microvolt = <12000000>;
    		regulator-max-microvolt = <12000000>;
    		regulator-always-on;
    		regulator-boot-on;
    	};
    
    	vsys_3v3: fixedregulator-vsys3v3 {
    		/* Output of LM5140 */
    		compatible = "regulator-fixed";
    		regulator-name = "vsys_3v3";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		vin-supply = <&evm_12v0>;
    		regulator-always-on;
    		regulator-boot-on;
    	};
    
    	vsys_5v0: fixedregulator-vsys5v0 {
    		/* Output of LM5140 */
    		compatible = "regulator-fixed";
    		regulator-name = "vsys_5v0";
    		regulator-min-microvolt = <5000000>;
    		regulator-max-microvolt = <5000000>;
    		vin-supply = <&evm_12v0>;
    		regulator-always-on;
    		regulator-boot-on;
    	};
    
    	vdd_mmc1: fixedregulator-sd {
    		compatible = "regulator-fixed";
    		regulator-name = "vdd_mmc1";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		regulator-boot-on;
    		regulator-always-on;
    		enable-active-high;
    		vin-supply = <&vsys_3v3>;
    	};
    
    	vdd_sd_dv_alt: fixedregulator-sd-dv-alt {
    		compatible = "regulator-fixed";
    		regulator-name = "vdd_sd_dv_alt";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		regulator-boot-on;
    		regulator-always-on;
    		enable-active-high;
    		vin-supply = <&vsys_3v3>;
    	};
    
    	transceiver0: can-phy0 {
    		compatible = "ti,tcan1043";
    		#phy-cells = <0>;
    		max-bitrate = <5000000>;
    		standby-gpios = <&wkup_gpio0 5 GPIO_ACTIVE_LOW>;
    		//enable-gpios = <&wkup_gpio0 4 GPIO_ACTIVE_LOW>;
    		enable-gpios = <&wkup_gpio0 4 GPIO_ACTIVE_HIGH>;
    	};
    
    	transceiver1: can-phy1 {
    		compatible = "ti,tcan1043";
    		#phy-cells = <0>;
    		max-bitrate = <5000000>;
    	};
    
    	transceiver2: can-phy2 {
    		compatible = "ti,tcan1043";
    		#phy-cells = <0>;
    		max-bitrate = <5000000>;
    	};
    
    	transceiver3: can-phy3 {
    		compatible = "ti,tcan1043";
    		#phy-cells = <0>;
    		max-bitrate = <5000000>;
    	};
    
    	dp0_pwr_3v3: fixedregulator-dp0-prw {
    		compatible = "regulator-fixed";
    		regulator-name = "dp0-pwr";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		enable-active-high;
    	};
    
    	dp0: dp0-connector {
    		compatible = "dp-connector";
    		label = "DP0";
    		type = "full-size";
    		dp-pwr-supply = <&dp0_pwr_3v3>;
    
    		port {
    			dp0_connector_in: endpoint {
    				remote-endpoint = <&dp0_out>;
    			};
    		};
    	};
    
    };
    
    &main_i2c4 {
    	status = "disabled";
    };
    
    &main_pmx0 {
    	main_uart8_pins_default: main-uart8-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x038, PIN_INPUT_PULLDOWN, 11) /* (AB28) MCASP0_ACLKX.UART8_RXD */
    			J721S2_IOPAD(0x03c, PIN_OUTPUT_PULLUP, 11) /* (U27) MCASP0_AFSX.UART8_TXD */
    		>;
    	};
    //Ethan+ >>
    	main_i2c0_pins_default: main-i2c0-pins-default {
    		pinctrl-single,pins = <
    			J721E_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AH25) I2C0_SCL */
    			J721E_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AE24) I2C0_SDA */
    		>;	
    	};
    //Ethan+ <<
    	main_i2c1_pins_default: main-i2c1-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x0c4, PIN_INPUT_PULLUP, 13) /* (AB26) ECAP0_IN_APWM_OUT.I2C1_SCL */
    			J721S2_IOPAD(0x0c8, PIN_INPUT_PULLUP, 13) /* (AD28) EXT_REFCLK1.I2C1_SDA */
    		>;
    	};
    
    	main_mmc1_pins_default: main-mmc1-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */
    			J721S2_IOPAD(0x108, PIN_INPUT, 0) /* (N24) MMC1_CMD */
    			J721S2_IOPAD(0x100, PIN_INPUT, 0) /* (###) MMC1_CLKLB */
    			J721S2_IOPAD(0x0fc, PIN_INPUT, 0) /* (M23) MMC1_DAT0 */
    			J721S2_IOPAD(0x0f8, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */
    			J721S2_IOPAD(0x0f4, PIN_INPUT, 0) /* (R24) MMC1_DAT2 */
    			J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */
    			J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */
    		>;
    	};
    
    	dp0_pins_default: dp0-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x0b8, PIN_INPUT, 3) /* (AA24) MCASP1_ACLKX.DP0_HPD */
    		>;
    	};
    
    	main_cpsw_pins_default: main-cpsw-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x0b8, PIN_INPUT, 6) /* (AA24) MCASP1_ACLKX.RGMII1_RD0 */
    			J721S2_IOPAD(0x0a0, PIN_INPUT, 6) /* (AB25) MCASP0_AXR12.RGMII1_RD1 */
    			J721S2_IOPAD(0x0a4, PIN_INPUT, 6) /* (T23) MCASP0_AXR13.RGMII1_RD2 */
    			J721S2_IOPAD(0x0a8, PIN_INPUT, 6) /* (U24) MCASP0_AXR14.RGMII1_RD3 */
    			J721S2_IOPAD(0x0b0, PIN_INPUT, 6) /* (AD26) MCASP1_AXR3.RGMII1_RXC */
    			J721S2_IOPAD(0x0ac, PIN_INPUT, 6) /* (AC25) MCASP0_AXR15.RGMII1_RX_CTL */
    			J721S2_IOPAD(0x08c, PIN_OUTPUT, 6) /* (T25) MCASP0_AXR7.RGMII1_TD0 */
    			J721S2_IOPAD(0x090, PIN_OUTPUT, 6) /* (W24) MCASP0_AXR8.RGMII1_TD1 */
    			J721S2_IOPAD(0x094, PIN_OUTPUT, 6) /* (AA25) MCASP0_AXR9.RGMII1_TD2 */
    			J721S2_IOPAD(0x098, PIN_OUTPUT, 6) /* (V25) MCASP0_AXR10.RGMII1_TD3 */
    			J721S2_IOPAD(0x0b4, PIN_OUTPUT, 6) /* (U25) MCASP1_AXR4.RGMII1_TXC */
    			J721S2_IOPAD(0x09c, PIN_OUTPUT, 6) /* (T24) MCASP0_AXR11.RGMII1_TX_CTL */
    		>;
    	};
    
    	main_mdio_pins_default: main-mdio-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x0c0, PIN_OUTPUT_PULLUP, 6) /* (T28) MCASP1_AXR0.MDIO0_MDC */
    			J721S2_IOPAD(0x0bc, PIN_INPUT_PULLUP, 6) /* (V28) MCASP1_AFSX.MDIO0_MDIO */
    		>;
    	};
    
    	main_mcan0_pins_default: main-mcan0-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x068, PIN_INPUT_PULLUP, 0) /* (U28) MCAN0_RX */
    			J721S2_IOPAD(0x064, PIN_OUTPUT_PULLUP, 0) /* (W28) MCAN0_TX */
    		>;
    	};
    
    	main_mcan1_pins_default: main-mcan1-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x070, PIN_INPUT_PULLUP, 0) /* (R27) MCAN1_RX */
    			J721S2_IOPAD(0x06c, PIN_OUTPUT_PULLUP, 0) /* (V26) MCAN1_TX */
    		>;
    	};
    
    	main_mcan2_pins_default: main-mcan2-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x078, PIN_INPUT_PULLUP, 0) /* (Y25) MCAN2_RX */
    			J721S2_IOPAD(0x074, PIN_OUTPUT_PULLUP, 0) /* (R28) MCAN2_TX */
    		>;
    	};
    
    	main_gpio1_pins_default: main-gpio1-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x000, PIN_INPUT_PULLUP, 7) /* (AG24) EXTINTn.GPIO0_0 */
    			J721S2_IOPAD(0x004, PIN_INPUT, 7) /* (W25) MCAN12_TX.GPIO0_1 */
    			J721S2_IOPAD(0x008, PIN_INPUT, 7) /* (AC24) MCAN12_RX.GPIO0_2 */
    			J721S2_IOPAD(0x00c, PIN_INPUT, 7) /* (AE28) MCAN13_TX.GPIO0_3 */
    			J721S2_IOPAD(0x010, PIN_INPUT_PULLUP, 7) /* (AF28) MCAN13_RX.GPIO0_4 */
    			J721S2_IOPAD(0x014, PIN_INPUT_PULLUP, 7) /* (AD25) MCAN14_TX.GPIO0_5 */
    			J721S2_IOPAD(0x018, PIN_INPUT_PULLUP, 7) /* (W23) MCAN14_RX.GPIO0_6 */
    			J721S2_IOPAD(0x01c, PIN_INPUT_PULLUP, 7) /* (Y24) MCAN15_TX.GPIO0_7 */
    			J721S2_IOPAD(0x020, PIN_INPUT_PULLUP, 7) /* (AA23) MCAN15_RX.GPIO0_8 */
    			J721S2_IOPAD(0x024, PIN_INPUT_PULLUP, 7) /* (Y28) MCAN16_TX.GPIO0_9 */
    			J721S2_IOPAD(0x028, PIN_INPUT, 7) /* (AB24) MCAN16_RX.GPIO0_10 */
    			J721S2_IOPAD(0x02c, PIN_INPUT, 7) /* (V23) GPIO0_11 */
    			J721S2_IOPAD(0x030, PIN_OUTPUT_PULLUP, 7) /* (T26) GPIO0_12 */
    			J721S2_IOPAD(0x040, PIN_INPUT_PULLDOWN, 7) /* (AC28) MCASP0_AXR0.GPIO0_16 */
    			J721S2_IOPAD(0x044, PIN_INPUT_PULLDOWN, 7) /* (Y26) MCASP0_AXR1.GPIO0_17 */
    			J721S2_IOPAD(0x048, PIN_INPUT_PULLDOWN, 7) /* (AB27) MCASP0_AXR2.GPIO0_18 */
    			J721S2_IOPAD(0x04c, PIN_INPUT_PULLDOWN, 7) /* (V27) MCASP1_AXR1.GPIO0_19 */
    			J721S2_IOPAD(0x050, PIN_INPUT_PULLDOWN, 7) /* (W27) MCASP1_AXR2.GPIO0_20 */
    			J721S2_IOPAD(0x054, PIN_INPUT_PULLDOWN, 7) /* (Y27) MCASP2_ACLKX.GPIO0_21 */
    			J721S2_IOPAD(0x058, PIN_INPUT_PULLDOWN, 7) /* (AA27) MCASP2_AFSX.GPIO0_22 */
    			J721S2_IOPAD(0x05c, PIN_INPUT_PULLDOWN, 7) /* (AA26) MCASP2_AXR0.GPIO0_23 */
    			J721S2_IOPAD(0x07c, PIN_INPUT, 7) /* (T27) MCASP0_AXR3.GPIO0_31 */
    			J721S2_IOPAD(0x080, PIN_INPUT, 7) /* (U26) MCASP0_AXR4.GPIO0_32 */
    			J721S2_IOPAD(0x088, PIN_OUTPUT_PULLUP, 7) /* (AD27) MCASP0_AXR6.GPIO0_34 */
    			J721S2_IOPAD(0x0d0, PIN_INPUT, 7) /* (AF26) SPI0_CS1.GPIO0_52 */
    		>;
    	};
    //Ming++ for spi 0 device 202200822 >>
        spi0_pins_default: spi0-pins-default {
        	pinctrl-single,pins = <
        		J721E_IOPAD(0x0D4, PIN_OUTPUT_PULLDOWN, 0) /* (AH27) PIN_SPI0_CLK */
        		J721E_IOPAD(0x0CC, PIN_OUTPUT_PULLDOWN, 0) /* (AE27) PIN_SPI0_CS0 */
        		J721E_IOPAD(0x0D8, PIN_OUTPUT_PULLDOWN, 0) /* (AG26) PIN_SPI0_D0 */
        		J721E_IOPAD(0x0DC, PIN_INPUT_PULLDOWN, 0) /* (AH26) PIN_SPI0_D1 */
        	>;
        };
        pwm1_pins_default: pwm1-pins-default {
        	pinctrl-single,pins = <
        		J721E_IOPAD(0x060, PIN_OUTPUT_PULLDOWN, 7) /* (AC27) PIN_MCASP2_AXR1 */
         	>;
        };
    //Ming++		
    };
    
    &wkup_pmx0 {
    	mcu_cpsw_gpio_pins_default: mcu-cpsw-gpio-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x0dc, PIN_OUTPUT, 7) /* (F28) WKUP_GPIO0_7 */
    			J721S2_WKUP_IOPAD(0x0cc, PIN_INPUT, 7)  /* (C27) WKUP_GPIO0_3 */
    		>;
    	};
    
    	mcu_cpsw_pins_default: mcu-cpsw-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x094, PIN_INPUT, 0) /* (B22) MCU_RGMII1_RD0 */
    			J721S2_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (B21) MCU_RGMII1_RD1 */
    			J721S2_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C22) MCU_RGMII1_RD2 */
    			J721S2_WKUP_IOPAD(0x088, PIN_INPUT, 0) /* (D23) MCU_RGMII1_RD3 */
    			J721S2_WKUP_IOPAD(0x084, PIN_INPUT, 0) /* (D22) MCU_RGMII1_RXC */
    			J721S2_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (E23) MCU_RGMII1_RX_CTL */
    			J721S2_WKUP_IOPAD(0x07c, PIN_OUTPUT, 0) /* (F23) MCU_RGMII1_TD0 */
    			J721S2_WKUP_IOPAD(0x078, PIN_OUTPUT, 0) /* (G22) MCU_RGMII1_TD1 */
    			J721S2_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (E21) MCU_RGMII1_TD2 */
    			J721S2_WKUP_IOPAD(0x070, PIN_OUTPUT, 0) /* (E22) MCU_RGMII1_TD3 */
    			J721S2_WKUP_IOPAD(0x080, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */
    			J721S2_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */
    		>;
    	};
    
    	mcu_mdio_pins_default: mcu-mdio-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x09c, PIN_OUTPUT_PULLUP, 0) /* (A21) MCU_MDIO0_MDC */
    			J721S2_WKUP_IOPAD(0x098, PIN_INPUT_PULLUP, 0) /* (A22) MCU_MDIO0_MDIO */
    		>;
    	};
    
    	mcu_mcan0_pins_default: mcu-mcan0-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x0bc, PIN_INPUT_PULLUP, 0) /* (E28) MCU_MCAN0_RX */
    			J721S2_WKUP_IOPAD(0x0b8, PIN_OUTPUT_PULLUP, 0) /* (E27) MCU_MCAN0_TX */
    		>;
    	};
    
    	mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x0d0, PIN_OUTPUT, 7) 		/* (C23) WKUP_GPIO0_4 */
    			J721S2_WKUP_IOPAD(0x0d4, PIN_OUTPUT, 7) 		/* (F26) WKUP_GPIO0_5 */
    			J721S2_WKUP_IOPAD(0x0d8, PIN_INPUT_PULLUP, 7)	/* (E25) WKUP_GPIO0_6 */
    		>;
    	};
    
    	wkup_gpio1_pins_default: wkup-gpio1-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x0e0, PIN_INPUT, 7) /* (F24) WKUP_GPIO0_8 */
    			J721S2_WKUP_IOPAD(0x060, PIN_INPUT, 7) /* (C21) MCU_OSPI1_CSn1.WKUP_GPIO0_39 */
    		>;
    	};
    
    	mcu_uart1_pins_default: mcu-uart1-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x0ec, PIN_INPUT_PULLDOWN, 2) /* (F25) WKUP_GPIO0_11.MCU_UART0_RXD */
    			J721S2_WKUP_IOPAD(0x0e8, PIN_OUTPUT_PULLUP, 2) /* (F27) WKUP_GPIO0_10.MCU_UART0_TXD */
    		>;
    	};
    };
    
    &main_gpio0 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_gpio1_pins_default>;
    };
    
    &main_gpio2 {
    	status = "disabled";
    };
    
    &main_gpio4 {
    	status = "disabled";
    };
    
    &main_gpio6 {
    	status = "disabled";
    };
    
    &wkup_gpio1 {
    //	status = "disabled";
    	pinctrl-names = "default";
    	pinctrl-0 = <&wkup_gpio1_pins_default>;
    };
    
    &wkup_uart0 {
    	status = "reserved";
    };
    
    &mcu_uart0 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&mcu_uart1_pins_default>;
    };
    
    &main_uart0 {
    	status = "disabled";
    };
    
    &main_uart1 {
    	status = "disabled";
    };
    
    &main_uart2 {
    	status = "disabled";
    };
    
    &main_uart3 {
    	status = "disabled";
    };
    
    &main_uart4 {
    	status = "disabled";
    };
    
    &main_uart5 {
    	status = "disabled";
    };
    
    &main_uart6 {
    	status = "disabled";
    };
    
    &main_uart7 {
    	status = "disabled";
    };
    
    &main_uart8 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_uart8_pins_default>;
    	/* Shared with TFA on this platform */
    	power-domains = <&k3_pds 357 TI_SCI_PD_SHARED>;
    };
    
    &main_uart9 {
    	status = "disabled";
    };
    //Ming++ for spi 0 device 202200822 >>
    &main_spi0 {
        pinctrl-names = "default";
        pinctrl-0 = <&spi0_pins_default>;
    	ti,pindir-d0-out-d1-in = <1>;
        status="okay";
        spidev@0 {
           spi-max-frequency = <24000000>;
           reg = <0>;
           compatible = "linux,spidev";
    	};
    };
    //Ming++ for pwm 1 device 202200822
    //&main_ehrpwm1 {
    //    pinctrl-names = "default";
    //    pinctrl-0 = <&pwm1_pins_default>;
    //    status="okay";
    //};
    //Ming++<<
    &main_i2c0 {
    //Ethan+ >>
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_i2c0_pins_default>;
    //Ethan+ <<
    	clock-frequency = <400000>;
    
    	exp0: gpio@20 {
    		compatible = "ti,tca6416"; /*Ming++ change pca9535 to tca6416*/
    		reg = <0x20>;
    		gpio-controller;
    		#gpio-cells = <2>;
    		gpio-line-names = "CANFD1_EN", "CANFD2_EN", "CANFD3_EN",
    				  "LOCAL_CAN_STBn", "CAN_PWR_EN",
    				  "DSI3_PWR_EN",
    				  "CSI0_TX_PWDN", "CSI1_TX_PWDN",
    				  "PASS_01",
    				  "DES1_PDB", "DES2_PDB",
    				  "GPIO_PRG0_RGMII_RST",
    				  "DSI3_nRESET";
    	};
    };
    
    &main_i2c1 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_i2c1_pins_default>;
    	clock-frequency = <400000>;
    };
    
    &main_i2c2 {
    	status = "disabled";
    };
    
    &main_i2c3 {
    	status = "disabled";
    };
    
    &main_i2c4 {
    	status = "disabled";
    };
    
    &main_i2c5 {
    	status = "disabled";
    };
    
    &main_i2c6 {
    	status = "disabled";
    };
    
    &main_sdhci0 {
    	/* eMMC */
    	non-removable;
    	ti,driver-strength-ohm = <50>;
    //	disable-cqe-dcmd;
    	disable-wp;
    };
    
    &main_sdhci1 {
    	/* SD card */
    	pinctrl-0 = <&main_mmc1_pins_default>;
    	pinctrl-names = "default";
    	disable-wp;
    	ti,driver-strength-ohm = <50>;
    	vmmc-supply = <&vdd_mmc1>;
    	vqmmc-supply = <&vdd_sd_dv_alt>;
    };
    
    &mcu_cpsw {
    	pinctrl-names = "default";
    	pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default &mcu_cpsw_gpio_pins_default>;
    	reset-gpios = <&wkup_gpio0 7 GPIO_ACTIVE_LOW>;
    	status = "okay";
    };
    
    &davinci_mdio {
    	cpsw_phy0: ethernet-phy@0 {
    		reg = <0>;
    		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
    		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
    		ti,min-output-impedance;
    	};
    };
    
    &cpsw_port1 {
    	phy-mode = "rgmii-rxid";
    	phy-handle = <&cpsw_phy0>;
    	fixed-link {
    	      speed = <100>;
    	      full-duplex;
    	};
    };
    
    &main_cpsw {
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_cpsw_pins_default &main_mdio_pins_default>;
    	reset-gpios = <&exp0 12 GPIO_ACTIVE_LOW>;	/* P12 - GPIO_PRG0_RGMII_RST */	
    	status = "okay";
    };
    
    &main_cpsw_mdio {
    	main_cpsw_phy0: ethernet-phy@0 {
    		reg = <0>;
    		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
    		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
    		ti,min-output-impedance;
    	};
    };
    
    &main_cpsw_port1 {
    	phy-mode = "rgmii-rxid";
    	phy-handle = <&main_cpsw_phy0>;
    };
    
    &serdes_ln_ctrl {
    	idle-states = <J721S2_SERDES0_LANE0_PCIE1_LANE0>, <J721S2_SERDES0_LANE1_USB>,
    			<J721S2_SERDES0_LANE2_EDP_LANE2>, <J721S2_SERDES0_LANE3_EDP_LANE3>;
    };
    
    &serdes_refclk {
    	clock-frequency = <100000000>;
    };
    
    &serdes0 {
    	status = "disabled";
    	serdes0_pcie_link: phy@0 {
    		reg = <0>;
    		cdns,num-lanes = <1>;
    		#phy-cells = <0>;
    		cdns,phy-type = <PHY_TYPE_PCIE>;
    		resets = <&serdes_wiz0 1>;
    	};
    };
    
    &usb_serdes_mux {
    	idle-states = <1>; /* USB0 to SERDES lane 1 */
    };
    
    &edp_serdes_mux {
    	idle-states = <1>; /* EDP0 to SERDES lane 2/3 */
    };
    
    &usbss0 {
    	ti,vbus-divider;
    	ti,usb2-only;
    };
    
    &usb0 {
    	dr_mode = "otg";
    	maximum-speed = "high-speed";
    };
    
    &pcie1_rc {
    	status = "disabled";
    	phys = <&serdes0_pcie_link>;
    	phy-names = "pcie-phy";
    	num-lanes = <1>;
    };
    
    &pcie1_ep {
    	status = "disabled";
    	phys = <&serdes0_pcie_link>;
    	phy-names = "pcie-phy";
    	num-lanes = <1>;
    	status = "disabled";
    };
    
    &ospi1 {
    	status = "disabled";
    };
    
    &dss {
    	/*
    	 * These clock assignments are chosen to enable the following outputs:
    	 *
    	 * VP0 - DisplayPort SST
    	 * VP1 - DPI0
    	 * VP2 - DSI
    	 * VP3 - DPI1
    	 */
    
    	assigned-clocks = <&k3_clks 158 2>,
    			  <&k3_clks 158 5>,
    			  <&k3_clks 158 14>,
    			  <&k3_clks 158 18>;
    	assigned-clock-parents = <&k3_clks 158 3>,
    				 <&k3_clks 158 7>,
    				 <&k3_clks 158 16>,
    				 <&k3_clks 158 22>;
    };
    
    &dss_ports {
    	port {
    		dpi0_out: endpoint {
    			remote-endpoint = <&dp0_in>;
    		};
    	};
    };
    
    &mhdp {
    	pinctrl-names = "default";
    	pinctrl-0 = <&dp0_pins_default>;
    	cdns,no-hpd;
    };
    
    &dp0_ports {
    	#address-cells = <1>;
    	#size-cells = <0>;
    
    	port@0 {
    		reg = <0>;
    		dp0_in: endpoint {
    			remote-endpoint = <&dpi0_out>;
    		};
    	};
    
    	port@4 {
    		reg = <4>;
    		dp0_out: endpoint {
    			remote-endpoint = <&dp0_connector_in>;
    		};
    	};
    };
    
    &mcu_mcan0 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&mcu_mcan0_pins_default &mcu_mcan0_gpio_pins_default>;
    	phys = <&transceiver0>;
    };
    
    &mcu_mcan1 {
    	status = "disabled";
    };
    
    &main_mcan0 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_mcan0_pins_default>;
    	phys = <&transceiver1>;
    };
    
    &main_mcan1 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_mcan1_pins_default>;
    	phys = <&transceiver2>;
    };
    
    &main_mcan2 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_mcan2_pins_default>;
    	phys = <&transceiver3>;
    };
    
    &main_mcan3 {
    	status = "disabled";
    };
    
    &main_mcan4 {
    	status = "disabled";
    };
    
    &main_mcan5 {
    	status = "disabled";
    };
    
    &main_mcan6 {
    	status = "disabled";
    };
    
    &main_mcan7 {
    	status = "disabled";
    };
    
    &main_mcan8 {
    	status = "disabled";
    };
    
    &main_mcan9 {
    	status = "disabled";
    };
    
    &main_mcan10 {
    	status = "disabled";
    };
    
    &main_mcan11 {
    	status = "disabled";
    };
    
    &main_mcan12 {
    	status = "disabled";
    };
    
    &main_mcan13 {
    	status = "disabled";
    };
    
    &main_mcan14 {
    	status = "disabled";
    };
    
    &main_mcan15 {
    	status = "disabled";
    };
    
    &main_mcan16 {
    	status = "disabled";
    };
    
    &main_mcan17 {
    	status = "disabled";
    };
    
    

     

    Thanks,

    Ethan

  • Hi Diwakar,

    Can those files be modified to support USB3.0?

    Thanks,

    Ethan

  • Hi Ethan ,

    Can you check with these changes.

     

    // SPDX-License-Identifier: GPL-2.0
    /*
     * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
     *
     * Common Processor Board: https://www.ti.com/tool/J721EXCPXEVM
     */
    
    /dts-v1/;
    
    #include "k3-j721s2-som-p0.dtsi"
    #include <dt-bindings/net/ti-dp83867.h>
    #include <dt-bindings/phy/phy-cadence.h>
    #include <dt-bindings/phy/phy.h>
    #include <dt-bindings/mux/ti-serdes.h>
    
    / {
    	compatible = "ti,j721s2-evm", "ti,j721s2";
    	model = "Texas Instruments J721S2 EVM";
    
    	chosen {
    		stdout-path = "serial2:115200n8";
    		bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x2880000";
    	};
    
    	aliases {
    		serial2 = &main_uart8;
    		mmc0 = &main_sdhci0;
    		mmc1 = &main_sdhci1;
    		spi0 = &ospi0;
    		can0 = &mcu_mcan0;
    		can1 = &main_mcan0;
    		can2 = &main_mcan1;
    		can3 = &main_mcan2;
    		ethernet0 = &cpsw_port1;
    		ethernet1 = &main_cpsw_port1;
    	};
    
    	evm_12v0: fixedregulator-evm12v0 {
    		/* main supply */
    		compatible = "regulator-fixed";
    		regulator-name = "evm_12v0";
    		regulator-min-microvolt = <12000000>;
    		regulator-max-microvolt = <12000000>;
    		regulator-always-on;
    		regulator-boot-on;
    	};
    
    	vsys_3v3: fixedregulator-vsys3v3 {
    		/* Output of LM5140 */
    		compatible = "regulator-fixed";
    		regulator-name = "vsys_3v3";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		vin-supply = <&evm_12v0>;
    		regulator-always-on;
    		regulator-boot-on;
    	};
    
    	vsys_5v0: fixedregulator-vsys5v0 {
    		/* Output of LM5140 */
    		compatible = "regulator-fixed";
    		regulator-name = "vsys_5v0";
    		regulator-min-microvolt = <5000000>;
    		regulator-max-microvolt = <5000000>;
    		vin-supply = <&evm_12v0>;
    		regulator-always-on;
    		regulator-boot-on;
    	};
    
    	vdd_mmc1: fixedregulator-sd {
    		compatible = "regulator-fixed";
    		regulator-name = "vdd_mmc1";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		regulator-boot-on;
    		regulator-always-on;
    		enable-active-high;
    		vin-supply = <&vsys_3v3>;
    	};
    
    	vdd_sd_dv_alt: fixedregulator-sd-dv-alt {
    		compatible = "regulator-fixed";
    		regulator-name = "vdd_sd_dv_alt";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		regulator-boot-on;
    		regulator-always-on;
    		enable-active-high;
    		vin-supply = <&vsys_3v3>;
    	};
    
    	transceiver0: can-phy0 {
    		compatible = "ti,tcan1043";
    		#phy-cells = <0>;
    		max-bitrate = <5000000>;
    		standby-gpios = <&wkup_gpio0 5 GPIO_ACTIVE_LOW>;
    		//enable-gpios = <&wkup_gpio0 4 GPIO_ACTIVE_LOW>;
    		enable-gpios = <&wkup_gpio0 4 GPIO_ACTIVE_HIGH>;
    	};
    
    	transceiver1: can-phy1 {
    		compatible = "ti,tcan1043";
    		#phy-cells = <0>;
    		max-bitrate = <5000000>;
    	};
    
    	transceiver2: can-phy2 {
    		compatible = "ti,tcan1043";
    		#phy-cells = <0>;
    		max-bitrate = <5000000>;
    	};
    
    	transceiver3: can-phy3 {
    		compatible = "ti,tcan1043";
    		#phy-cells = <0>;
    		max-bitrate = <5000000>;
    	};
    
    	dp0_pwr_3v3: fixedregulator-dp0-prw {
    		compatible = "regulator-fixed";
    		regulator-name = "dp0-pwr";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		enable-active-high;
    	};
    
    	dp0: dp0-connector {
    		compatible = "dp-connector";
    		label = "DP0";
    		type = "full-size";
    		dp-pwr-supply = <&dp0_pwr_3v3>;
    
    		port {
    			dp0_connector_in: endpoint {
    				remote-endpoint = <&dp0_out>;
    			};
    		};
    	};
    
    };
    
    &main_i2c4 {
    	status = "disabled";
    };
    
    &main_pmx0 {
    	main_uart8_pins_default: main-uart8-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x038, PIN_INPUT_PULLDOWN, 11) /* (AB28) MCASP0_ACLKX.UART8_RXD */
    			J721S2_IOPAD(0x03c, PIN_OUTPUT_PULLUP, 11) /* (U27) MCASP0_AFSX.UART8_TXD */
    		>;
    	};
    //Ethan+ >>
    	main_i2c0_pins_default: main-i2c0-pins-default {
    		pinctrl-single,pins = <
    			J721E_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AH25) I2C0_SCL */
    			J721E_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AE24) I2C0_SDA */
    		>;	
    	};
    //Ethan+ <<
    	main_i2c1_pins_default: main-i2c1-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x0c4, PIN_INPUT_PULLUP, 13) /* (AB26) ECAP0_IN_APWM_OUT.I2C1_SCL */
    			J721S2_IOPAD(0x0c8, PIN_INPUT_PULLUP, 13) /* (AD28) EXT_REFCLK1.I2C1_SDA */
    		>;
    	};
    
    	main_mmc1_pins_default: main-mmc1-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */
    			J721S2_IOPAD(0x108, PIN_INPUT, 0) /* (N24) MMC1_CMD */
    			J721S2_IOPAD(0x100, PIN_INPUT, 0) /* (###) MMC1_CLKLB */
    			J721S2_IOPAD(0x0fc, PIN_INPUT, 0) /* (M23) MMC1_DAT0 */
    			J721S2_IOPAD(0x0f8, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */
    			J721S2_IOPAD(0x0f4, PIN_INPUT, 0) /* (R24) MMC1_DAT2 */
    			J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */
    			J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */
    		>;
    	};
    
    	dp0_pins_default: dp0-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x0b8, PIN_INPUT, 3) /* (AA24) MCASP1_ACLKX.DP0_HPD */
    		>;
    	};
    
    	main_cpsw_pins_default: main-cpsw-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x0b8, PIN_INPUT, 6) /* (AA24) MCASP1_ACLKX.RGMII1_RD0 */
    			J721S2_IOPAD(0x0a0, PIN_INPUT, 6) /* (AB25) MCASP0_AXR12.RGMII1_RD1 */
    			J721S2_IOPAD(0x0a4, PIN_INPUT, 6) /* (T23) MCASP0_AXR13.RGMII1_RD2 */
    			J721S2_IOPAD(0x0a8, PIN_INPUT, 6) /* (U24) MCASP0_AXR14.RGMII1_RD3 */
    			J721S2_IOPAD(0x0b0, PIN_INPUT, 6) /* (AD26) MCASP1_AXR3.RGMII1_RXC */
    			J721S2_IOPAD(0x0ac, PIN_INPUT, 6) /* (AC25) MCASP0_AXR15.RGMII1_RX_CTL */
    			J721S2_IOPAD(0x08c, PIN_OUTPUT, 6) /* (T25) MCASP0_AXR7.RGMII1_TD0 */
    			J721S2_IOPAD(0x090, PIN_OUTPUT, 6) /* (W24) MCASP0_AXR8.RGMII1_TD1 */
    			J721S2_IOPAD(0x094, PIN_OUTPUT, 6) /* (AA25) MCASP0_AXR9.RGMII1_TD2 */
    			J721S2_IOPAD(0x098, PIN_OUTPUT, 6) /* (V25) MCASP0_AXR10.RGMII1_TD3 */
    			J721S2_IOPAD(0x0b4, PIN_OUTPUT, 6) /* (U25) MCASP1_AXR4.RGMII1_TXC */
    			J721S2_IOPAD(0x09c, PIN_OUTPUT, 6) /* (T24) MCASP0_AXR11.RGMII1_TX_CTL */
    		>;
    	};
    
    	main_mdio_pins_default: main-mdio-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x0c0, PIN_OUTPUT_PULLUP, 6) /* (T28) MCASP1_AXR0.MDIO0_MDC */
    			J721S2_IOPAD(0x0bc, PIN_INPUT_PULLUP, 6) /* (V28) MCASP1_AFSX.MDIO0_MDIO */
    		>;
    	};
    
    	main_mcan0_pins_default: main-mcan0-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x068, PIN_INPUT_PULLUP, 0) /* (U28) MCAN0_RX */
    			J721S2_IOPAD(0x064, PIN_OUTPUT_PULLUP, 0) /* (W28) MCAN0_TX */
    		>;
    	};
    
    	main_mcan1_pins_default: main-mcan1-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x070, PIN_INPUT_PULLUP, 0) /* (R27) MCAN1_RX */
    			J721S2_IOPAD(0x06c, PIN_OUTPUT_PULLUP, 0) /* (V26) MCAN1_TX */
    		>;
    	};
    
    	main_mcan2_pins_default: main-mcan2-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x078, PIN_INPUT_PULLUP, 0) /* (Y25) MCAN2_RX */
    			J721S2_IOPAD(0x074, PIN_OUTPUT_PULLUP, 0) /* (R28) MCAN2_TX */
    		>;
    	};
    
    	main_gpio1_pins_default: main-gpio1-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x000, PIN_INPUT_PULLUP, 7) /* (AG24) EXTINTn.GPIO0_0 */
    			J721S2_IOPAD(0x004, PIN_INPUT, 7) /* (W25) MCAN12_TX.GPIO0_1 */
    			J721S2_IOPAD(0x008, PIN_INPUT, 7) /* (AC24) MCAN12_RX.GPIO0_2 */
    			J721S2_IOPAD(0x00c, PIN_INPUT, 7) /* (AE28) MCAN13_TX.GPIO0_3 */
    			J721S2_IOPAD(0x010, PIN_INPUT_PULLUP, 7) /* (AF28) MCAN13_RX.GPIO0_4 */
    			J721S2_IOPAD(0x014, PIN_INPUT_PULLUP, 7) /* (AD25) MCAN14_TX.GPIO0_5 */
    			J721S2_IOPAD(0x018, PIN_INPUT_PULLUP, 7) /* (W23) MCAN14_RX.GPIO0_6 */
    			J721S2_IOPAD(0x01c, PIN_INPUT_PULLUP, 7) /* (Y24) MCAN15_TX.GPIO0_7 */
    			J721S2_IOPAD(0x020, PIN_INPUT_PULLUP, 7) /* (AA23) MCAN15_RX.GPIO0_8 */
    			J721S2_IOPAD(0x024, PIN_INPUT_PULLUP, 7) /* (Y28) MCAN16_TX.GPIO0_9 */
    			J721S2_IOPAD(0x028, PIN_INPUT, 7) /* (AB24) MCAN16_RX.GPIO0_10 */
    			J721S2_IOPAD(0x02c, PIN_INPUT, 7) /* (V23) GPIO0_11 */
    			J721S2_IOPAD(0x030, PIN_OUTPUT_PULLUP, 7) /* (T26) GPIO0_12 */
    			J721S2_IOPAD(0x040, PIN_INPUT_PULLDOWN, 7) /* (AC28) MCASP0_AXR0.GPIO0_16 */
    			J721S2_IOPAD(0x044, PIN_INPUT_PULLDOWN, 7) /* (Y26) MCASP0_AXR1.GPIO0_17 */
    			J721S2_IOPAD(0x048, PIN_INPUT_PULLDOWN, 7) /* (AB27) MCASP0_AXR2.GPIO0_18 */
    			J721S2_IOPAD(0x04c, PIN_INPUT_PULLDOWN, 7) /* (V27) MCASP1_AXR1.GPIO0_19 */
    			J721S2_IOPAD(0x050, PIN_INPUT_PULLDOWN, 7) /* (W27) MCASP1_AXR2.GPIO0_20 */
    			J721S2_IOPAD(0x054, PIN_INPUT_PULLDOWN, 7) /* (Y27) MCASP2_ACLKX.GPIO0_21 */
    			J721S2_IOPAD(0x058, PIN_INPUT_PULLDOWN, 7) /* (AA27) MCASP2_AFSX.GPIO0_22 */
    			J721S2_IOPAD(0x05c, PIN_INPUT_PULLDOWN, 7) /* (AA26) MCASP2_AXR0.GPIO0_23 */
    			J721S2_IOPAD(0x07c, PIN_INPUT, 7) /* (T27) MCASP0_AXR3.GPIO0_31 */
    			J721S2_IOPAD(0x080, PIN_INPUT, 7) /* (U26) MCASP0_AXR4.GPIO0_32 */
    			J721S2_IOPAD(0x088, PIN_OUTPUT_PULLUP, 7) /* (AD27) MCASP0_AXR6.GPIO0_34 */
    			J721S2_IOPAD(0x0d0, PIN_INPUT, 7) /* (AF26) SPI0_CS1.GPIO0_52 */
    		>;
    	};
    //Ming++ for spi 0 device 202200822 >>
        spi0_pins_default: spi0-pins-default {
        	pinctrl-single,pins = <
        		J721E_IOPAD(0x0D4, PIN_OUTPUT_PULLDOWN, 0) /* (AH27) PIN_SPI0_CLK */
        		J721E_IOPAD(0x0CC, PIN_OUTPUT_PULLDOWN, 0) /* (AE27) PIN_SPI0_CS0 */
        		J721E_IOPAD(0x0D8, PIN_OUTPUT_PULLDOWN, 0) /* (AG26) PIN_SPI0_D0 */
        		J721E_IOPAD(0x0DC, PIN_INPUT_PULLDOWN, 0) /* (AH26) PIN_SPI0_D1 */
        	>;
        };
        pwm1_pins_default: pwm1-pins-default {
        	pinctrl-single,pins = <
        		J721E_IOPAD(0x060, PIN_OUTPUT_PULLDOWN, 7) /* (AC27) PIN_MCASP2_AXR1 */
         	>;
        };
    //Ming++		
    };
    
    &wkup_pmx0 {
    	mcu_cpsw_gpio_pins_default: mcu-cpsw-gpio-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x0dc, PIN_OUTPUT, 7) /* (F28) WKUP_GPIO0_7 */
    			J721S2_WKUP_IOPAD(0x0cc, PIN_INPUT, 7)  /* (C27) WKUP_GPIO0_3 */
    		>;
    	};
    
    	mcu_cpsw_pins_default: mcu-cpsw-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x094, PIN_INPUT, 0) /* (B22) MCU_RGMII1_RD0 */
    			J721S2_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (B21) MCU_RGMII1_RD1 */
    			J721S2_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C22) MCU_RGMII1_RD2 */
    			J721S2_WKUP_IOPAD(0x088, PIN_INPUT, 0) /* (D23) MCU_RGMII1_RD3 */
    			J721S2_WKUP_IOPAD(0x084, PIN_INPUT, 0) /* (D22) MCU_RGMII1_RXC */
    			J721S2_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (E23) MCU_RGMII1_RX_CTL */
    			J721S2_WKUP_IOPAD(0x07c, PIN_OUTPUT, 0) /* (F23) MCU_RGMII1_TD0 */
    			J721S2_WKUP_IOPAD(0x078, PIN_OUTPUT, 0) /* (G22) MCU_RGMII1_TD1 */
    			J721S2_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (E21) MCU_RGMII1_TD2 */
    			J721S2_WKUP_IOPAD(0x070, PIN_OUTPUT, 0) /* (E22) MCU_RGMII1_TD3 */
    			J721S2_WKUP_IOPAD(0x080, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */
    			J721S2_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */
    		>;
    	};
    
    	mcu_mdio_pins_default: mcu-mdio-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x09c, PIN_OUTPUT_PULLUP, 0) /* (A21) MCU_MDIO0_MDC */
    			J721S2_WKUP_IOPAD(0x098, PIN_INPUT_PULLUP, 0) /* (A22) MCU_MDIO0_MDIO */
    		>;
    	};
    
    	mcu_mcan0_pins_default: mcu-mcan0-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x0bc, PIN_INPUT_PULLUP, 0) /* (E28) MCU_MCAN0_RX */
    			J721S2_WKUP_IOPAD(0x0b8, PIN_OUTPUT_PULLUP, 0) /* (E27) MCU_MCAN0_TX */
    		>;
    	};
    
    	mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x0d0, PIN_OUTPUT, 7) 		/* (C23) WKUP_GPIO0_4 */
    			J721S2_WKUP_IOPAD(0x0d4, PIN_OUTPUT, 7) 		/* (F26) WKUP_GPIO0_5 */
    			J721S2_WKUP_IOPAD(0x0d8, PIN_INPUT_PULLUP, 7)	/* (E25) WKUP_GPIO0_6 */
    		>;
    	};
    
    	wkup_gpio1_pins_default: wkup-gpio1-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x0e0, PIN_INPUT, 7) /* (F24) WKUP_GPIO0_8 */
    			J721S2_WKUP_IOPAD(0x060, PIN_INPUT, 7) /* (C21) MCU_OSPI1_CSn1.WKUP_GPIO0_39 */
    		>;
    	};
    
    	mcu_uart1_pins_default: mcu-uart1-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x0ec, PIN_INPUT_PULLDOWN, 2) /* (F25) WKUP_GPIO0_11.MCU_UART0_RXD */
    			J721S2_WKUP_IOPAD(0x0e8, PIN_OUTPUT_PULLUP, 2) /* (F27) WKUP_GPIO0_10.MCU_UART0_TXD */
    		>;
    	};
    };
    
    &main_gpio0 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_gpio1_pins_default>;
    };
    
    &main_gpio2 {
    	status = "disabled";
    };
    
    &main_gpio4 {
    	status = "disabled";
    };
    
    &main_gpio6 {
    	status = "disabled";
    };
    
    &wkup_gpio1 {
    //	status = "disabled";
    	pinctrl-names = "default";
    	pinctrl-0 = <&wkup_gpio1_pins_default>;
    };
    
    &wkup_uart0 {
    	status = "reserved";
    };
    
    &mcu_uart0 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&mcu_uart1_pins_default>;
    };
    
    &main_uart0 {
    	status = "disabled";
    };
    
    &main_uart1 {
    	status = "disabled";
    };
    
    &main_uart2 {
    	status = "disabled";
    };
    
    &main_uart3 {
    	status = "disabled";
    };
    
    &main_uart4 {
    	status = "disabled";
    };
    
    &main_uart5 {
    	status = "disabled";
    };
    
    &main_uart6 {
    	status = "disabled";
    };
    
    &main_uart7 {
    	status = "disabled";
    };
    
    &main_uart8 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_uart8_pins_default>;
    	/* Shared with TFA on this platform */
    	power-domains = <&k3_pds 357 TI_SCI_PD_SHARED>;
    };
    
    &main_uart9 {
    	status = "disabled";
    };
    //Ming++ for spi 0 device 202200822 >>
    &main_spi0 {
        pinctrl-names = "default";
        pinctrl-0 = <&spi0_pins_default>;
    	ti,pindir-d0-out-d1-in = <1>;
        status="okay";
        spidev@0 {
           spi-max-frequency = <24000000>;
           reg = <0>;
           compatible = "linux,spidev";
    	};
    };
    //Ming++ for pwm 1 device 202200822
    //&main_ehrpwm1 {
    //    pinctrl-names = "default";
    //    pinctrl-0 = <&pwm1_pins_default>;
    //    status="okay";
    //};
    //Ming++<<
    &main_i2c0 {
    //Ethan+ >>
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_i2c0_pins_default>;
    //Ethan+ <<
    	clock-frequency = <400000>;
    
    	exp0: gpio@20 {
    		compatible = "ti,tca6416"; /*Ming++ change pca9535 to tca6416*/
    		reg = <0x20>;
    		gpio-controller;
    		#gpio-cells = <2>;
    		gpio-line-names = "CANFD1_EN", "CANFD2_EN", "CANFD3_EN",
    				  "LOCAL_CAN_STBn", "CAN_PWR_EN",
    				  "DSI3_PWR_EN",
    				  "CSI0_TX_PWDN", "CSI1_TX_PWDN",
    				  "PASS_01",
    				  "DES1_PDB", "DES2_PDB",
    				  "GPIO_PRG0_RGMII_RST",
    				  "DSI3_nRESET";
    	};
    };
    
    &main_i2c1 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_i2c1_pins_default>;
    	clock-frequency = <400000>;
    };
    
    &main_i2c2 {
    	status = "disabled";
    };
    
    &main_i2c3 {
    	status = "disabled";
    };
    
    &main_i2c4 {
    	status = "disabled";
    };
    
    &main_i2c5 {
    	status = "disabled";
    };
    
    &main_i2c6 {
    	status = "disabled";
    };
    
    &main_sdhci0 {
    	/* eMMC */
    	non-removable;
    	ti,driver-strength-ohm = <50>;
    //	disable-cqe-dcmd;
    	disable-wp;
    };
    
    &main_sdhci1 {
    	/* SD card */
    	pinctrl-0 = <&main_mmc1_pins_default>;
    	pinctrl-names = "default";
    	disable-wp;
    	ti,driver-strength-ohm = <50>;
    	vmmc-supply = <&vdd_mmc1>;
    	vqmmc-supply = <&vdd_sd_dv_alt>;
    };
    
    &mcu_cpsw {
    	pinctrl-names = "default";
    	pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default &mcu_cpsw_gpio_pins_default>;
    	reset-gpios = <&wkup_gpio0 7 GPIO_ACTIVE_LOW>;
    	status = "okay";
    };
    
    &davinci_mdio {
    	cpsw_phy0: ethernet-phy@0 {
    		reg = <0>;
    		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
    		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
    		ti,min-output-impedance;
    	};
    };
    
    &cpsw_port1 {
    	phy-mode = "rgmii-rxid";
    	phy-handle = <&cpsw_phy0>;
    	fixed-link {
    	      speed = <100>;
    	      full-duplex;
    	};
    };
    
    &main_cpsw {
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_cpsw_pins_default &main_mdio_pins_default>;
    	reset-gpios = <&exp0 12 GPIO_ACTIVE_LOW>;	/* P12 - GPIO_PRG0_RGMII_RST */	
    	status = "okay";
    };
    
    &main_cpsw_mdio {
    	main_cpsw_phy0: ethernet-phy@0 {
    		reg = <0>;
    		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
    		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
    		ti,min-output-impedance;
    	};
    };
    
    &main_cpsw_port1 {
    	phy-mode = "rgmii-rxid";
    	phy-handle = <&main_cpsw_phy0>;
    };
    
    &serdes_ln_ctrl {
    	idle-states = <J721S2_SERDES0_LANE0_PCIE1_LANE0>, <J721S2_SERDES0_LANE1_USB>,
    			<J721S2_SERDES0_LANE2_EDP_LANE2>, <J721S2_SERDES0_LANE3_EDP_LANE3>;
    };
    
    &serdes_refclk {
    	clock-frequency = <100000000>;
    };
    
    &serdes0 {
    	status = "disabled";
    	serdes0_pcie_link: phy@0 {
    		reg = <0>;
    		cdns,num-lanes = <1>;
    		#phy-cells = <0>;
    		cdns,phy-type = <PHY_TYPE_PCIE>;
    		resets = <&serdes_wiz0 1>;
    	};
    };
    
    &usb_serdes_mux {
    	idle-states = <1>; /* USB0 to SERDES lane 1 */
    };
    
    &edp_serdes_mux {
    	idle-states = <1>; /* EDP0 to SERDES lane 2/3 */
    };
    
    &usbss0 {
    	ti,vbus-divider;
    	ti,usb2-only;
    };
    
    &usb0 {
    	dr_mode = "otg";
    	maximum-speed = "high-speed";
    };
    
    &pcie1_rc {
    	status = "disabled";
    	phys = <&serdes0_pcie_link>;
    	phy-names = "pcie-phy";
    	num-lanes = <1>;
    };
    
    &pcie1_ep {
    	status = "disabled";
    	phys = <&serdes0_pcie_link>;
    	phy-names = "pcie-phy";
    	num-lanes = <1>;
    	status = "disabled";
    };
    
    &ospi1 {
    	status = "disabled";
    };
    
    &dss {
    	/*
    	 * These clock assignments are chosen to enable the following outputs:
    	 *
    	 * VP0 - DisplayPort SST
    	 * VP1 - DPI0
    	 * VP2 - DSI
    	 * VP3 - DPI1
    	 */
    
    	assigned-clocks = <&k3_clks 158 2>,
    			  <&k3_clks 158 5>,
    			  <&k3_clks 158 14>,
    			  <&k3_clks 158 18>;
    	assigned-clock-parents = <&k3_clks 158 3>,
    				 <&k3_clks 158 7>,
    				 <&k3_clks 158 16>,
    				 <&k3_clks 158 22>;
    };
    
    &dss_ports {
    	port {
    		dpi0_out: endpoint {
    			remote-endpoint = <&dp0_in>;
    		};
    	};
    };
    
    &mhdp {
    	pinctrl-names = "default";
    	pinctrl-0 = <&dp0_pins_default>;
    	cdns,no-hpd;
    };
    
    &dp0_ports {
    	#address-cells = <1>;
    	#size-cells = <0>;
    
    	port@0 {
    		reg = <0>;
    		dp0_in: endpoint {
    			remote-endpoint = <&dpi0_out>;
    		};
    	};
    
    	port@4 {
    		reg = <4>;
    		dp0_out: endpoint {
    			remote-endpoint = <&dp0_connector_in>;
    		};
    	};
    };
    
    &mcu_mcan0 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&mcu_mcan0_pins_default &mcu_mcan0_gpio_pins_default>;
    	phys = <&transceiver0>;
    };
    
    &mcu_mcan1 {
    	status = "disabled";
    };
    
    &main_mcan0 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_mcan0_pins_default>;
    	phys = <&transceiver1>;
    };
    
    &main_mcan1 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_mcan1_pins_default>;
    	phys = <&transceiver2>;
    };
    
    &main_mcan2 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_mcan2_pins_default>;
    	phys = <&transceiver3>;
    };
    
    &main_mcan3 {
    	status = "disabled";
    };
    
    &main_mcan4 {
    	status = "disabled";
    };
    
    &main_mcan5 {
    	status = "disabled";
    };
    
    &main_mcan6 {
    	status = "disabled";
    };
    
    &main_mcan7 {
    	status = "disabled";
    };
    
    &main_mcan8 {
    	status = "disabled";
    };
    
    &main_mcan9 {
    	status = "disabled";
    };
    
    &main_mcan10 {
    	status = "disabled";
    };
    
    &main_mcan11 {
    	status = "disabled";
    };
    
    &main_mcan12 {
    	status = "disabled";
    };
    
    &main_mcan13 {
    	status = "disabled";
    };
    
    &main_mcan14 {
    	status = "disabled";
    };
    
    &main_mcan15 {
    	status = "disabled";
    };
    
    &main_mcan16 {
    	status = "disabled";
    };
    
    &main_mcan17 {
    	status = "disabled";
    };
    ////////Changes made ///
    &main_pmx0 {
            main_usbss0_pins_default: main-usbss0-pins-default {
                    pinctrl-single,pins = <
                            J721S2_IOPAD(0x0ec, PIN_OUTPUT, 6) /* (AG25) TIMER_IO1.USB0_DRVVBUS */
                    >;
            };
    };
    &serdes0 {
            #address-cells = <1>;
            #size-cells = <0>;
            status = "okay";
            serdes0_usb_link: phy@1 {
                    reg = <1>;
                    cdns,num-lanes = <1>;
                    #phy-cells = <0>;
                    cdns,phy-type = <PHY_TYPE_USB3>;
                    resets = <&serdes_wiz0 2>;
            };
    };
    &serdes0_pcie_link {
            status = "disabled";
    };
    &usbss0 {
            pinctrl-0 = <&main_usbss0_pins_default>;
            pinctrl-names = "default";
            /delete-property/ ti,usb2-only;
    };
    
    &usb0 {
            dr_mode = "otg";
            maximum-speed = "super-speed";
            phys = <&serdes0_usb_link>;
            phy-names = "cdns3,usb3-phy";
    
    };
    

    Please share the logs after running the test .

    Regards 

    Diwakar 

  • Hi Diwakar,

    I help Ethan to test the result, still failed

    result and dmesg as follow.


    _____ _____ _ _
    | _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_
    | | _| .'| . | . | | __| _| . | | | -_| _| _|
    |__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_|
    |___| |___|

    Arago Project j721s2-evm ttyS2

    Arago 2021.09 j721s2-evm ttyS2

    j721s2-evm login: root
    root@j721s2-evm:~# root
    -sh: root: command not found
    root@j721s2-evm:~# dmesg
    [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x411fd080]
    [ 0.000000] Linux version 5.10.120-g95b90aa828 (joehsien@dell-r540) (aarch64-none-linux-gnu-gcc (GNU Toolchain for the A-profile Architecture 9.2-2019.12 (arm-9.10)) 9.2.1 20191025, GNU ld (GNU Toolchain for the A-profile Architecture 9.2-2019.12 (arm-9.10)) 2.33.1.20191209) #6 SMP PREEMPT Wed Nov 30 13:39:41 CST 2022
    [ 0.000000] Machine model: Texas Instruments J721S2 EVM
    [ 0.000000] earlycon: ns16550a0 at MMIO32 0x0000000002880000 (options '')
    [ 0.000000] printk: bootconsole [ns16550a0] enabled
    [ 0.000000] efi: UEFI not found.
    [ 0.000000] OF: reserved mem: OVERLAP DETECTED!
    vision-apps-core-heap-memory-lo@0xdf800000 (0x00000000df800000--0x00000000e3800000) overlaps with vision-apps-core-heap-memory-lo@df800000 (0x00000000df800000--0x00000000e3800000)
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a0000000, size 1 MiB
    [ 0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a0000000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a0100000, size 15 MiB
    [ 0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a0100000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a1000000, size 1 MiB
    [ 0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a1000000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a1100000, size 15 MiB
    [ 0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a1100000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a2000000, size 1 MiB
    [ 0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a2000000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a2100000, size 31 MiB
    [ 0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a2100000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a4000000, size 1 MiB
    [ 0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a4000000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a4100000, size 31 MiB
    [ 0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a4100000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a6000000, size 1 MiB
    [ 0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a6000000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a6100000, size 15 MiB
    [ 0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a6100000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a7000000, size 1 MiB
    [ 0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a7000000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a7100000, size 15 MiB
    [ 0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a7100000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a8000000, size 1 MiB
    [ 0.000000] OF: reserved mem: initialized node vision-apps-c71_1-dma-memory@a8000000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a8100000, size 31 MiB
    [ 0.000000] OF: reserved mem: initialized node vision-apps-c71_1-memory@a8100000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000aa000000, size 1 MiB
    [ 0.000000] OF: reserved mem: initialized node vision-apps-c71-dma-memory@aa000000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000aa100000, size 111 MiB
    [ 0.000000] OF: reserved mem: initialized node vision-apps-c71_0-memory@aa100000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000b2000000, size 32 MiB
    [ 0.000000] OF: reserved mem: initialized node vision-apps-rtos-ipc-memory-region@b2000000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000b4000000, size 96 MiB
    [ 0.000000] OF: reserved mem: initialized node vision-apps-dma-memory@b4000000, compatible id shared-dma-pool
    [ 0.000000] OF: reserved mem: initialized node vision_apps_shared-memories, compatible id dma-heap-carveout
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000df800000, size 64 MiB
    [ 0.000000] OF: reserved mem: initialized node vision-apps-core-heap-memory-lo@0xdf800000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000df800000, size 64 MiB
    [ 0.000000] OF: reserved mem: initialized node vision-apps-core-heap-memory-lo@df800000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000880000000, size 736 MiB
    [ 0.000000] OF: reserved mem: initialized node vision-apps-core-heap-memory-hi@880000000, compatible id shared-dma-pool
    [ 0.000000] Zone ranges:
    [ 0.000000] DMA [mem 0x0000000080000000-0x00000000ffffffff]
    [ 0.000000] DMA32 empty
    [ 0.000000] Normal [mem 0x0000000100000000-0x00000009fffeffff]
    [ 0.000000] Movable zone start for each node
    [ 0.000000] Early memory node ranges
    [ 0.000000] node 0: [mem 0x0000000080000000-0x000000009e7fffff]
    [ 0.000000] node 0: [mem 0x000000009e800000-0x00000000b0ffffff]
    [ 0.000000] node 0: [mem 0x00000000b1000000-0x00000000b1ffffff]
    [ 0.000000] node 0: [mem 0x00000000b2000000-0x00000000b9ffffff]
    [ 0.000000] node 0: [mem 0x00000000ba000000-0x00000000df7fffff]
    [ 0.000000] node 0: [mem 0x00000000df800000-0x00000000e37fffff]
    [ 0.000000] node 0: [mem 0x00000000e3800000-0x00000000fffeffff]
    [ 0.000000] node 0: [mem 0x0000000880000000-0x00000008adffffff]
    [ 0.000000] node 0: [mem 0x00000008ae000000-0x00000009fffeffff]
    [ 0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x00000009fffeffff]
    [ 0.000000] On node 0 totalpages: 131070
    [ 0.000000] DMA zone: 32 pages used for memmap
    [ 0.000000] DMA zone: 0 pages reserved
    [ 0.000000] DMA zone: 32767 pages, LIFO batch:3
    [ 0.000000] Normal zone: 96 pages used for memmap
    [ 0.000000] Normal zone: 98303 pages, LIFO batch:3
    [ 0.000000] On node 0, zone Normal: 1 pages in unavailable ranges
    [ 0.000000] cma: Failed to reserve 512 MiB
    [ 0.000000] psci: probing for conduit method from DT.
    [ 0.000000] psci: PSCIv1.1 detected in firmware.
    [ 0.000000] psci: Using standard PSCI v0.2 function IDs
    [ 0.000000] psci: Trusted OS migration not required
    [ 0.000000] psci: SMC Calling Convention v1.2
    [ 0.000000] percpu: Embedded 2 pages/cpu s50008 r8192 d72872 u131072
    [ 0.000000] pcpu-alloc: s50008 r8192 d72872 u131072 alloc=2*65536
    [ 0.000000] pcpu-alloc: [0] 0 [0] 1
    [ 0.000000] Detected PIPT I-cache on CPU0
    [ 0.000000] CPU features: detected: GIC system register CPU interface
    [ 0.000000] CPU features: detected: EL2 vector hardening
    [ 0.000000] CPU features: detected: ARM errata 1165522, 1319367, or 1530923
    [ 0.000000] CPU features: detected: Spectre-BHB
    [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 130942
    [ 0.000000] Kernel command line: console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02880000 mtdparts=47040000.spi.0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),256k(ospi.env),256k(ospi.env.backup),57088k@8m(ospi.rootfs),256k(ospi.phypattern);47034000.hyperbus:512k(hbmc.tiboot3),2m(hbmc.tispl),4m(hbmc.u-boot),256k(hbmc.env),-@8m(hbmc.rootfs) root=PARTUUID=d5e0b125-c1f4-3647-a555-8e27d13361ea rw rootfstype=ext4 rootwait
    [ 0.000000] Dentry cache hash table entries: 1048576 (order: 7, 8388608 bytes, linear)
    [ 0.000000] Inode-cache hash table entries: 524288 (order: 6, 4194304 bytes, linear)
    [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
    [ 0.000000] software IO TLB: mapped [mem 0x00000000fbff0000-0x00000000ffff0000] (64MB)
    [ 0.000000] Memory: 6412608K/8388480K available (10944K kernel code, 1360K rwdata, 4352K rodata, 1856K init, 743K bss, 1975872K reserved, 0K cma-reserved)
    [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
    [ 0.000000] rcu: Preemptible hierarchical RCU implementation.
    [ 0.000000] rcu: RCU event tracing is enabled.
    [ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=2.
    [ 0.000000] Trampoline variant of Tasks RCU enabled.
    [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
    [ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
    [ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
    [ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
    [ 0.000000] GICv3: 960 SPIs implemented
    [ 0.000000] GICv3: 0 Extended SPIs implemented
    [ 0.000000] GICv3: Distributor has no Range Selector support
    [ 0.000000] GICv3: 16 PPIs implemented
    [ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x0000000001900000
    [ 0.000000] ITS [mem 0x01820000-0x0182ffff]
    [ 0.000000] GIC: enabling workaround for ITS: Socionext Synquacer pre-ITS
    [ 0.000000] ITS@0x0000000001820000: allocated 1048576 Devices @8c0800000 (flat, esz 8, psz 64K, shr 0)
    [ 0.000000] ITS: using cache flushing for cmd queue
    [ 0.000000] GICv3: using LPI property table @0x00000008c00b0000
    [ 0.000000] GIC: using cache flushing for LPI property table
    [ 0.000000] GICv3: CPU0: using allocated LPI pending table @0x00000008c00c0000
    [ 0.000000] arch_timer: cp15 timer(s) running at 200.00MHz (phys).
    [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2e2049d3e8, max_idle_ns: 440795210634 ns
    [ 0.000002] sched_clock: 56 bits at 200MHz, resolution 5ns, wraps every 4398046511102ns
    [ 0.008360] Console: colour dummy device 80x25
    [ 0.012926] Calibrating delay loop (skipped), value calculated using timer frequency.. 400.00 BogoMIPS (lpj=800000)
    [ 0.023596] pid_max: default: 32768 minimum: 301
    [ 0.028346] LSM: Security Framework initializing
    [ 0.033102] Mount-cache hash table entries: 16384 (order: 1, 131072 bytes, linear)
    [ 0.040856] Mountpoint-cache hash table entries: 16384 (order: 1, 131072 bytes, linear)
    [ 0.050115] rcu: Hierarchical SRCU implementation.
    [ 0.055195] Platform MSI: msi-controller@1820000 domain created
    [ 0.061381] PCI/MSI: /bus@100000/interrupt-controller@1800000/msi-controller@1820000 domain created
    [ 0.070675] EFI services will not be available.
    [ 0.075441] smp: Bringing up secondary CPUs ...
    [ 0.088567] Detected PIPT I-cache on CPU1
    [ 0.088592] GICv3: CPU1: found redistributor 1 region 0:0x0000000001920000
    [ 0.088604] GICv3: CPU1: using allocated LPI pending table @0x00000008c00d0000
    [ 0.088646] CPU1: Booted secondary processor 0x0000000001 [0x411fd080]
    [ 0.088707] smp: Brought up 1 node, 2 CPUs
    [ 0.118057] SMP: Total of 2 processors activated.
    [ 0.122861] CPU features: detected: 32-bit EL0 Support
    [ 0.128116] CPU features: detected: CRC32 instructions
    [ 0.142487] CPU: All CPU(s) started at EL2
    [ 0.146693] alternatives: patching kernel code
    [ 0.151769] devtmpfs: initialized
    [ 0.158683] KASLR disabled due to lack of seed
    [ 0.163356] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
    [ 0.173324] futex hash table entries: 512 (order: -1, 32768 bytes, linear)
    [ 0.180465] pinctrl core: initialized pinctrl subsystem
    [ 0.186034] DMI not present or invalid.
    [ 0.190324] NET: Registered protocol family 16
    [ 0.195238] DMA: preallocated 1024 KiB GFP_KERNEL pool for atomic allocations
    [ 0.202727] DMA: preallocated 1024 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
    [ 0.210892] DMA: preallocated 1024 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
    [ 0.219277] thermal_sys: Registered thermal governor 'step_wise'
    [ 0.219280] thermal_sys: Registered thermal governor 'power_allocator'
    [ 0.225852] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
    [ 0.239500] ASID allocator initialised with 65536 entries
    [ 0.257540] HugeTLB registered 16.0 GiB page size, pre-allocated 0 pages
    [ 0.264397] HugeTLB registered 512 MiB page size, pre-allocated 0 pages
    [ 0.271159] HugeTLB registered 2.00 MiB page size, pre-allocated 0 pages
    [ 0.279221] cryptd: max_cpu_qlen set to 1000
    [ 0.285517] k3-chipinfo 43000014.chipid: Family:J721S2 rev:SR1.0 JTAGID[0x0bb7502f] Detected
    [ 0.294431] vsys_3v3: supplied by evm_12v0
    [ 0.298790] vsys_5v0: supplied by evm_12v0
    [ 0.303154] vdd_mmc1: supplied by vsys_3v3
    [ 0.307479] vdd_sd_dv_alt: supplied by vsys_3v3
    [ 0.312601] iommu: Default domain type: Translated
    [ 0.317723] SCSI subsystem initialized
    [ 0.321781] mc: Linux media interface: v0.10
    [ 0.326165] videodev: Linux video capture interface: v2.00
    [ 0.331797] pps_core: LinuxPPS API ver. 1 registered
    [ 0.336867] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
    [ 0.346203] PTP clock support registered
    [ 0.350221] EDAC MC: Ver: 3.0.0
    [ 0.354015] FPGA manager framework
    [ 0.357522] Advanced Linux Sound Architecture Driver Initialized.
    [ 0.364185] clocksource: Switched to clocksource arch_sys_counter
    [ 0.370610] VFS: Disk quotas dquot_6.6.0
    [ 0.374671] VFS: Dquot-cache hash table entries: 8192 (order 0, 65536 bytes)
    [ 0.384479] Carveout Heap: Exported 600 MiB at 0x00000000ba000000
    [ 0.390792] NET: Registered protocol family 2
    [ 0.395469] IP idents hash table entries: 131072 (order: 4, 1048576 bytes, linear)
    [ 0.405044] tcp_listen_portaddr_hash hash table entries: 4096 (order: 0, 65536 bytes, linear)
    [ 0.413813] TCP established hash table entries: 65536 (order: 3, 524288 bytes, linear)
    [ 0.422116] TCP bind hash table entries: 65536 (order: 4, 1048576 bytes, linear)
    [ 0.430129] TCP: Hash tables configured (established 65536 bind 65536)
    [ 0.436920] UDP hash table entries: 4096 (order: 1, 131072 bytes, linear)
    [ 0.443951] UDP-Lite hash table entries: 4096 (order: 1, 131072 bytes, linear)
    [ 0.451499] NET: Registered protocol family 1
    [ 0.456292] RPC: Registered named UNIX socket transport module.
    [ 0.462361] RPC: Registered udp transport module.
    [ 0.467165] RPC: Registered tcp transport module.
    [ 0.471969] RPC: Registered tcp NFSv4.1 backchannel transport module.
    [ 0.478553] PCI: CLS 0 bytes, default 64
    [ 0.482928] hw perfevents: enabled with armv8_cortex_a72 PMU driver, 7 counters available
    [ 0.493555] Initialise system trusted keyrings
    [ 0.498195] workingset: timestamp_bits=46 max_order=17 bucket_order=0
    [ 0.506469] squashfs: version 4.0 (2009/01/31) Phillip Lougher
    [ 0.512779] NFS: Registering the id_resolver key type
    [ 0.517973] Key type id_resolver registered
    [ 0.522244] Key type id_legacy registered
    [ 0.526366] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
    [ 0.533214] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
    [ 0.540856] 9p: Installing v9fs 9p2000 file system support
    [ 0.565303] Key type asymmetric registered
    [ 0.569491] Asymmetric key parser 'x509' registered
    [ 0.574493] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
    [ 0.582051] io scheduler mq-deadline registered
    [ 0.586677] io scheduler kyber registered
    [ 0.591907] pinctrl-single 4301c000.pinctrl: 94 pins, size 376
    [ 0.598079] pinctrl-single 11c000.pinctrl: 72 pins, size 288
    [ 0.606121] k3-ringacc 2b800000.ringacc: Failed to get MSI domain
    [ 0.612407] k3-ringacc 3c000000.ringacc: Failed to get MSI domain
    [ 0.620154] Serial: 8250/16550 driver, 10 ports, IRQ sharing enabled
    [ 0.632589] brd: module loaded
    [ 0.638694] loop: module loaded
    [ 0.642288] sysfs: cannot create duplicate filename '/devices/platform/dma_buf_phys'
    [ 0.650221] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.10.120-g95b90aa828 #6
    [ 0.657509] Hardware name: Texas Instruments J721S2 EVM (DT)
    [ 0.663287] Call trace:
    [ 0.665787] dump_backtrace+0x0/0x1a0
    [ 0.669522] show_stack+0x18/0x68
    [ 0.672906] dump_stack+0xd0/0x12c
    [ 0.676377] sysfs_warn_dup+0x60/0x80
    [ 0.680111] sysfs_create_dir_ns+0xe0/0xf8
    [ 0.684293] kobject_add_internal+0x98/0x288
    [ 0.688650] kobject_add+0x94/0x100
    [ 0.692209] device_add+0xe0/0x740
    [ 0.695678] platform_device_add+0x100/0x238
    [ 0.700035] platform_device_register_full+0xcc/0x150
    [ 0.705194] dma_buf_phys_init+0x6c/0x9c
    [ 0.709195] do_one_initcall+0x54/0x1b8
    [ 0.713109] kernel_init_freeable+0x220/0x2a0
    [ 0.717556] kernel_init+0x14/0x114
    [ 0.721112] ret_from_fork+0x10/0x34
    [ 0.724786] kobject_add_internal failed for dma_buf_phys with -EEXIST, don't try to register things with the same name in the same directory.
    [ 0.737982] megasas: 07.714.04.00-rc1
    [ 0.743404] tun: Universal TUN/TAP device driver, 1.6
    [ 0.748834] igbvf: Intel(R) Gigabit Virtual Function Network Driver
    [ 0.755242] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
    [ 0.761310] sky2: driver version 1.30
    [ 0.765657] VFIO - User Level meta-driver version: 0.3
    [ 0.771412] i2c /dev entries driver
    [ 0.775604] sdhci: Secure Digital Host Controller Interface driver
    [ 0.781931] sdhci: Copyright(c) Pierre Ossman
    [ 0.786636] sdhci-pltfm: SDHCI platform and OF driver helper
    [ 0.792884] ledtrig-cpu: registered to indicate activity on CPUs
    [ 0.799211] SMCCC: SOC_ID: ARCH_SOC_ID not implemented, skipping ....
    [ 0.806326] optee: probing for conduit method.
    [ 0.810891] optee: revision 3.17 (15a746d2)
    [ 0.811025] optee: dynamic shared memory is enabled
    [ 0.825846] optee: initialized driver
    [ 0.830728] NET: Registered protocol family 17
    [ 0.835347] 9pnet: Installing 9P2000 support
    [ 0.839750] Key type dns_resolver registered
    [ 0.844228] Loading compiled-in X.509 certificates
    [ 0.851821] k3-ringacc 2b800000.ringacc: Failed to get MSI domain
    [ 0.858225] k3-ringacc 3c000000.ringacc: Failed to get MSI domain
    [ 0.866200] ti-sci 44083000.system-controller: ABI: 3.1 (firmware rev 0x0008 '8.4.1--v08.04.01 (Jolly Jellyfi')
    [ 0.895038] omap_i2c 42120000.i2c: bus 0 rev0.12 at 100 kHz
    [ 0.901188] omap_i2c 40b00000.i2c: bus 1 rev0.12 at 100 kHz
    [ 0.907265] omap_i2c 40b10000.i2c: bus 2 rev0.12 at 100 kHz
    [ 0.913674] pca953x 3-0020: supply vcc not found, using dummy regulator
    [ 0.920495] pca953x 3-0020: using no AI
    [ 0.948672] omap_i2c 2000000.i2c: bus 3 rev0.12 at 400 kHz
    [ 0.955025] ti-sci-intr 42200000.interrupt-controller: Interrupt Router 125 domain created
    [ 0.963596] ti-sci-intr bus@100000:interrupt-controller@a00000: Interrupt Router 148 domain created
    [ 0.972928] ti-sci-intr 310e0000.interrupt-controller: Interrupt Router 227 domain created
    [ 0.981514] ti-sci-inta 33d00000.msi-controller: Interrupt Aggregator domain 265 created
    [ 0.990474] k3-ringacc 2b800000.ringacc: Ring Accelerator probed rings:286, gp-rings[96,20] sci-dev-id:272
    [ 1.000361] k3-ringacc 2b800000.ringacc: dma-ring-reset-quirk: disabled
    [ 1.007120] k3-ringacc 2b800000.ringacc: RA Proxy rev. 66349100, num_proxies:64
    [ 1.015907] k3-ringacc 3c000000.ringacc: Ring Accelerator probed rings:1024, gp-rings[878,128] sci-dev-id:259
    [ 1.026063] k3-ringacc 3c000000.ringacc: dma-ring-reset-quirk: disabled
    [ 1.032822] k3-ringacc 3c000000.ringacc: RA Proxy rev. 66349100, num_proxies:64
    [ 1.040521] omap8250 40a00000.serial: failed to get alias
    [ 1.046578] printk: console [ttyS2] disabled
    [ 1.050983] 2880000.serial: ttyS2 at MMIO 0x2880000 (irq = 22, base_baud = 3000000) is a 8250
    [ 1.059727] printk: console [ttyS2] enabled
    [ 1.068164] printk: bootconsole [ns16550a0] disabled
    [ 1.080702] davinci_mdio 46000f00.mdio: Configuring MDIO in manual mode
    [ 1.124187] davinci_mdio 46000f00.mdio: davinci mdio revision 9.7, bus freq 1000000
    [ 1.133903] dp83812_read_straps: Strap is 0x280
    [ 1.367039] davinci_mdio 46000f00.mdio: phy[0]: device 46000f00.mdio:00, driver TI DP83TC812CS2.0
    [ 1.375941] am65-cpsw-nuss 46000000.ethernet: initializing am65 cpsw nuss version 0x6BA02102, cpsw version 0x6BA82102 Ports: 2 quirks:00000000
    [ 1.389694] davinci_mdio c200f00.mdio: Configuring MDIO in manual mode
    [ 1.436188] davinci_mdio c200f00.mdio: davinci mdio revision 9.7, bus freq 1000000
    [ 1.445157] davinci_mdio c200f00.mdio: phy[0]: device c200f00.mdio:00, driver TI DP83867
    [ 1.453279] am65-cpsw-nuss c200000.ethernet: initializing am65 cpsw nuss version 0x6BA02102, cpsw version 0x6BA82102 Ports: 2 quirks:00000000
    [ 1.467042] am65-cpts 310d0000.cpts: CPTS ver 0x4e8a010c, freq:200000000, add_val:4 pps:0
    [ 1.576661] mmc0: CQHCI version 5.10
    [ 1.580958] mmc1: CQHCI version 5.10
    [ 1.585717] davinci_gpio 42100000.gpio: IRQ index 0 not found
    [ 1.591471] davinci_gpio 42100000.gpio: error -ENXIO: IRQ not populated
    [ 1.599993] omap-mailbox 31f80000.mailbox: omap mailbox rev 0x66fca100
    [ 1.606833] omap-mailbox 31f81000.mailbox: omap mailbox rev 0x66fca100
    [ 1.613642] omap-mailbox 31f82000.mailbox: omap mailbox rev 0x66fca100
    [ 1.620461] omap-mailbox 31f84000.mailbox: omap mailbox rev 0x66fca100
    [ 1.621223] mmc0: SDHCI controller on 4f80000.mmc [4f80000.mmc] using ADMA 64-bit
    [ 1.634469] mmc1: SDHCI controller on 4fb0000.mmc [4fb0000.mmc] using ADMA 64-bit
    [ 1.642400] ti-udma 285c0000.dma-controller: Channels: 26 (tchan: 13, rchan: 13, gp-rflow: 8)
    [ 1.652291] ti-udma 31150000.dma-controller: Channels: 48 (tchan: 24, rchan: 24, gp-rflow: 16)
    [ 1.663768] spi-nor spi0.0: unrecognized JEDEC id bytes: 2c 5b 19 10 41 00
    [ 1.670668] spi-nor: probe of spi0.0 failed with error -2
    [ 1.676829] davinci_mdio 46000f00.mdio: Configuring MDIO in manual mode
    [ 1.720191] davinci_mdio 46000f00.mdio: davinci mdio revision 9.7, bus freq 1000000
    [ 1.720611] mmc0: Command Queue Engine enabled
    [ 1.729947] dp83812_read_straps: Strap is 0x280
    [ 1.732360] mmc0: new HS200 MMC card at address 0001
    [ 1.742125] mmcblk0: mmc0:0001 S0J59X 119 GiB
    [ 1.746689] mmcblk0boot0: mmc0:0001 S0J59X partition 1 31.5 MiB
    [ 1.752781] mmcblk0boot1: mmc0:0001 S0J59X partition 2 31.5 MiB
    [ 1.758855] mmcblk0rpmb: mmc0:0001 S0J59X partition 3 4.00 MiB, chardev (237:0)
    [ 1.768071] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
    [ 1.965553] davinci_mdio 46000f00.mdio: phy[0]: device 46000f00.mdio:00, driver TI DP83TC812CS2.0
    [ 1.974472] am65-cpsw-nuss 46000000.ethernet: initializing am65 cpsw nuss version 0x6BA02102, cpsw version 0x6BA82102 Ports: 2 quirks:00000000
    [ 1.987768] am65-cpsw-nuss 46000000.ethernet: set new flow-id-base 48
    [ 1.994580] am65-cpsw-nuss 46000000.ethernet: initialized cpsw ale version 1.4
    [ 2.001792] am65-cpsw-nuss 46000000.ethernet: ALE Table size 64
    [ 2.008203] am65-cpsw-nuss 46000000.ethernet: CPTS ver 0x4e8a010b, freq:500000000, add_val:1 pps:0
    [ 2.018685] davinci_mdio c200f00.mdio: Configuring MDIO in manual mode
    [ 2.064189] davinci_mdio c200f00.mdio: davinci mdio revision 9.7, bus freq 1000000
    [ 2.073179] davinci_mdio c200f00.mdio: phy[0]: device c200f00.mdio:00, driver TI DP83867
    [ 2.081304] am65-cpsw-nuss c200000.ethernet: initializing am65 cpsw nuss version 0x6BA02102, cpsw version 0x6BA82102 Ports: 2 quirks:00000000
    [ 2.094570] am65-cpsw-nuss c200000.ethernet: set new flow-id-base 82
    [ 2.101328] am65-cpsw-nuss c200000.ethernet: Use random MAC address
    [ 2.107594] am65-cpsw-nuss c200000.ethernet: initialized cpsw ale version 1.4
    [ 2.114722] am65-cpsw-nuss c200000.ethernet: ALE Table size 64
    [ 2.120956] am65-cpsw-nuss c200000.ethernet: CPTS ver 0x4e8a010b, freq:200000000, add_val:4 pps:0
    [ 2.130970] debugfs: Directory 'pd:276' with parent 'pm_genpd' already present!
    [ 2.138756] debugfs: Directory 'pd:154' with parent 'pm_genpd' already present!
    [ 2.150654] ALSA device list:
    [ 2.153624] No soundcards found.
    [ 2.175514] EXT4-fs (mmcblk0p3): recovery complete
    [ 2.180912] EXT4-fs (mmcblk0p3): mounted filesystem with ordered data mode. Opts: (null)
    [ 2.189022] VFS: Mounted root (ext4 filesystem) on device 179:3.
    [ 2.195443] devtmpfs: mounted
    [ 2.198713] Freeing unused kernel memory: 1856K
    [ 2.203286] Run /sbin/init as init process
    [ 2.207411] with arguments:
    [ 2.207414] /sbin/init
    [ 2.207415] with environment:
    [ 2.207418] HOME=/
    [ 2.207419] TERM=linux
    [ 2.263212] systemd[1]: System time before build time, advancing clock.
    [ 2.290953] NET: Registered protocol family 10
    [ 2.295967] Segment Routing with IPv6
    [ 2.308548] systemd[1]: systemd 244.5+ running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR -SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT -GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN2 -IDN -PCRE2 default-hierarchy=hybrid)
    [ 2.330366] systemd[1]: Detected architecture arm64.
    [ 2.364535] systemd[1]: Set hostname to <j721s2-evm>.
    [ 2.487090] systemd[1]: Configuration file /etc/systemd/system/systemd-otoapp-init.service is marked executable. Please remove executable permission bits. Proceeding anyway.
    [ 2.514673] systemd[1]: Configuration file /etc/systemd/system/rc.local.timer is marked executable. Please remove executable permission bits. Proceeding anyway.
    [ 2.533338] systemd[1]: Configuration file /etc/systemd/system/rc.local.service is marked executable. Please remove executable permission bits. Proceeding anyway.
    [ 2.553777] systemd[1]: Configuration file /etc/systemd/system/lighttpd.service is marked executable. Please remove executable permission bits. Proceeding anyway.
    [ 2.570743] systemd[1]: /lib/systemd/system/docker.socket:6: ListenStream= references a path below legacy directory /var/run/, updating /var/run/docker.sock \xe2\x86\x92 /run/docker.sock; please update the unit file accordingly.
    [ 2.619987] systemd[1]: Configuration file /etc/systemd/system/mount-ab-part.service is marked executable. Please remove executable permission bits. Proceeding anyway.
    [ 2.639209] random: systemd: uninitialized urandom read (16 bytes read)
    [ 2.645978] systemd[1]: system-getty.slice: unit configures an IP firewall, but the local system does not support BPF/cgroup firewalling.
    [ 2.658311] systemd[1]: (This warning is only shown for the first unit using IP firewalling.)
    [ 2.668437] systemd[1]: Created slice system-getty.slice.
    [ 2.688289] random: systemd: uninitialized urandom read (16 bytes read)
    [ 2.695653] systemd[1]: Created slice system-serial\x2dgetty.slice.
    [ 2.716264] random: systemd: uninitialized urandom read (16 bytes read)
    [ 2.723513] systemd[1]: Created slice User and Session Slice.
    [ 2.744408] systemd[1]: Started Dispatch Password Requests to Console Directory Watch.
    [ 2.768324] systemd[1]: Started Forward Password Requests to Wall Directory Watch.
    [ 2.792311] systemd[1]: Reached target Paths.
    [ 2.808254] systemd[1]: Reached target Remote File Systems.
    [ 2.828235] systemd[1]: Reached target Slices.
    [ 2.844252] systemd[1]: Reached target Swap.
    [ 2.863482] systemd[1]: Listening on RPCbind Server Activation Socket.
    [ 2.884289] systemd[1]: Reached target RPC Port Mapper.
    [ 2.906225] systemd[1]: Listening on Process Core Dump Socket.
    [ 2.928401] systemd[1]: Listening on initctl Compatibility Named Pipe.
    [ 2.960081] systemd[1]: Condition check resulted in Journal Audit Socket being skipped.
    [ 2.968486] systemd[1]: Listening on Journal Socket (/dev/log).
    [ 2.988522] systemd[1]: Listening on Journal Socket.
    [ 3.004541] systemd[1]: Listening on Network Service Netlink Socket.
    [ 3.028451] systemd[1]: Listening on udev Control Socket.
    [ 3.048373] systemd[1]: Listening on udev Kernel Socket.
    [ 3.070924] systemd[1]: Mounting Huge Pages File System...
    [ 3.091281] systemd[1]: Mounting POSIX Message Queue File System...
    [ 3.115632] systemd[1]: Mounting Kernel Debug File System...
    [ 3.137592] systemd[1]: Mounting Temporary Directory (/tmp)...
    [ 3.155368] systemd[1]: Starting Create list of static device nodes for the current kernel...
    [ 3.182853] systemd[1]: Starting ab partition setup...
    [ 3.203657] systemd[1]: Starting RPC Bind...
    [ 3.220466] systemd[1]: Condition check resulted in File System Check on Root Device being skipped.
    [ 3.236239] systemd[1]: Starting Journal Service...
    [ 3.261037] systemd[1]: Starting Load Kernel Modules...
    [ 3.278950] systemd[1]: Starting Remount Root and Kernel File Systems...
    [ 3.293419] EXT4-fs (mmcblk0p1): recovery complete
    [ 3.295215] EXT4-fs (mmcblk0p3): re-mounted. Opts: (null)
    [ 3.307252] systemd[1]: Starting udev Coldplug all Devices...
    [ 3.312428] EXT4-fs (mmcblk0p1): mounted filesystem with ordered data mode. Opts: (null)
    [ 3.340112] systemd[1]: Started RPC Bind.
    [ 3.356698] systemd[1]: Started Journal Service.
    [ 3.361617] EXT4-fs (mmcblk0p5): recovery complete
    [ 3.367315] EXT4-fs (mmcblk0p5): mounted filesystem with ordered data mode. Opts: (null)
    [ 3.402958] EXT4-fs (mmcblk0p7): recovery complete
    [ 3.408360] EXT4-fs (mmcblk0p7): mounted filesystem with ordered data mode. Opts: (null)
    [ 3.431039] EXT4-fs (mmcblk0p10): recovery complete
    [ 3.435945] EXT4-fs (mmcblk0p10): mounted filesystem with ordered data mode. Opts: (null)
    [ 3.463207] EXT4-fs (mmcblk0p12): recovery complete
    [ 3.468205] EXT4-fs (mmcblk0p12): mounted filesystem with ordered data mode. Opts: (null)
    [ 3.603029] systemd-journald[167]: Received client request to flush runtime journal.
    [ 3.736707] urandom_read_iter: 57 callbacks suppressed
    [ 3.736711] random: systemd: uninitialized urandom read (16 bytes read)
    [ 3.764276] random: systemd: uninitialized urandom read (16 bytes read)
    [ 3.777314] random: systemd-journal: uninitialized urandom read (16 bytes read)
    [ 4.213550] CAN device driver interface
    [ 4.254129] pvrsrvkm: disagrees about version of symbol module_layout
    [ 4.274781] k3-dsp-rproc 64800000.dsp: assigned reserved memory node vision-apps-c71-dma-memory@aa000000
    [ 4.288061] wave5: module is from the staging directory, the quality is unknown, you have been warned.
    [ 4.435390] pvrsrvkm: disagrees about version of symbol module_layout
    [ 4.474571] k3-dsp-rproc 64800000.dsp: configured DSP for IPC-only mode
    [ 4.483221] pinctrl-single 11c000.pinctrl: pin PIN46 already requested by c200000.ethernet; cannot claim for a000000.dp-bridge
    [ 4.496594] vdec 4210000.video-codec: sram daddr: 0x70020000, size: 0x1f800
    [ 4.524596] platform 41000000.r5f: R5F core may have been powered on by a different host, programmed state (0) != actual state (1)
    [ 4.596320] remoteproc remoteproc0: 64800000.dsp is available
    [ 4.677002] vdec 4210000.video-codec: enum product_id : 00000000
    [ 4.694934] remoteproc remoteproc0: attaching to 64800000.dsp
    [ 4.701770] pinctrl-single 11c000.pinctrl: pin-46 (a000000.dp-bridge) status -22
    [ 4.747685] platform 41000000.r5f: configured R5F for IPC-only mode
    [ 4.824740] vdec 4210000.video-codec: fw_version : 00000000(r240897)
    [ 4.857074] remoteproc remoteproc0: unsupported resource 65538
    [ 4.888879] pinctrl-single 11c000.pinctrl: could not request pin 46 (PIN46) from group dp0-pins-default on device pinctrl-single
    [ 4.915477] platform 41000000.r5f: assigned reserved memory node vision-apps-r5f-dma-memory@a0000000
    [ 4.962723] k3-dsp-rproc 64800000.dsp: DSP initialized in IPC-only mode
    [ 5.084407] remoteproc remoteproc1: 41000000.r5f is available
    [ 5.091452] remoteproc0#vdev0buffer: assigned reserved memory node vision-apps-c71-dma-memory@aa000000
    [ 5.108526] cdns-mhdp8546 a000000.dp-bridge: Error applying setting, reverse things back
    [ 5.142976] remoteproc remoteproc1: attaching to 41000000.r5f
    [ 5.195279] cdns-mhdp8546: probe of a000000.dp-bridge failed with error -22
    [ 5.205604] virtio_rpmsg_bus virtio0: rpmsg host is online
    [ 5.211162] virtio_rpmsg_bus virtio0: creating channel rpmsg_chrdev addr 0xd
    [ 5.238155] m_can_platform 40528000.can: m_can device registered (irq=19, version=32)
    [ 5.239446] platform 41000000.r5f: R5F core initialized in IPC-only mode
    [ 5.252511] m_can_platform 2701000.can: m_can device registered (irq=30, version=32)
    [ 5.266442] m_can_platform 2711000.can: m_can device registered (irq=32, version=32)
    [ 5.278400] m_can_platform 2721000.can: m_can device registered (irq=34, version=32)
    [ 5.343339] urandom_read_iter: 21 callbacks suppressed
    [ 5.343343] random: systemd: uninitialized urandom read (16 bytes read)
    [ 5.355819] random: systemd: uninitialized urandom read (16 bytes read)
    [ 5.362555] random: systemd: uninitialized urandom read (16 bytes read)
    [ 5.372088] remoteproc1#vdev0buffer: assigned reserved memory node vision-apps-r5f-dma-memory@a0000000
    [ 5.381885] virtio_rpmsg_bus virtio1: rpmsg host is online
    [ 5.387465] remoteproc1#vdev0buffer: registered virtio1 (type 7)
    [ 5.393989] remoteproc remoteproc1: remote processor 41000000.r5f is now attached
    [ 5.401613] virtio_rpmsg_bus virtio1: creating channel ti.ipc4.ping-pong addr 0xd
    [ 5.411071] virtio_rpmsg_bus virtio1: creating channel rpmsg_chrdev addr 0xe
    [ 5.418684] remoteproc0#vdev0buffer: registered virtio0 (type 7)
    [ 5.426186] platform 5c00000.r5f: configured R5F for IPC-only mode
    [ 5.434217] platform 5c00000.r5f: assigned reserved memory node vision-apps-r5f-dma-memory@a2000000
    [ 5.443341] remoteproc remoteproc0: remote processor 64800000.dsp is now attached
    [ 5.451181] remoteproc remoteproc2: 5c00000.r5f is available
    [ 5.457347] k3-dsp-rproc 65800000.dsp: assigned reserved memory node vision-apps-c71_1-dma-memory@a8000000
    [ 5.467118] remoteproc remoteproc2: attaching to 5c00000.r5f
    [ 5.473730] k3-dsp-rproc 65800000.dsp: configured DSP for IPC-only mode
    [ 5.480848] platform 5c00000.r5f: R5F core initialized in IPC-only mode
    [ 5.487577] remoteproc remoteproc3: 65800000.dsp is available
    [ 5.523051] remoteproc2#vdev0buffer: assigned reserved memory node vision-apps-r5f-dma-memory@a2000000
    [ 5.561367] remoteproc remoteproc3: attaching to 65800000.dsp
    [ 5.568807] remoteproc remoteproc3: unsupported resource 65538
    [ 5.575247] k3-dsp-rproc 65800000.dsp: DSP initialized in IPC-only mode
    [ 5.581953] remoteproc3#vdev0buffer: assigned reserved memory node vision-apps-c71_1-dma-memory@a8000000
    [ 5.591898] virtio_rpmsg_bus virtio2: rpmsg host is online
    [ 5.597481] virtio_rpmsg_bus virtio2: creating channel rpmsg_chrdev addr 0xd
    [ 5.605722] virtio_rpmsg_bus virtio3: rpmsg host is online
    [ 5.611783] remoteproc2#vdev0buffer: registered virtio3 (type 7)
    [ 5.618042] virtio_rpmsg_bus virtio3: creating channel rpmsg_chrdev addr 0xd
    [ 5.626090] remoteproc remoteproc2: remote processor 5c00000.r5f is now attached
    [ 5.635515] platform 5d00000.r5f: configured R5F for IPC-only mode
    [ 5.786022] remoteproc3#vdev0buffer: registered virtio2 (type 7)
    [ 5.846088] platform 5d00000.r5f: assigned reserved memory node vision-apps-r5f-dma-memory@a4000000
    [ 5.898142] remoteproc remoteproc3: remote processor 65800000.dsp is now attached
    [ 5.969097] remoteproc remoteproc4: 5d00000.r5f is available
    [ 6.044210] random: crng init done
    [ 6.047611] random: 5 urandom warning(s) missed due to ratelimiting
    [ 6.061624] remoteproc remoteproc4: attaching to 5d00000.r5f
    [ 6.110354] platform 5d00000.r5f: R5F core initialized in IPC-only mode
    [ 6.167523] remoteproc4#vdev0buffer: assigned reserved memory node vision-apps-r5f-dma-memory@a4000000
    [ 6.268776] virtio_rpmsg_bus virtio4: rpmsg host is online
    [ 6.277652] virtio_rpmsg_bus virtio4: creating channel rpmsg_chrdev addr 0xd
    [ 6.284907] virtio_rpmsg_bus virtio4: creating channel rpmsg_chrdev addr 0x15
    [ 6.298593] virtio_rpmsg_bus virtio0: creating channel rpmsg_chrdev addr 0x15
    [ 6.305863] virtio_rpmsg_bus virtio0: creating channel ti.ipc4.ping-pong addr 0xe
    [ 6.320340] virtio_rpmsg_bus virtio2: creating channel rpmsg_chrdev addr 0x15
    [ 6.331263] virtio_rpmsg_bus virtio2: creating channel ti.ipc4.ping-pong addr 0xe
    [ 6.338896] virtio_rpmsg_bus virtio3: creating channel rpmsg_chrdev addr 0x15
    [ 6.382092] remoteproc4#vdev0buffer: registered virtio4 (type 7)
    [ 6.410556] remoteproc remoteproc4: remote processor 5d00000.r5f is now attached
    [ 6.459696] platform 5e00000.r5f: configured R5F for remoteproc mode
    [ 6.516351] platform 5e00000.r5f: assigned reserved memory node vision-apps-r5f-dma-memory@a6000000
    [ 6.536529] remoteproc remoteproc5: 5e00000.r5f is available
    [ 6.552831] remoteproc remoteproc5: Direct firmware load for j721s2-main-r5f1_0-fw failed with error -2
    [ 6.553163] platform 5f00000.r5f: configured R5F for remoteproc mode
    [ 6.563707] remoteproc remoteproc5: powering up 5e00000.r5f
    [ 6.577736] remoteproc remoteproc5: Direct firmware load for j721s2-main-r5f1_0-fw failed with error -2
    [ 6.600236] remoteproc remoteproc5: request_firmware failed: -2
    [ 6.606770] virtio_rpmsg_bus virtio4: creating channel ti.ipc4.ping-pong addr 0xe
    [ 6.653015] platform 5f00000.r5f: assigned reserved memory node vision-apps-r5f-dma-memory@a7000000
    [ 6.749921] remoteproc remoteproc6: 5f00000.r5f is available
    [ 6.807318] remoteproc remoteproc6: Direct firmware load for j721s2-main-r5f1_1-fw failed with error -2
    [ 6.819856] remoteproc remoteproc6: powering up 5f00000.r5f
    [ 6.831096] remoteproc remoteproc6: Direct firmware load for j721s2-main-r5f1_1-fw failed with error -2
    [ 6.842768] remoteproc remoteproc6: request_firmware failed: -2
    [ 6.862074] virtio_rpmsg_bus virtio3: creating channel ti.ipc4.ping-pong addr 0xe
    [ 7.117214] usbcore: registered new interface driver usbfs
    [ 7.125640] usbcore: registered new interface driver hub
    [ 7.156748] usbcore: registered new device driver usb
    [ 7.798832] pvrsrvkm: disagrees about version of symbol module_layout
    [ 7.904541] Bluetooth: Core ver 2.22
    [ 7.908208] NET: Registered protocol family 31
    [ 7.919041] Bluetooth: HCI device and connection manager initialized
    [ 7.930834] Bluetooth: HCI socket layer initialized
    [ 7.939980] Bluetooth: L2CAP socket layer initialized
    [ 7.949764] Bluetooth: SCO socket layer initialized
    [ 8.081694] am65-cpsw-nuss c200000.ethernet eth1: PHY [c200f00.mdio:00] driver [TI DP83867] (irq=POLL)
    [ 8.092473] am65-cpsw-nuss c200000.ethernet eth1: configuring for phy/rgmii-rxid link mode
    [ 8.129013] am65-cpsw-nuss 46000000.ethernet eth0: configuring for fixed/rgmii-rxid link mode
    [ 8.167175] am65-cpsw-nuss 46000000.ethernet eth0: Link is Up - 100Mbps/Full - flow control off
    [ 8.845484] pvrsrvkm: disagrees about version of symbol module_layout
    [ 11.162049] am65-cpsw-nuss c200000.ethernet eth1: Link is Up - 100Mbps/Full - flow control rx/tx
    [ 11.170844] IPv6: ADDRCONF(NETDEV_CHANGE): eth1: link becomes ready
    [ 13.075714] pvrsrvkm: loading out-of-tree module taints kernel.
    [ 13.124738] PVR_K: 1090: Read BVNC 36.53.104.796 from HW device registers
    [ 13.144226] PVR_K: 1090: RGX Device registered BVNC 36.53.104.796 with 1 core in the system
    [ 13.170214] [drm] Initialized pvr 1.15.6133109 20170530 for 4e20000000.gpu on minor 0
    root@j721s2-evm:~#
    root@j721s2-evm:~#
    root@j721s2-evm:~#
    root@j721s2-evm:~#
    root@j721s2-evm:

  • Hi Pierre

    I could see the above test is on EVM 

    root@j721s2-evm:

    with which patch  you have tested it for the EVM?

    This is the patch for the EVM  https://git.ti.com/cgit/ti-linux-kernel/ti-upstream-tools/tree/arch/arm64/boot/dts/ti/k3-j721s2-usb3.dtso?h=ti-linux-5.10.y

    Also you need to make your dp switch configuration like this 

    https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/psdk_rtos/docs/user_guide/evm_setup_j721e.html#ospi-boot-mode-j721e-es1-x-versions-only

    please make sure that switch 3  =0 and switch 4=1.

    The logs which you shared in that i am seeing this 

    Regards 

    Diwakar

  • Hi DiwaKar,

    We are boot from emmc , MCU3 need to switch up (1)

                                                 MCU[2~9]

    Mode                SW8[1:8]     SW9[1:8]   SW3[1:10]

    OSPI                0000_0000 0100_0000 0xxx_xxxx_xx

    eMMC (boot0) 1000_0000 0100_0000 xxxx_xxxx_xx

    eMMC(user)    1000_0000 0000_0000 xxxx_xxxx_xx

    MMCSD          1000_0010 0000_0000 xxxx_xxxx_xx

    NO BOOT       1000_1000 0111_0000 xxxx_xxxx_xx

    UART              0000_0000 0111_0000 xxxx_xxxx_xx

    DFU                1000_0000 0010_0000 0101_0010_10

  • Hi Pierre

    We are boot from emmc , MCU3 need to switch up (1)

    If you are saying you use emmc boot mode  then 

    image is just for the reference of the dp switch which you need to change as i suggested the configuration 

    https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/psdk_rtos/docs/user_guide/evm_setup_j721e.html#ospi-boot-mode-j721e-es1-x-versions-only

    switch 3  =0 and switch 4=1. 

    No need to change the boot mode .

    steps to check 

    1. Apply the patch https://git.ti.com/cgit/ti-linux-kernel/ti-upstream-tools/tree/arch/arm64/boot/dts/ti/k3-j721s2-usb3.dtso?h=ti-linux-5.10.y 

    2.Change the DP switch configuration just change switch 3  =0 and switch 4=1. 

    and check

    Regards 

    Diwakar 

  • Hi DiwaKar,

    I rellay don't know what you mean about switch 3  =0 and switch 4=1.

    If you mean USB switch , our USB mode is already fixed to host mode (hardware design) , we do not have that switch.(SW3[1:10])

    We only have MCU BOOT (SW9[1:8]  ) and SYS BOOT (SW8[1:8] ).

  • Hi Pierre 

    If you mean USB switch , our USB mode is already fixed to host mode (hardware design) , we do not have that switch.(SW3[1:10])

    We only have MCU BOOT (SW9[1:8]  ) and SYS BOOT (SW8[1:8] ).

    These logs are tested on EVM ?

    [ 11.170844] IPv6: ADDRCONF(NETDEV_CHANGE): eth1: link becomes ready
    [ 13.075714] pvrsrvkm: loading out-of-tree module taints kernel.
    [ 13.124738] PVR_K: 1090: Read BVNC 36.53.104.796 from HW device registers
    [ 13.144226] PVR_K: 1090: RGX Device registered BVNC 36.53.104.796 with 1 core in the system
    [ 13.170214] [drm] Initialized pvr 1.15.6133109 20170530 for 4e20000000.gpu on minor 0
    root@j721s2-evm:~#
    root@j721s2-evm:~#
    root@j721s2-evm:~#
    root@j721s2-evm:~#
    root@j721s2-evm:

    I could see root@j721s2-evm: is this is your custom board ?

    If Yes i am not seeing failure logs related to usb 

    [ 7.117214] usbcore: registered new interface driver usbfs
    [ 7.125640] usbcore: registered new interface driver hub
    [ 7.156748] usbcore: registered new device driver usb

    Did you connected the usb can you share the logs after connecting the usb please share the final changes which you did for testing usb .

    Regards 

    Diwakar 

  • Hi Diwakar,

    Yes, it's our customer board.

    We add and follow your device tree.

    We test our usb 3.0 device, connect and  it's show nothing.

    remove back to old deivce tree, usb 2.0 ok

  • Hi Pierre,

    We test our usb 3.0 device, connect and  it's show nothing.

    Can you share the dmesg logs to check what went wrong also share the final changes which you did in dtsi. for the usb.

    Regards 

    Diwakar

  • dmesg is above that I post before don't change anything.

    Our device tree as follow

    7065.devicetree.txt
    // SPDX-License-Identifier: GPL-2.0
    /*
     * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
     *
     * Common Processor Board: https://www.ti.com/tool/J721EXCPXEVM
     */
    
    /dts-v1/;
    
    #include "k3-j721s2-som-p0.dtsi"
    #include <dt-bindings/net/ti-dp83867.h>
    #include <dt-bindings/phy/phy-cadence.h>
    #include <dt-bindings/phy/phy.h>
    #include <dt-bindings/mux/ti-serdes.h>
    
    / {
    	compatible = "ti,j721s2-evm", "ti,j721s2";
    	model = "Texas Instruments J721S2 EVM";
    
    	chosen {
    		stdout-path = "serial2:115200n8";
    		bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x2880000";
    	};
    
    	aliases {
    		serial2 = &main_uart8;
    		mmc0 = &main_sdhci0;
    		mmc1 = &main_sdhci1;
    		spi0 = &ospi0;
    		can0 = &mcu_mcan0;
    		can1 = &main_mcan0;
    		can2 = &main_mcan1;
    		can3 = &main_mcan2;
    		ethernet0 = &cpsw_port1;
    		ethernet1 = &main_cpsw_port1;
    	};
    
    	evm_12v0: fixedregulator-evm12v0 {
    		/* main supply */
    		compatible = "regulator-fixed";
    		regulator-name = "evm_12v0";
    		regulator-min-microvolt = <12000000>;
    		regulator-max-microvolt = <12000000>;
    		regulator-always-on;
    		regulator-boot-on;
    	};
    
    	vsys_3v3: fixedregulator-vsys3v3 {
    		/* Output of LM5140 */
    		compatible = "regulator-fixed";
    		regulator-name = "vsys_3v3";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		vin-supply = <&evm_12v0>;
    		regulator-always-on;
    		regulator-boot-on;
    	};
    
    	vsys_5v0: fixedregulator-vsys5v0 {
    		/* Output of LM5140 */
    		compatible = "regulator-fixed";
    		regulator-name = "vsys_5v0";
    		regulator-min-microvolt = <5000000>;
    		regulator-max-microvolt = <5000000>;
    		vin-supply = <&evm_12v0>;
    		regulator-always-on;
    		regulator-boot-on;
    	};
    
    	vdd_mmc1: fixedregulator-sd {
    		compatible = "regulator-fixed";
    		regulator-name = "vdd_mmc1";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		regulator-boot-on;
    		regulator-always-on;
    		enable-active-high;
    		vin-supply = <&vsys_3v3>;
    	};
    
    	vdd_sd_dv_alt: fixedregulator-sd-dv-alt {
    		compatible = "regulator-fixed";
    		regulator-name = "vdd_sd_dv_alt";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		regulator-boot-on;
    		regulator-always-on;
    		enable-active-high;
    		vin-supply = <&vsys_3v3>;
    	};
    
    	transceiver0: can-phy0 {
    		compatible = "ti,tcan1043";
    		#phy-cells = <0>;
    		max-bitrate = <5000000>;
    		standby-gpios = <&wkup_gpio0 5 GPIO_ACTIVE_LOW>;
    		//enable-gpios = <&wkup_gpio0 4 GPIO_ACTIVE_LOW>;
    		enable-gpios = <&wkup_gpio0 4 GPIO_ACTIVE_HIGH>;
    	};
    
    	transceiver1: can-phy1 {
    		compatible = "ti,tcan1043";
    		#phy-cells = <0>;
    		max-bitrate = <5000000>;
    	};
    
    	transceiver2: can-phy2 {
    		compatible = "ti,tcan1043";
    		#phy-cells = <0>;
    		max-bitrate = <5000000>;
    	};
    
    	transceiver3: can-phy3 {
    		compatible = "ti,tcan1043";
    		#phy-cells = <0>;
    		max-bitrate = <5000000>;
    	};
    
    	dp0_pwr_3v3: fixedregulator-dp0-prw {
    		compatible = "regulator-fixed";
    		regulator-name = "dp0-pwr";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		enable-active-high;
    	};
    
    	dp0: dp0-connector {
    		compatible = "dp-connector";
    		label = "DP0";
    		type = "full-size";
    		dp-pwr-supply = <&dp0_pwr_3v3>;
    
    		port {
    			dp0_connector_in: endpoint {
    				remote-endpoint = <&dp0_out>;
    			};
    		};
    	};
    
    };
    
    &main_i2c4 {
    	status = "disabled";
    };
    
    &main_pmx0 {
    	main_uart8_pins_default: main-uart8-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x038, PIN_INPUT_PULLDOWN, 11) /* (AB28) MCASP0_ACLKX.UART8_RXD */
    			J721S2_IOPAD(0x03c, PIN_OUTPUT_PULLUP, 11) /* (U27) MCASP0_AFSX.UART8_TXD */
    		>;
    	};
    //Ethan+ >>
    	main_i2c0_pins_default: main-i2c0-pins-default {
    		pinctrl-single,pins = <
    			J721E_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AH25) I2C0_SCL */
    			J721E_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AE24) I2C0_SDA */
    		>;	
    	};
    //Ethan+ <<
    	main_i2c1_pins_default: main-i2c1-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x0c4, PIN_INPUT_PULLUP, 13) /* (AB26) ECAP0_IN_APWM_OUT.I2C1_SCL */
    			J721S2_IOPAD(0x0c8, PIN_INPUT_PULLUP, 13) /* (AD28) EXT_REFCLK1.I2C1_SDA */
    		>;
    	};
    
    	main_mmc1_pins_default: main-mmc1-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */
    			J721S2_IOPAD(0x108, PIN_INPUT, 0) /* (N24) MMC1_CMD */
    			J721S2_IOPAD(0x100, PIN_INPUT, 0) /* (###) MMC1_CLKLB */
    			J721S2_IOPAD(0x0fc, PIN_INPUT, 0) /* (M23) MMC1_DAT0 */
    			J721S2_IOPAD(0x0f8, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */
    			J721S2_IOPAD(0x0f4, PIN_INPUT, 0) /* (R24) MMC1_DAT2 */
    			J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */
    			J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */
    		>;
    	};
    
    	dp0_pins_default: dp0-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x0b8, PIN_INPUT, 3) /* (AA24) MCASP1_ACLKX.DP0_HPD */
    		>;
    	};
    
    	main_cpsw_pins_default: main-cpsw-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x0b8, PIN_INPUT, 6) /* (AA24) MCASP1_ACLKX.RGMII1_RD0 */
    			J721S2_IOPAD(0x0a0, PIN_INPUT, 6) /* (AB25) MCASP0_AXR12.RGMII1_RD1 */
    			J721S2_IOPAD(0x0a4, PIN_INPUT, 6) /* (T23) MCASP0_AXR13.RGMII1_RD2 */
    			J721S2_IOPAD(0x0a8, PIN_INPUT, 6) /* (U24) MCASP0_AXR14.RGMII1_RD3 */
    			J721S2_IOPAD(0x0b0, PIN_INPUT, 6) /* (AD26) MCASP1_AXR3.RGMII1_RXC */
    			J721S2_IOPAD(0x0ac, PIN_INPUT, 6) /* (AC25) MCASP0_AXR15.RGMII1_RX_CTL */
    			J721S2_IOPAD(0x08c, PIN_OUTPUT, 6) /* (T25) MCASP0_AXR7.RGMII1_TD0 */
    			J721S2_IOPAD(0x090, PIN_OUTPUT, 6) /* (W24) MCASP0_AXR8.RGMII1_TD1 */
    			J721S2_IOPAD(0x094, PIN_OUTPUT, 6) /* (AA25) MCASP0_AXR9.RGMII1_TD2 */
    			J721S2_IOPAD(0x098, PIN_OUTPUT, 6) /* (V25) MCASP0_AXR10.RGMII1_TD3 */
    			J721S2_IOPAD(0x0b4, PIN_OUTPUT, 6) /* (U25) MCASP1_AXR4.RGMII1_TXC */
    			J721S2_IOPAD(0x09c, PIN_OUTPUT, 6) /* (T24) MCASP0_AXR11.RGMII1_TX_CTL */
    		>;
    	};
    
    	main_mdio_pins_default: main-mdio-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x0c0, PIN_OUTPUT_PULLUP, 6) /* (T28) MCASP1_AXR0.MDIO0_MDC */
    			J721S2_IOPAD(0x0bc, PIN_INPUT_PULLUP, 6) /* (V28) MCASP1_AFSX.MDIO0_MDIO */
    		>;
    	};
    
    	main_mcan0_pins_default: main-mcan0-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x068, PIN_INPUT_PULLUP, 0) /* (U28) MCAN0_RX */
    			J721S2_IOPAD(0x064, PIN_OUTPUT_PULLUP, 0) /* (W28) MCAN0_TX */
    		>;
    	};
    
    	main_mcan1_pins_default: main-mcan1-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x070, PIN_INPUT_PULLUP, 0) /* (R27) MCAN1_RX */
    			J721S2_IOPAD(0x06c, PIN_OUTPUT_PULLUP, 0) /* (V26) MCAN1_TX */
    		>;
    	};
    
    	main_mcan2_pins_default: main-mcan2-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x078, PIN_INPUT_PULLUP, 0) /* (Y25) MCAN2_RX */
    			J721S2_IOPAD(0x074, PIN_OUTPUT_PULLUP, 0) /* (R28) MCAN2_TX */
    		>;
    	};
    
    	main_gpio1_pins_default: main-gpio1-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x000, PIN_INPUT_PULLUP, 7) /* (AG24) EXTINTn.GPIO0_0 */
    			J721S2_IOPAD(0x004, PIN_INPUT, 7) /* (W25) MCAN12_TX.GPIO0_1 */
    			J721S2_IOPAD(0x008, PIN_INPUT, 7) /* (AC24) MCAN12_RX.GPIO0_2 */
    			J721S2_IOPAD(0x00c, PIN_INPUT, 7) /* (AE28) MCAN13_TX.GPIO0_3 */
    			J721S2_IOPAD(0x010, PIN_INPUT_PULLUP, 7) /* (AF28) MCAN13_RX.GPIO0_4 */
    			J721S2_IOPAD(0x014, PIN_INPUT_PULLUP, 7) /* (AD25) MCAN14_TX.GPIO0_5 */
    			J721S2_IOPAD(0x018, PIN_INPUT_PULLUP, 7) /* (W23) MCAN14_RX.GPIO0_6 */
    			J721S2_IOPAD(0x01c, PIN_INPUT_PULLUP, 7) /* (Y24) MCAN15_TX.GPIO0_7 */
    			J721S2_IOPAD(0x020, PIN_INPUT_PULLUP, 7) /* (AA23) MCAN15_RX.GPIO0_8 */
    			J721S2_IOPAD(0x024, PIN_INPUT_PULLUP, 7) /* (Y28) MCAN16_TX.GPIO0_9 */
    			J721S2_IOPAD(0x028, PIN_INPUT, 7) /* (AB24) MCAN16_RX.GPIO0_10 */
    			J721S2_IOPAD(0x02c, PIN_INPUT, 7) /* (V23) GPIO0_11 */
    			J721S2_IOPAD(0x030, PIN_OUTPUT_PULLUP, 7) /* (T26) GPIO0_12 */
    			J721S2_IOPAD(0x040, PIN_INPUT_PULLDOWN, 7) /* (AC28) MCASP0_AXR0.GPIO0_16 */
    			J721S2_IOPAD(0x044, PIN_INPUT_PULLDOWN, 7) /* (Y26) MCASP0_AXR1.GPIO0_17 */
    			J721S2_IOPAD(0x048, PIN_INPUT_PULLDOWN, 7) /* (AB27) MCASP0_AXR2.GPIO0_18 */
    			J721S2_IOPAD(0x04c, PIN_INPUT_PULLDOWN, 7) /* (V27) MCASP1_AXR1.GPIO0_19 */
    			J721S2_IOPAD(0x050, PIN_INPUT_PULLDOWN, 7) /* (W27) MCASP1_AXR2.GPIO0_20 */
    			J721S2_IOPAD(0x054, PIN_INPUT_PULLDOWN, 7) /* (Y27) MCASP2_ACLKX.GPIO0_21 */
    			J721S2_IOPAD(0x058, PIN_INPUT_PULLDOWN, 7) /* (AA27) MCASP2_AFSX.GPIO0_22 */
    			J721S2_IOPAD(0x05c, PIN_INPUT_PULLDOWN, 7) /* (AA26) MCASP2_AXR0.GPIO0_23 */
    			J721S2_IOPAD(0x07c, PIN_INPUT, 7) /* (T27) MCASP0_AXR3.GPIO0_31 */
    			J721S2_IOPAD(0x080, PIN_INPUT, 7) /* (U26) MCASP0_AXR4.GPIO0_32 */
    			J721S2_IOPAD(0x088, PIN_OUTPUT_PULLUP, 7) /* (AD27) MCASP0_AXR6.GPIO0_34 */
    			J721S2_IOPAD(0x0d0, PIN_INPUT, 7) /* (AF26) SPI0_CS1.GPIO0_52 */
    		>;
    	};
    //Ming++ for spi 0 device 202200822 >>
        spi0_pins_default: spi0-pins-default {
        	pinctrl-single,pins = <
        		J721E_IOPAD(0x0D4, PIN_OUTPUT_PULLDOWN, 0) /* (AH27) PIN_SPI0_CLK */
        		J721E_IOPAD(0x0CC, PIN_OUTPUT_PULLDOWN, 0) /* (AE27) PIN_SPI0_CS0 */
        		J721E_IOPAD(0x0D8, PIN_OUTPUT_PULLDOWN, 0) /* (AG26) PIN_SPI0_D0 */
        		J721E_IOPAD(0x0DC, PIN_INPUT_PULLDOWN, 0) /* (AH26) PIN_SPI0_D1 */
        	>;
        };
        pwm1_pins_default: pwm1-pins-default {
        	pinctrl-single,pins = <
        		J721E_IOPAD(0x060, PIN_OUTPUT_PULLDOWN, 7) /* (AC27) PIN_MCASP2_AXR1 */
         	>;
        };
    //Ming++		
    };
    
    &wkup_pmx0 {
    	mcu_cpsw_gpio_pins_default: mcu-cpsw-gpio-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x0dc, PIN_OUTPUT, 7) /* (F28) WKUP_GPIO0_7 */
    			J721S2_WKUP_IOPAD(0x0cc, PIN_INPUT, 7)  /* (C27) WKUP_GPIO0_3 */
    		>;
    	};
    
    	mcu_cpsw_pins_default: mcu-cpsw-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x094, PIN_INPUT, 0) /* (B22) MCU_RGMII1_RD0 */
    			J721S2_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (B21) MCU_RGMII1_RD1 */
    			J721S2_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C22) MCU_RGMII1_RD2 */
    			J721S2_WKUP_IOPAD(0x088, PIN_INPUT, 0) /* (D23) MCU_RGMII1_RD3 */
    			J721S2_WKUP_IOPAD(0x084, PIN_INPUT, 0) /* (D22) MCU_RGMII1_RXC */
    			J721S2_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (E23) MCU_RGMII1_RX_CTL */
    			J721S2_WKUP_IOPAD(0x07c, PIN_OUTPUT, 0) /* (F23) MCU_RGMII1_TD0 */
    			J721S2_WKUP_IOPAD(0x078, PIN_OUTPUT, 0) /* (G22) MCU_RGMII1_TD1 */
    			J721S2_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (E21) MCU_RGMII1_TD2 */
    			J721S2_WKUP_IOPAD(0x070, PIN_OUTPUT, 0) /* (E22) MCU_RGMII1_TD3 */
    			J721S2_WKUP_IOPAD(0x080, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */
    			J721S2_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */
    		>;
    	};
    
    	mcu_mdio_pins_default: mcu-mdio-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x09c, PIN_OUTPUT_PULLUP, 0) /* (A21) MCU_MDIO0_MDC */
    			J721S2_WKUP_IOPAD(0x098, PIN_INPUT_PULLUP, 0) /* (A22) MCU_MDIO0_MDIO */
    		>;
    	};
    
    	mcu_mcan0_pins_default: mcu-mcan0-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x0bc, PIN_INPUT_PULLUP, 0) /* (E28) MCU_MCAN0_RX */
    			J721S2_WKUP_IOPAD(0x0b8, PIN_OUTPUT_PULLUP, 0) /* (E27) MCU_MCAN0_TX */
    		>;
    	};
    
    	mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x0d0, PIN_OUTPUT, 7) 		/* (C23) WKUP_GPIO0_4 */
    			J721S2_WKUP_IOPAD(0x0d4, PIN_OUTPUT, 7) 		/* (F26) WKUP_GPIO0_5 */
    			J721S2_WKUP_IOPAD(0x0d8, PIN_INPUT_PULLUP, 7)	/* (E25) WKUP_GPIO0_6 */
    		>;
    	};
    
    	wkup_gpio1_pins_default: wkup-gpio1-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x0e0, PIN_INPUT, 7) /* (F24) WKUP_GPIO0_8 */
    			J721S2_WKUP_IOPAD(0x060, PIN_INPUT, 7) /* (C21) MCU_OSPI1_CSn1.WKUP_GPIO0_39 */
    		>;
    	};
    
    	mcu_uart1_pins_default: mcu-uart1-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x0ec, PIN_INPUT_PULLDOWN, 2) /* (F25) WKUP_GPIO0_11.MCU_UART0_RXD */
    			J721S2_WKUP_IOPAD(0x0e8, PIN_OUTPUT_PULLUP, 2) /* (F27) WKUP_GPIO0_10.MCU_UART0_TXD */
    		>;
    	};
    };
    
    &main_gpio0 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_gpio1_pins_default>;
    };
    
    &main_gpio2 {
    	status = "disabled";
    };
    
    &main_gpio4 {
    	status = "disabled";
    };
    
    &main_gpio6 {
    	status = "disabled";
    };
    
    &wkup_gpio1 {
    //	status = "disabled";
    	pinctrl-names = "default";
    	pinctrl-0 = <&wkup_gpio1_pins_default>;
    };
    
    &wkup_uart0 {
    	status = "reserved";
    };
    
    &mcu_uart0 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&mcu_uart1_pins_default>;
    };
    
    &main_uart0 {
    	status = "disabled";
    };
    
    &main_uart1 {
    	status = "disabled";
    };
    
    &main_uart2 {
    	status = "disabled";
    };
    
    &main_uart3 {
    	status = "disabled";
    };
    
    &main_uart4 {
    	status = "disabled";
    };
    
    &main_uart5 {
    	status = "disabled";
    };
    
    &main_uart6 {
    	status = "disabled";
    };
    
    &main_uart7 {
    	status = "disabled";
    };
    
    &main_uart8 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_uart8_pins_default>;
    	/* Shared with TFA on this platform */
    	power-domains = <&k3_pds 357 TI_SCI_PD_SHARED>;
    };
    
    &main_uart9 {
    	status = "disabled";
    };
    //Ming++ for spi 0 device 202200822 >>
    &main_spi0 {
        pinctrl-names = "default";
        pinctrl-0 = <&spi0_pins_default>;
    	ti,pindir-d0-out-d1-in = <1>;
        status="okay";
        spidev@0 {
           spi-max-frequency = <24000000>;
           reg = <0>;
           compatible = "linux,spidev";
    	};
    };
    //Ming++ for pwm 1 device 202200822
    //&main_ehrpwm1 {
    //    pinctrl-names = "default";
    //    pinctrl-0 = <&pwm1_pins_default>;
    //    status="okay";
    //};
    //Ming++<<
    &main_i2c0 {
    //Ethan+ >>
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_i2c0_pins_default>;
    //Ethan+ <<
    	clock-frequency = <400000>;
    
    	exp0: gpio@20 {
    		compatible = "ti,tca6416"; /*Ming++ change pca9535 to tca6416*/
    		reg = <0x20>;
    		gpio-controller;
    		#gpio-cells = <2>;
    		gpio-line-names = "CANFD1_EN", "CANFD2_EN", "CANFD3_EN",
    				  "LOCAL_CAN_STBn", "CAN_PWR_EN",
    				  "DSI3_PWR_EN",
    				  "CSI0_TX_PWDN", "CSI1_TX_PWDN",
    				  "PASS_01",
    				  "DES1_PDB", "DES2_PDB",
    				  "GPIO_PRG0_RGMII_RST",
    				  "DSI3_nRESET";
    	};
    };
    
    &main_i2c1 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_i2c1_pins_default>;
    	clock-frequency = <400000>;
    };
    
    &main_i2c2 {
    	status = "disabled";
    };
    
    &main_i2c3 {
    	status = "disabled";
    };
    
    &main_i2c4 {
    	status = "disabled";
    };
    
    &main_i2c5 {
    	status = "disabled";
    };
    
    &main_i2c6 {
    	status = "disabled";
    };
    
    &main_sdhci0 {
    	/* eMMC */
    	non-removable;
    	ti,driver-strength-ohm = <50>;
    //	disable-cqe-dcmd;
    	disable-wp;
    };
    
    &main_sdhci1 {
    	/* SD card */
    	pinctrl-0 = <&main_mmc1_pins_default>;
    	pinctrl-names = "default";
    	disable-wp;
    	ti,driver-strength-ohm = <50>;
    	vmmc-supply = <&vdd_mmc1>;
    	vqmmc-supply = <&vdd_sd_dv_alt>;
    };
    
    &mcu_cpsw {
    	pinctrl-names = "default";
    	pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default &mcu_cpsw_gpio_pins_default>;
    	reset-gpios = <&wkup_gpio0 7 GPIO_ACTIVE_LOW>;
    	status = "okay";
    };
    
    &davinci_mdio {
    	cpsw_phy0: ethernet-phy@0 {
    		reg = <0>;
    		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
    		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
    		ti,min-output-impedance;
    	};
    };
    
    &cpsw_port1 {
    	phy-mode = "rgmii-rxid";
    	phy-handle = <&cpsw_phy0>;
    	fixed-link {
    	      speed = <100>;
    	      full-duplex;
    	};
    };
    
    &main_cpsw {
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_cpsw_pins_default &main_mdio_pins_default>;
    	reset-gpios = <&exp0 12 GPIO_ACTIVE_LOW>;	/* P12 - GPIO_PRG0_RGMII_RST */	
    	status = "okay";
    };
    
    &main_cpsw_mdio {
    	main_cpsw_phy0: ethernet-phy@0 {
    		reg = <0>;
    		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
    		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
    		ti,min-output-impedance;
    	};
    };
    
    &main_cpsw_port1 {
    	phy-mode = "rgmii-rxid";
    	phy-handle = <&main_cpsw_phy0>;
    };
    
    &serdes_ln_ctrl {
    	idle-states = <J721S2_SERDES0_LANE0_PCIE1_LANE0>, <J721S2_SERDES0_LANE1_USB>,
    			<J721S2_SERDES0_LANE2_EDP_LANE2>, <J721S2_SERDES0_LANE3_EDP_LANE3>;
    };
    
    &serdes_refclk {
    	clock-frequency = <100000000>;
    };
    
    &serdes0 {
    //	status = "disabled";
        #address-cells = <1>;
        #size-cells = <0>;
        status = "okay";
        serdes0_usb_link: phy@1 {
                reg = <1>;
                cdns,num-lanes = <1>;
                #phy-cells = <0>;
                cdns,phy-type = <PHY_TYPE_USB3>;
                resets = <&serdes_wiz0 2>;
        };
    	serdes0_pcie_link: phy@0 {
    		reg = <0>;
    		cdns,num-lanes = <1>;
    		#phy-cells = <0>;
    		cdns,phy-type = <PHY_TYPE_PCIE>;
    		resets = <&serdes_wiz0 1>;
    	};
    };
    
    &usb_serdes_mux {
    	idle-states = <1>; /* USB0 to SERDES lane 1 */
    };
    
    &edp_serdes_mux {
    	idle-states = <1>; /* EDP0 to SERDES lane 2/3 */
    };
    
    
    &usb0 {
    //	dr_mode = "otg";
    //	maximum-speed = "high-speed";
        dr_mode = "host";
        maximum-speed = "super-speed";
        phys = <&serdes0_usb_link>;
        phy-names = "cdns3,usb3-phy";
    };
    &serdes0_pcie_link {
        status = "disabled";
    };
    
    &pcie1_rc {
    	status = "disabled";
    //	phys = <&serdes0_pcie_link>;
    //	phy-names = "pcie-phy";
    //	num-lanes = <1>;
    };
    
    &pcie1_ep {
    	status = "disabled";
    	phys = <&serdes0_pcie_link>;
    	phy-names = "pcie-phy";
    	num-lanes = <1>;
    	status = "disabled";
    };
    
    &ospi1 {
    	status = "disabled";
    };
    
    &dss {
    	/*
    	 * These clock assignments are chosen to enable the following outputs:
    	 *
    	 * VP0 - DisplayPort SST
    	 * VP1 - DPI0
    	 * VP2 - DSI
    	 * VP3 - DPI1
    	 */
    
    	assigned-clocks = <&k3_clks 158 2>,
    			  <&k3_clks 158 5>,
    			  <&k3_clks 158 14>,
    			  <&k3_clks 158 18>;
    	assigned-clock-parents = <&k3_clks 158 3>,
    				 <&k3_clks 158 7>,
    				 <&k3_clks 158 16>,
    				 <&k3_clks 158 22>;
    };
    
    &dss_ports {
    	port {
    		dpi0_out: endpoint {
    			remote-endpoint = <&dp0_in>;
    		};
    	};
    };
    
    &mhdp {
    	pinctrl-names = "default";
    	pinctrl-0 = <&dp0_pins_default>;
    	cdns,no-hpd;
    };
    
    &dp0_ports {
    	#address-cells = <1>;
    	#size-cells = <0>;
    
    	port@0 {
    		reg = <0>;
    		dp0_in: endpoint {
    			remote-endpoint = <&dpi0_out>;
    		};
    	};
    
    	port@4 {
    		reg = <4>;
    		dp0_out: endpoint {
    			remote-endpoint = <&dp0_connector_in>;
    		};
    	};
    };
    
    &mcu_mcan0 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&mcu_mcan0_pins_default &mcu_mcan0_gpio_pins_default>;
    	phys = <&transceiver0>;
    };
    
    &mcu_mcan1 {
    	status = "disabled";
    };
    
    &main_mcan0 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_mcan0_pins_default>;
    	phys = <&transceiver1>;
    };
    
    &main_mcan1 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_mcan1_pins_default>;
    	phys = <&transceiver2>;
    };
    
    &main_mcan2 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_mcan2_pins_default>;
    	phys = <&transceiver3>;
    };
    
    &main_mcan3 {
    	status = "disabled";
    };
    
    &main_mcan4 {
    	status = "disabled";
    };
    
    &main_mcan5 {
    	status = "disabled";
    };
    
    &main_mcan6 {
    	status = "disabled";
    };
    
    &main_mcan7 {
    	status = "disabled";
    };
    
    &main_mcan8 {
    	status = "disabled";
    };
    
    &main_mcan9 {
    	status = "disabled";
    };
    
    &main_mcan10 {
    	status = "disabled";
    };
    
    &main_mcan11 {
    	status = "disabled";
    };
    
    &main_mcan12 {
    	status = "disabled";
    };
    
    &main_mcan13 {
    	status = "disabled";
    };
    
    &main_mcan14 {
    	status = "disabled";
    };
    
    &main_mcan15 {
    	status = "disabled";
    };
    
    &main_mcan16 {
    	status = "disabled";
    };
    
    &main_mcan17 {
    	status = "disabled";
    };
    
    
     

  • Hi Pierre,

    Did you applied USBSS related changes i am not seeing those changes in the above file 

    Also that is strange that you are not getting any log after connecting the usb 

    Can you check whether your serdes0 is getting configured or not i am doubting that.

    Regards

    Diwakar 

  • Hi Diwakar,

    Thanks for  you help .
    I add this line , then the usb 3.0 is ok right now.
    &usbss0 {
        ti,usb2-only;
    };
    I remove the usb2-only cause this issue.
  • Sorry I test some usb 3.0 is failed , some is ok

    Need too checked more usb 3.0 device... @@

  • Sorry

    It's my mistake.

    I test usb is 2.0, not 3.0

    2.0 is ok , but 3.0 still failed

  • My new dmesg as follow

    新文字文件 (2).txt
    I_8
    [C7x_1 ]    120.668351 s: | I | default |  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
    [C7x_1 ]    120.668366 s: | I | default | APP: OpenVX Target kernel init ... !!!
    [C7x_1 ]    120.668495 s: | I | default | APP: OpenVX Target kernel init ... Done !!!
    [C7x_1 ]    120.668510 s: | I | default | APP: Init ... Done !!!
    [C7x_1 ]    120.668522 s: | I | default | APP: Run ... !!!
    [C7x_1 ]    120.668532 s: | I | default | IPC: Starting echo test ...
    [C7x_1 ]    120.668644 s: | I | default | APP: Run ... Done !!!
    [C7x_1 ]    120.669805 s: | I | default | IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C7X_1[s] C7X_2[P]
    [C7x_1 ]    120.681079 s: | I | default | IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C7X_1[s] C7X_2[P]
    [C7x_1 ]    121.251890 s: | I | default | IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C7X_1[s] C7X_2[P]
    [C7x_2 ]    112.754133 s: | I | default | CIO: Init ... Done !!!
    [C7x_2 ]    112.754150 s: | I | default | ### CPU Frequency = 1000000000 Hz
    [C7x_2 ]    112.754164 s: | I | default | APP>>: Init ... !!!
    [C7x_2 ]    112.754175 s: | I | default | SCICLIENT: Init ... !!!
    [C7x_2 ]    112.754297 s: | I | default | SCICLIENT: DMSC FW version [8.4.1--v08.04.01 (Jolly Jellyfi]
    [C7x_2 ]    112.754314 s: | I | default | SCICLIENT: DMSC FW revision 0x8
    [C7x_2 ]    112.754326 s: | I | default | SCICLIENT: DMSC FW ABI revision 3.1
    [C7x_2 ]    112.754339 s: | I | default | SCICLIENT: Init ... Done !!!
    [C7x_2 ]    112.754351 s: | I | default | UDMA: Init ... !!!
    [C7x_2 ]    112.755266 s: | I | default | UDMA: Init ... Done !!!
    [C7x_2 ]    112.755280 s: | I | default | MEM: Init ... !!!
    [C7x_2 ]    112.755293 s: | I | default | MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ 100000000 of size 16777216 bytes !!!
    [C7x_2 ]    112.755315 s: | I | default | MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 65800000 of size 458752 bytes !!!
    [C7x_2 ]    112.755335 s: | I | default | MEM: Created heap (L1_MEM, id=3, flags=0x00000001) @ 65e00000 of size 16384 bytes !!!
    [C7x_2 ]    112.755355 s: | I | default | MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ 101000000 of size 67108864 bytes !!!
    [C7x_2 ]    112.755375 s: | I | default | MEM: Init ... Done !!!
    [C7x_2 ]    112.755385 s: | I | default | IPC: Init ... !!!
    [C7x_2 ]    112.755401 s: | I | default | IPC: 5 CPUs participating in IPC !!!
    [C7x_2 ]    112.755418 s: | I | default | IPC: Waiting for HLOS to be ready ... !!!
    [C7x_2 ]    119.484997 s: | I | default | IPC: HLOS is ready !!!
    [C7x_2 ]    119.486710 s: | I | default | IPC: Init ... Done !!!
    [C7x_2 ]    119.486727 s: | I | default | APP: Syncing with 4 CPUs ... !!!
    [C7x_2 ]    120.667523 s: | I | default | APP: Syncing with 4 CPUs ... Done !!!
    [C7x_2 ]    120.667542 s: | I | default | REMOTE_SERVICE: Init ... !!!
    [C7x_2 ]    120.667659 s: | I | default | REMOTE_SERVICE: Init ... Done !!!
    [C7x_2 ]    120.667682 s: | I | default |  VX_ZONE_INIT:Enabled
    [C7x_2 ]    120.667694 s: | I | default |  VX_ZONE_ERROR:Enabled
    [C7x_2 ]    120.667707 s: | I | default |  VX_ZONE_WARNING:Enabled
    [C7x_2 ]    120.668189 s: | I | default |  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP-1
    [C7x_2 ]    120.668212 s: | I | default |  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
    [C7x_2 ]    120.668226 s: | I | default | APP: OpenVX Target kernel init ... !!!
    [C7x_2 ]    120.668521 s: | I | default | APP: OpenVX Target kernel init ... Done !!!
    [C7x_2 ]    120.668539 s: | I | default | UDMA Copy: Init ... !!!
    [C7x_2 ]    120.669423 s: | I | default | UDMA Copy: Init ... Done !!!
    [C7x_2 ]    120.669438 s: | I | default | APP: Init ... Done !!!
    [C7x_2 ]    120.669450 s: | I | default | ------------------>c72 appMain....
    [C7x_2 ]    120.669461 s: | I | default | APP: Run ... !!!
    [C7x_2 ]    120.669471 s: | I | default | IPC: Starting echo test ...
    [C7x_2 ]    120.669583 s: | I | default | APP: Run ... Done !!!
    [C7x_2 ]    120.669811 s: | I | default | IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C7X_1[P] C7X_2[s]
    [C7x_2 ]    120.681094 s: | I | default | IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C7X_1[P] C7X_2[s]
    [C7x_2 ]    121.251900 s: | I | default | IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C7X_1[P] C7X_2[s]
    [MCU2_0]    131.450397 s: | I | default | Wait....
    
    j721s2-evm login: root
    root@j721s2-evm:~# [MCU2_0]    141.550397 s: | I | default | Wait....
    [MCU2_0]    151.650397 s: | I | default | Wait....
    
    root@j721s2-evm:~#
    root@j721s2-evm:~# dmesg
    [    0.000000] Booting Linux on physical CPU 0x0000000000 [0x411fd080]
    [    0.000000] Linux version 5.10.120-g95b90aa828 (joehsien@dell-r540) (aarch64-none-linux-gnu-gcc (GNU Toolchain for the A-profile Architecture 9.2-2019.12 (arm-9.10)) 9.2.1 20191025, GNU ld (GNU Toolchain for the A-profile Architecture 9.2-2019.12 (arm-9.10)) 2.33.1.20191209) #6 SMP PREEMPT Wed Nov 30 13:39:41 CST 2022
    [    0.000000] Machine model: Texas Instruments J721S2 EVM
    [    0.000000] earlycon: ns16550a0 at MMIO32 0x0000000002880000 (options '')
    [    0.000000] printk: bootconsole [ns16550a0] enabled
    [    0.000000] efi: UEFI not found.
    [    0.000000] OF: reserved mem: OVERLAP DETECTED!
                   vision-apps-core-heap-memory-lo@0xdf800000 (0x00000000df800000--0x00000000e3800000) overlaps with vision-apps-core-heap-memory-lo@df800000 (0x00000000df800000--0x00000000e3800000)
    [    0.000000] Reserved memory: created DMA memory pool at 0x00000000a0000000, size 1 MiB
    [    0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a0000000, compatible id shared-dma-pool
    [    0.000000] Reserved memory: created DMA memory pool at 0x00000000a0100000, size 15 MiB
    [    0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a0100000, compatible id shared-dma-pool
    [    0.000000] Reserved memory: created DMA memory pool at 0x00000000a1000000, size 1 MiB
    [    0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a1000000, compatible id shared-dma-pool
    [    0.000000] Reserved memory: created DMA memory pool at 0x00000000a1100000, size 15 MiB
    [    0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a1100000, compatible id shared-dma-pool
    [    0.000000] Reserved memory: created DMA memory pool at 0x00000000a2000000, size 1 MiB
    [    0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a2000000, compatible id shared-dma-pool
    [    0.000000] Reserved memory: created DMA memory pool at 0x00000000a2100000, size 31 MiB
    [    0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a2100000, compatible id shared-dma-pool
    [    0.000000] Reserved memory: created DMA memory pool at 0x00000000a4000000, size 1 MiB
    [    0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a4000000, compatible id shared-dma-pool
    [    0.000000] Reserved memory: created DMA memory pool at 0x00000000a4100000, size 31 MiB
    [    0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a4100000, compatible id shared-dma-pool
    [    0.000000] Reserved memory: created DMA memory pool at 0x00000000a6000000, size 1 MiB
    [    0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a6000000, compatible id shared-dma-pool
    [    0.000000] Reserved memory: created DMA memory pool at 0x00000000a6100000, size 15 MiB
    [    0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a6100000, compatible id shared-dma-pool
    [    0.000000] Reserved memory: created DMA memory pool at 0x00000000a7000000, size 1 MiB
    [    0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a7000000, compatible id shared-dma-pool
    [    0.000000] Reserved memory: created DMA memory pool at 0x00000000a7100000, size 15 MiB
    [    0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a7100000, compatible id shared-dma-pool
    [    0.000000] Reserved memory: created DMA memory pool at 0x00000000a8000000, size 1 MiB
    [    0.000000] OF: reserved mem: initialized node vision-apps-c71_1-dma-memory@a8000000, compatible id shared-dma-pool
    [    0.000000] Reserved memory: created DMA memory pool at 0x00000000a8100000, size 31 MiB
    [    0.000000] OF: reserved mem: initialized node vision-apps-c71_1-memory@a8100000, compatible id shared-dma-pool
    [    0.000000] Reserved memory: created DMA memory pool at 0x00000000aa000000, size 1 MiB
    [    0.000000] OF: reserved mem: initialized node vision-apps-c71-dma-memory@aa000000, compatible id shared-dma-pool
    [    0.000000] Reserved memory: created DMA memory pool at 0x00000000aa100000, size 111 MiB
    [    0.000000] OF: reserved mem: initialized node vision-apps-c71_0-memory@aa100000, compatible id shared-dma-pool
    [    0.000000] Reserved memory: created DMA memory pool at 0x00000000b2000000, size 32 MiB
    [    0.000000] OF: reserved mem: initialized node vision-apps-rtos-ipc-memory-region@b2000000, compatible id shared-dma-pool
    [    0.000000] Reserved memory: created DMA memory pool at 0x00000000b4000000, size 96 MiB
    [    0.000000] OF: reserved mem: initialized node vision-apps-dma-memory@b4000000, compatible id shared-dma-pool
    [    0.000000] OF: reserved mem: initialized node vision_apps_shared-memories, compatible id dma-heap-carveout
    [    0.000000] Reserved memory: created DMA memory pool at 0x00000000df800000, size 64 MiB
    [    0.000000] OF: reserved mem: initialized node vision-apps-core-heap-memory-lo@0xdf800000, compatible id shared-dma-pool
    [    0.000000] Reserved memory: created DMA memory pool at 0x00000000df800000, size 64 MiB
    [    0.000000] OF: reserved mem: initialized node vision-apps-core-heap-memory-lo@df800000, compatible id shared-dma-pool
    [    0.000000] Reserved memory: created DMA memory pool at 0x0000000880000000, size 736 MiB
    [    0.000000] OF: reserved mem: initialized node vision-apps-core-heap-memory-hi@880000000, compatible id shared-dma-pool
    [    0.000000] Zone ranges:
    [    0.000000]   DMA      [mem 0x0000000080000000-0x00000000ffffffff]
    [    0.000000]   DMA32    empty
    [    0.000000]   Normal   [mem 0x0000000100000000-0x00000009fffeffff]
    [    0.000000] Movable zone start for each node
    [    0.000000] Early memory node ranges
    [    0.000000]   node   0: [mem 0x0000000080000000-0x000000009e7fffff]
    [    0.000000]   node   0: [mem 0x000000009e800000-0x00000000b0ffffff]
    [    0.000000]   node   0: [mem 0x00000000b1000000-0x00000000b1ffffff]
    [    0.000000]   node   0: [mem 0x00000000b2000000-0x00000000b9ffffff]
    [    0.000000]   node   0: [mem 0x00000000ba000000-0x00000000df7fffff]
    [    0.000000]   node   0: [mem 0x00000000df800000-0x00000000e37fffff]
    [    0.000000]   node   0: [mem 0x00000000e3800000-0x00000000fffeffff]
    [    0.000000]   node   0: [mem 0x0000000880000000-0x00000008adffffff]
    [    0.000000]   node   0: [mem 0x00000008ae000000-0x00000009fffeffff]
    [    0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x00000009fffeffff]
    [    0.000000] On node 0 totalpages: 131070
    [    0.000000]   DMA zone: 32 pages used for memmap
    [    0.000000]   DMA zone: 0 pages reserved
    [    0.000000]   DMA zone: 32767 pages, LIFO batch:3
    [    0.000000]   Normal zone: 96 pages used for memmap
    [    0.000000]   Normal zone: 98303 pages, LIFO batch:3
    [    0.000000] On node 0, zone Normal: 1 pages in unavailable ranges
    [    0.000000] cma: Failed to reserve 512 MiB
    [    0.000000] psci: probing for conduit method from DT.
    [    0.000000] psci: PSCIv1.1 detected in firmware.
    [    0.000000] psci: Using standard PSCI v0.2 function IDs
    [    0.000000] psci: Trusted OS migration not required
    [    0.000000] psci: SMC Calling Convention v1.2
    [    0.000000] percpu: Embedded 2 pages/cpu s50008 r8192 d72872 u131072
    [    0.000000] pcpu-alloc: s50008 r8192 d72872 u131072 alloc=2*65536
    [    0.000000] pcpu-alloc: [0] 0 [0] 1
    [    0.000000] Detected PIPT I-cache on CPU0
    [    0.000000] CPU features: detected: GIC system register CPU interface
    [    0.000000] CPU features: detected: EL2 vector hardening
    [    0.000000] CPU features: detected: ARM errata 1165522, 1319367, or 1530923
    [    0.000000] CPU features: detected: Spectre-BHB
    [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 130942
    [    0.000000] Kernel command line: console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02880000 mtdparts=47040000.spi.0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),256k(ospi.env),256k(ospi.env.backup),57088k@8m(ospi.rootfs),256k(ospi.phypattern);47034000.hyperbus:512k(hbmc.tiboot3),2m(hbmc.tispl),4m(hbmc.u-boot),256k(hbmc.env),-@8m(hbmc.rootfs) root=PARTUUID=d5e0b125-c1f4-3647-a555-8e27d13361ea rw rootfstype=ext4 rootwait
    [    0.000000] Dentry cache hash table entries: 1048576 (order: 7, 8388608 bytes, linear)
    [    0.000000] Inode-cache hash table entries: 524288 (order: 6, 4194304 bytes, linear)
    [    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
    [    0.000000] software IO TLB: mapped [mem 0x00000000fbff0000-0x00000000ffff0000] (64MB)
    [    0.000000] Memory: 6412608K/8388480K available (10944K kernel code, 1360K rwdata, 4352K rodata, 1856K init, 743K bss, 1975872K reserved, 0K cma-reserved)
    [    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
    [    0.000000] rcu: Preemptible hierarchical RCU implementation.
    [    0.000000] rcu:     RCU event tracing is enabled.
    [    0.000000] rcu:     RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=2.
    [    0.000000]  Trampoline variant of Tasks RCU enabled.
    [    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
    [    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
    [    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
    [    0.000000] GICv3: GIC: Using split EOI/Deactivate mode
    [    0.000000] GICv3: 960 SPIs implemented
    [    0.000000] GICv3: 0 Extended SPIs implemented
    [    0.000000] GICv3: Distributor has no Range Selector support
    [    0.000000] GICv3: 16 PPIs implemented
    [    0.000000] GICv3: CPU0: found redistributor 0 region 0:0x0000000001900000
    [    0.000000] ITS [mem 0x01820000-0x0182ffff]
    [    0.000000] GIC: enabling workaround for ITS: Socionext Synquacer pre-ITS
    [    0.000000] ITS@0x0000000001820000: allocated 1048576 Devices @8c0800000 (flat, esz 8, psz 64K, shr 0)
    [    0.000000] ITS: using cache flushing for cmd queue
    [    0.000000] GICv3: using LPI property table @0x00000008c00b0000
    [    0.000000] GIC: using cache flushing for LPI property table
    [    0.000000] GICv3: CPU0: using allocated LPI pending table @0x00000008c00c0000
    [    0.000000] arch_timer: cp15 timer(s) running at 200.00MHz (phys).
    [    0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2e2049d3e8, max_idle_ns: 440795210634 ns
    [    0.000002] sched_clock: 56 bits at 200MHz, resolution 5ns, wraps every 4398046511102ns
    [    0.008364] Console: colour dummy device 80x25
    [    0.012928] Calibrating delay loop (skipped), value calculated using timer frequency.. 400.00 BogoMIPS (lpj=800000)
    [    0.023599] pid_max: default: 32768 minimum: 301
    [    0.028350] LSM: Security Framework initializing
    [    0.033104] Mount-cache hash table entries: 16384 (order: 1, 131072 bytes, linear)
    [    0.040858] Mountpoint-cache hash table entries: 16384 (order: 1, 131072 bytes, linear)
    [    0.050125] rcu: Hierarchical SRCU implementation.
    [    0.055207] Platform MSI: msi-controller@1820000 domain created
    [    0.061390] PCI/MSI: /bus@100000/interrupt-controller@1800000/msi-controller@1820000 domain created
    [    0.070682] EFI services will not be available.
    [    0.075443] smp: Bringing up secondary CPUs ...
    [    0.088576] Detected PIPT I-cache on CPU1
    [    0.088601] GICv3: CPU1: found redistributor 1 region 0:0x0000000001920000
    [    0.088613] GICv3: CPU1: using allocated LPI pending table @0x00000008c00d0000
    [    0.088653] CPU1: Booted secondary processor 0x0000000001 [0x411fd080]
    [    0.088718] smp: Brought up 1 node, 2 CPUs
    [    0.118069] SMP: Total of 2 processors activated.
    [    0.122874] CPU features: detected: 32-bit EL0 Support
    [    0.128129] CPU features: detected: CRC32 instructions
    [    0.142493] CPU: All CPU(s) started at EL2
    [    0.146695] alternatives: patching kernel code
    [    0.151767] devtmpfs: initialized
    [    0.158701] KASLR disabled due to lack of seed
    [    0.163377] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
    [    0.173345] futex hash table entries: 512 (order: -1, 32768 bytes, linear)
    [    0.180483] pinctrl core: initialized pinctrl subsystem
    [    0.186060] DMI not present or invalid.
    [    0.190355] NET: Registered protocol family 16
    [    0.195262] DMA: preallocated 1024 KiB GFP_KERNEL pool for atomic allocations
    [    0.202753] DMA: preallocated 1024 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
    [    0.210920] DMA: preallocated 1024 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
    [    0.219319] thermal_sys: Registered thermal governor 'step_wise'
    [    0.219322] thermal_sys: Registered thermal governor 'power_allocator'
    [    0.225896] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
    [    0.239546] ASID allocator initialised with 65536 entries
    [    0.257646] HugeTLB registered 16.0 GiB page size, pre-allocated 0 pages
    [    0.264504] HugeTLB registered 512 MiB page size, pre-allocated 0 pages
    [    0.271266] HugeTLB registered 2.00 MiB page size, pre-allocated 0 pages
    [    0.279329] cryptd: max_cpu_qlen set to 1000
    [    0.285577] k3-chipinfo 43000014.chipid: Family:J721S2 rev:SR1.0 JTAGID[0x0bb7502f] Detected
    [    0.294485] vsys_3v3: supplied by evm_12v0
    [    0.298862] vsys_5v0: supplied by evm_12v0
    [    0.303232] vdd_mmc1: supplied by vsys_3v3
    [    0.307581] vdd_sd_dv_alt: supplied by vsys_3v3
    [    0.312704] iommu: Default domain type: Translated
    [    0.317844] SCSI subsystem initialized
    [    0.321908] mc: Linux media interface: v0.10
    [    0.326281] videodev: Linux video capture interface: v2.00
    [    0.331912] pps_core: LinuxPPS API ver. 1 registered
    [    0.336981] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
    [    0.346318] PTP clock support registered
    [    0.350335] EDAC MC: Ver: 3.0.0
    [    0.354119] FPGA manager framework
    [    0.357631] Advanced Linux Sound Architecture Driver Initialized.
    [    0.364308] clocksource: Switched to clocksource arch_sys_counter
    [    0.370733] VFS: Disk quotas dquot_6.6.0
    [    0.374794] VFS: Dquot-cache hash table entries: 8192 (order 0, 65536 bytes)
    [    0.384604] Carveout Heap: Exported 600 MiB at 0x00000000ba000000
    [    0.390904] NET: Registered protocol family 2
    [    0.395574] IP idents hash table entries: 131072 (order: 4, 1048576 bytes, linear)
    [    0.405162] tcp_listen_portaddr_hash hash table entries: 4096 (order: 0, 65536 bytes, linear)
    [    0.413936] TCP established hash table entries: 65536 (order: 3, 524288 bytes, linear)
    [    0.422239] TCP bind hash table entries: 65536 (order: 4, 1048576 bytes, linear)
    [    0.430260] TCP: Hash tables configured (established 65536 bind 65536)
    [    0.437061] UDP hash table entries: 4096 (order: 1, 131072 bytes, linear)
    [    0.444091] UDP-Lite hash table entries: 4096 (order: 1, 131072 bytes, linear)
    [    0.451642] NET: Registered protocol family 1
    [    0.456437] RPC: Registered named UNIX socket transport module.
    [    0.462508] RPC: Registered udp transport module.
    [    0.467312] RPC: Registered tcp transport module.
    [    0.472116] RPC: Registered tcp NFSv4.1 backchannel transport module.
    [    0.478701] PCI: CLS 0 bytes, default 64
    [    0.483078] hw perfevents: enabled with armv8_cortex_a72 PMU driver, 7 counters available
    [    0.493678] Initialise system trusted keyrings
    [    0.498310] workingset: timestamp_bits=46 max_order=17 bucket_order=0
    [    0.506593] squashfs: version 4.0 (2009/01/31) Phillip Lougher
    [    0.512899] NFS: Registering the id_resolver key type
    [    0.518100] Key type id_resolver registered
    [    0.522371] Key type id_legacy registered
    [    0.526491] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
    [    0.533340] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
    [    0.540985] 9p: Installing v9fs 9p2000 file system support
    [    0.566250] Key type asymmetric registered
    [    0.570438] Asymmetric key parser 'x509' registered
    [    0.575439] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
    [    0.582997] io scheduler mq-deadline registered
    [    0.587623] io scheduler kyber registered
    [    0.592862] pinctrl-single 4301c000.pinctrl: 94 pins, size 376
    [    0.599030] pinctrl-single 11c000.pinctrl: 72 pins, size 288
    [    0.607054] k3-ringacc 2b800000.ringacc: Failed to get MSI domain
    [    0.613340] k3-ringacc 3c000000.ringacc: Failed to get MSI domain
    [    0.621168] Serial: 8250/16550 driver, 10 ports, IRQ sharing enabled
    [    0.633530] brd: module loaded
    [    0.639619] loop: module loaded
    [    0.643205] sysfs: cannot create duplicate filename '/devices/platform/dma_buf_phys'
    [    0.651137] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.10.120-g95b90aa828 #6
    [    0.658425] Hardware name: Texas Instruments J721S2 EVM (DT)
    [    0.664204] Call trace:
    [    0.666705]  dump_backtrace+0x0/0x1a0
    [    0.670441]  show_stack+0x18/0x68
    [    0.673824]  dump_stack+0xd0/0x12c
    [    0.677294]  sysfs_warn_dup+0x60/0x80
    [    0.681029]  sysfs_create_dir_ns+0xe0/0xf8
    [    0.685211]  kobject_add_internal+0x98/0x288
    [    0.689567]  kobject_add+0x94/0x100
    [    0.693127]  device_add+0xe0/0x740
    [    0.696596]  platform_device_add+0x100/0x238
    [    0.700953]  platform_device_register_full+0xcc/0x150
    [    0.706113]  dma_buf_phys_init+0x6c/0x9c
    [    0.710114]  do_one_initcall+0x54/0x1b8
    [    0.714028]  kernel_init_freeable+0x220/0x2a0
    [    0.718475]  kernel_init+0x14/0x114
    [    0.722033]  ret_from_fork+0x10/0x34
    [    0.725706] kobject_add_internal failed for dma_buf_phys with -EEXIST, don't try to register things with the same name in the same directory.
    [    0.738905] megasas: 07.714.04.00-rc1
    [    0.744360] tun: Universal TUN/TAP device driver, 1.6
    [    0.749777] igbvf: Intel(R) Gigabit Virtual Function Network Driver
    [    0.756186] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
    [    0.762255] sky2: driver version 1.30
    [    0.766564] VFIO - User Level meta-driver version: 0.3
    [    0.772347] i2c /dev entries driver
    [    0.776546] sdhci: Secure Digital Host Controller Interface driver
    [    0.782866] sdhci: Copyright(c) Pierre Ossman
    [    0.787570] sdhci-pltfm: SDHCI platform and OF driver helper
    [    0.793806] ledtrig-cpu: registered to indicate activity on CPUs
    [    0.800133] SMCCC: SOC_ID: ARCH_SOC_ID not implemented, skipping ....
    [    0.807238] optee: probing for conduit method.
    [    0.811803] optee: revision 3.17 (15a746d2)
    [    0.811943] optee: dynamic shared memory is enabled
    [    0.826764] optee: initialized driver
    [    0.831637] NET: Registered protocol family 17
    [    0.836258] 9pnet: Installing 9P2000 support
    [    0.840657] Key type dns_resolver registered
    [    0.845110] Loading compiled-in X.509 certificates
    [    0.852784] k3-ringacc 2b800000.ringacc: Failed to get MSI domain
    [    0.859131] k3-ringacc 3c000000.ringacc: Failed to get MSI domain
    [    0.867070] ti-sci 44083000.system-controller: ABI: 3.1 (firmware rev 0x0008 '8.4.1--v08.04.01 (Jolly Jellyfi')
    [    0.895882] omap_i2c 42120000.i2c: bus 0 rev0.12 at 100 kHz
    [    0.902025] omap_i2c 40b00000.i2c: bus 1 rev0.12 at 100 kHz
    [    0.908107] omap_i2c 40b10000.i2c: bus 2 rev0.12 at 100 kHz
    [    0.914435] pca953x 3-0020: supply vcc not found, using dummy regulator
    [    0.921254] pca953x 3-0020: using no AI
    [    0.948794] omap_i2c 2000000.i2c: bus 3 rev0.12 at 400 kHz
    [    0.955145] ti-sci-intr 42200000.interrupt-controller: Interrupt Router 125 domain created
    [    0.963739] ti-sci-intr bus@100000:interrupt-controller@a00000: Interrupt Router 148 domain created
    [    0.973078] ti-sci-intr 310e0000.interrupt-controller: Interrupt Router 227 domain created
    [    0.981666] ti-sci-inta 33d00000.msi-controller: Interrupt Aggregator domain 265 created
    [    0.990655] k3-ringacc 2b800000.ringacc: Ring Accelerator probed rings:286, gp-rings[96,20] sci-dev-id:272
    [    1.000539] k3-ringacc 2b800000.ringacc: dma-ring-reset-quirk: disabled
    [    1.007301] k3-ringacc 2b800000.ringacc: RA Proxy rev. 66349100, num_proxies:64
    [    1.016084] k3-ringacc 3c000000.ringacc: Ring Accelerator probed rings:1024, gp-rings[878,128] sci-dev-id:259
    [    1.026244] k3-ringacc 3c000000.ringacc: dma-ring-reset-quirk: disabled
    [    1.033002] k3-ringacc 3c000000.ringacc: RA Proxy rev. 66349100, num_proxies:64
    [    1.040707] omap8250 40a00000.serial: failed to get alias
    [    1.046758] printk: console [ttyS2] disabled
    [    1.051155] 2880000.serial: ttyS2 at MMIO 0x2880000 (irq = 22, base_baud = 3000000) is a 8250
    [    1.059898] printk: console [ttyS2] enabled
    [    1.068334] printk: bootconsole [ns16550a0] disabled
    [    1.080694] davinci_mdio 46000f00.mdio: Configuring MDIO in manual mode
    [    1.124317] davinci_mdio 46000f00.mdio: davinci mdio revision 9.7, bus freq 1000000
    [    1.133962] dp83812_read_straps: Strap is 0x280
    [    1.367217] davinci_mdio 46000f00.mdio: phy[0]: device 46000f00.mdio:00, driver TI DP83TC812CS2.0
    [    1.376121] am65-cpsw-nuss 46000000.ethernet: initializing am65 cpsw nuss version 0x6BA02102, cpsw version 0x6BA82102 Ports: 2 quirks:00000000
    [    1.389817] davinci_mdio c200f00.mdio: Configuring MDIO in manual mode
    [    1.436310] davinci_mdio c200f00.mdio: davinci mdio revision 9.7, bus freq 1000000
    [    1.445187] davinci_mdio c200f00.mdio: phy[0]: device c200f00.mdio:00, driver TI DP83867
    [    1.453310] am65-cpsw-nuss c200000.ethernet: initializing am65 cpsw nuss version 0x6BA02102, cpsw version 0x6BA82102 Ports: 2 quirks:00000000
    [    1.467062] am65-cpts 310d0000.cpts: CPTS ver 0x4e8a010c, freq:200000000, add_val:4 pps:0
    [    1.576697] mmc0: CQHCI version 5.10
    [    1.580928] mmc1: CQHCI version 5.10
    [    1.585645] davinci_gpio 42100000.gpio: IRQ index 0 not found
    [    1.591398] davinci_gpio 42100000.gpio: error -ENXIO: IRQ not populated
    [    1.599933] omap-mailbox 31f80000.mailbox: omap mailbox rev 0x66fca100
    [    1.606762] omap-mailbox 31f81000.mailbox: omap mailbox rev 0x66fca100
    [    1.613567] omap-mailbox 31f82000.mailbox: omap mailbox rev 0x66fca100
    [    1.620366] omap-mailbox 31f84000.mailbox: omap mailbox rev 0x66fca100
    [    1.621230] mmc0: SDHCI controller on 4f80000.mmc [4f80000.mmc] using ADMA 64-bit
    [    1.634374] mmc1: SDHCI controller on 4fb0000.mmc [4fb0000.mmc] using ADMA 64-bit
    [    1.642290] ti-udma 285c0000.dma-controller: Channels: 26 (tchan: 13, rchan: 13, gp-rflow: 8)
    [    1.652191] ti-udma 31150000.dma-controller: Channels: 48 (tchan: 24, rchan: 24, gp-rflow: 16)
    [    1.663544] spi-nor spi0.0: unrecognized JEDEC id bytes: 2c 5b 19 10 41 00
    [    1.670432] spi-nor: probe of spi0.0 failed with error -2
    [    1.676505] davinci_mdio 46000f00.mdio: Configuring MDIO in manual mode
    [    1.712652] mmc1: new high speed SDXC card at address aaaa
    [    1.718506] mmcblk1: mmc1:aaaa SN64G 59.5 GiB
    [    1.720607] mmc0: Command Queue Engine enabled
    [    1.722957] davinci_mdio 46000f00.mdio: davinci mdio revision 9.7, bus freq 1000000
    [    1.727375] mmc0: new HS200 MMC card at address 0001
    [    1.737809] dp83812_read_straps: Strap is 0x280
    [    1.740343] mmcblk0: mmc0:0001 S0J59X 119 GiB
    [    1.744524]  mmcblk1: p1 p2
    [    1.749034] mmcblk0boot0: mmc0:0001 S0J59X partition 1 31.5 MiB
    [    1.757734] mmcblk0boot1: mmc0:0001 S0J59X partition 2 31.5 MiB
    [    1.763724] mmcblk0rpmb: mmc0:0001 S0J59X partition 3 4.00 MiB, chardev (237:0)
    [    1.775215]  mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
    [    1.980976] davinci_mdio 46000f00.mdio: phy[0]: device 46000f00.mdio:00, driver TI DP83TC812CS2.0
    [    1.989902] am65-cpsw-nuss 46000000.ethernet: initializing am65 cpsw nuss version 0x6BA02102, cpsw version 0x6BA82102 Ports: 2 quirks:00000000
    [    2.003197] am65-cpsw-nuss 46000000.ethernet: set new flow-id-base 48
    [    2.010006] am65-cpsw-nuss 46000000.ethernet: initialized cpsw ale version 1.4
    [    2.017220] am65-cpsw-nuss 46000000.ethernet: ALE Table size 64
    [    2.023583] am65-cpsw-nuss 46000000.ethernet: CPTS ver 0x4e8a010b, freq:500000000, add_val:1 pps:0
    [    2.033962] davinci_mdio c200f00.mdio: Configuring MDIO in manual mode
    [    2.080310] davinci_mdio c200f00.mdio: davinci mdio revision 9.7, bus freq 1000000
    [    2.089213] davinci_mdio c200f00.mdio: phy[0]: device c200f00.mdio:00, driver TI DP83867
    [    2.097343] am65-cpsw-nuss c200000.ethernet: initializing am65 cpsw nuss version 0x6BA02102, cpsw version 0x6BA82102 Ports: 2 quirks:00000000
    [    2.110588] am65-cpsw-nuss c200000.ethernet: set new flow-id-base 82
    [    2.117349] am65-cpsw-nuss c200000.ethernet: Use random MAC address
    [    2.123616] am65-cpsw-nuss c200000.ethernet: initialized cpsw ale version 1.4
    [    2.130744] am65-cpsw-nuss c200000.ethernet: ALE Table size 64
    [    2.136968] am65-cpsw-nuss c200000.ethernet: CPTS ver 0x4e8a010b, freq:200000000, add_val:4 pps:0
    [    2.146993] debugfs: Directory 'pd:276' with parent 'pm_genpd' already present!
    [    2.154787] debugfs: Directory 'pd:154' with parent 'pm_genpd' already present!
    [    2.166565] ALSA device list:
    [    2.169533]   No soundcards found.
    [    2.179304] EXT4-fs (mmcblk0p3): mounted filesystem with ordered data mode. Opts: (null)
    [    2.187427] VFS: Mounted root (ext4 filesystem) on device 179:35.
    [    2.193922] devtmpfs: mounted
    [    2.197178] Freeing unused kernel memory: 1856K
    [    2.208333] Run /sbin/init as init process
    [    2.212425]   with arguments:
    [    2.212427]     /sbin/init
    [    2.212429]   with environment:
    [    2.212431]     HOME=/
    [    2.212432]     TERM=linux
    [    2.268495] systemd[1]: System time before build time, advancing clock.
    [    2.296670] NET: Registered protocol family 10
    [    2.301673] Segment Routing with IPv6
    [    2.314147] systemd[1]: systemd 244.5+ running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR -SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT -GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN2 -IDN -PCRE2 default-hierarchy=hybrid)
    [    2.335990] systemd[1]: Detected architecture arm64.
    [    2.376777] systemd[1]: Set hostname to <j721s2-evm>.
    [    2.499914] systemd[1]: Configuration file /etc/systemd/system/systemd-otoapp-init.service is marked executable. Please remove executable permission bits. Proceeding anyway.
    [    2.527258] systemd[1]: Configuration file /etc/systemd/system/rc.local.timer is marked executable. Please remove executable permission bits. Proceeding anyway.
    [    2.545933] systemd[1]: Configuration file /etc/systemd/system/rc.local.service is marked executable. Please remove executable permission bits. Proceeding anyway.
    [    2.566431] systemd[1]: Configuration file /etc/systemd/system/lighttpd.service is marked executable. Please remove executable permission bits. Proceeding anyway.
    [    2.583436] systemd[1]: /lib/systemd/system/docker.socket:6: ListenStream= references a path below legacy directory /var/run/, updating /var/run/docker.sock \xe2\x86\x92 /run/docker.sock; please update the unit file accordingly.
    [    2.632641] systemd[1]: Configuration file /etc/systemd/system/mount-ab-part.service is marked executable. Please remove executable permission bits. Proceeding anyway.
    [    2.651811] random: systemd: uninitialized urandom read (16 bytes read)
    [    2.658584] systemd[1]: system-getty.slice: unit configures an IP firewall, but the local system does not support BPF/cgroup firewalling.
    [    2.670913] systemd[1]: (This warning is only shown for the first unit using IP firewalling.)
    [    2.681019] systemd[1]: Created slice system-getty.slice.
    [    2.700418] random: systemd: uninitialized urandom read (16 bytes read)
    [    2.707826] systemd[1]: Created slice system-serial\x2dgetty.slice.
    [    2.728393] random: systemd: uninitialized urandom read (16 bytes read)
    [    2.735679] systemd[1]: Created slice User and Session Slice.
    [    2.756544] systemd[1]: Started Dispatch Password Requests to Console Directory Watch.
    [    2.780450] systemd[1]: Started Forward Password Requests to Wall Directory Watch.
    [    2.804438] systemd[1]: Reached target Paths.
    [    2.820376] systemd[1]: Reached target Remote File Systems.
    [    2.840362] systemd[1]: Reached target Slices.
    [    2.856374] systemd[1]: Reached target Swap.
    [    2.875576] systemd[1]: Listening on RPCbind Server Activation Socket.
    [    2.896412] systemd[1]: Reached target RPC Port Mapper.
    [    2.918372] systemd[1]: Listening on Process Core Dump Socket.
    [    2.940524] systemd[1]: Listening on initctl Compatibility Named Pipe.
    [    2.972009] systemd[1]: Condition check resulted in Journal Audit Socket being skipped.
    [    2.980423] systemd[1]: Listening on Journal Socket (/dev/log).
    [    3.000684] systemd[1]: Listening on Journal Socket.
    [    3.016709] systemd[1]: Listening on Network Service Netlink Socket.
    [    3.040593] systemd[1]: Listening on udev Control Socket.
    [    3.060509] systemd[1]: Listening on udev Kernel Socket.
    [    3.083040] systemd[1]: Mounting Huge Pages File System...
    [    3.103155] systemd[1]: Mounting POSIX Message Queue File System...
    [    3.126862] systemd[1]: Mounting Kernel Debug File System...
    [    3.149913] systemd[1]: Mounting Temporary Directory (/tmp)...
    [    3.167517] systemd[1]: Starting Create list of static device nodes for the current kernel...
    [    3.195774] systemd[1]: Starting ab partition setup...
    [    3.215795] systemd[1]: Starting RPC Bind...
    [    3.232570] systemd[1]: Condition check resulted in File System Check on Root Device being skipped.
    [    3.247419] systemd[1]: Starting Journal Service...
    [    3.269377] systemd[1]: Starting Load Kernel Modules...
    [    3.288245] systemd[1]: Starting Remount Root and Kernel File Systems...
    [    3.299569] EXT4-fs (mmcblk0p3): re-mounted. Opts: (null)
    [    3.312244] EXT4-fs (mmcblk0p1): mounted filesystem with ordered data mode. Opts: (null)
    [    3.323866] systemd[1]: Starting udev Coldplug all Devices...
    [    3.344250] systemd[1]: Started RPC Bind.
    [    3.356216] EXT4-fs (mmcblk0p5): mounted filesystem with ordered data mode. Opts: (null)
    [    3.364834] systemd[1]: Started Journal Service.
    [    3.391971] EXT4-fs (mmcblk0p7): mounted filesystem with ordered data mode. Opts: (null)
    [    3.417366] EXT4-fs (mmcblk0p10): mounted filesystem with ordered data mode. Opts: (null)
    [    3.448592] EXT4-fs (mmcblk0p12): mounted filesystem with ordered data mode. Opts: (null)
    [    3.597624] systemd-journald[167]: Received client request to flush runtime journal.
    [    3.724932] urandom_read_iter: 57 callbacks suppressed
    [    3.724936] random: systemd: uninitialized urandom read (16 bytes read)
    [    3.752404] random: systemd: uninitialized urandom read (16 bytes read)
    [    3.765809] random: systemd-journal: uninitialized urandom read (16 bytes read)
    [    4.213533] CAN device driver interface
    [    4.255509] wave5: module is from the staging directory, the quality is unknown, you have been warned.
    [    4.280129] pvrsrvkm: disagrees about version of symbol module_layout
    [    4.333590] k3-dsp-rproc 64800000.dsp: assigned reserved memory node vision-apps-c71-dma-memory@aa000000
    [    4.448023] pvrsrvkm: disagrees about version of symbol module_layout
    [    4.477020] vdec 4210000.video-codec: sram daddr: 0x70020000, size: 0x1f800
    [    4.517152] pinctrl-single 11c000.pinctrl: pin PIN46 already requested by c200000.ethernet; cannot claim for a000000.dp-bridge
    [    4.584683] k3-dsp-rproc 64800000.dsp: configured DSP for IPC-only mode
    [    4.593516] pinctrl-single 11c000.pinctrl: pin-46 (a000000.dp-bridge) status -22
    [    4.593539] m_can_platform 40528000.can: m_can device registered (irq=19, version=32)
    [    4.618669] m_can_platform 2701000.can: m_can device registered (irq=30, version=32)
    [    4.627387] platform 41000000.r5f: R5F core may have been powered on by a different host, programmed state (0) != actual state (1)
    [    4.641371] m_can_platform 2711000.can: m_can device registered (irq=32, version=32)
    [    4.650004] platform 41000000.r5f: configured R5F for IPC-only mode
    [    4.651931] pinctrl-single 11c000.pinctrl: could not request pin 46 (PIN46) from group dp0-pins-default  on device pinctrl-single
    [    4.656407] platform 41000000.r5f: assigned reserved memory node vision-apps-r5f-dma-memory@a0000000
    [    4.678975] remoteproc remoteproc1: 41000000.r5f is available
    [    4.685041] m_can_platform 2721000.can: m_can device registered (irq=34, version=32)
    [    4.717094] remoteproc remoteproc0: 64800000.dsp is available
    [    4.736138] vdec 4210000.video-codec: enum product_id : 00000000
    [    4.804495] remoteproc remoteproc1: attaching to 41000000.r5f
    [    4.853255] remoteproc remoteproc0: attaching to 64800000.dsp
    [    4.864418] vdec 4210000.video-codec: fw_version : 00000000(r240897)
    [    4.918087] remoteproc remoteproc0: unsupported resource 65538
    [    4.938700] platform 41000000.r5f: R5F core initialized in IPC-only mode
    [    5.000972] cdns-mhdp8546 a000000.dp-bridge: Error applying setting, reverse things back
    [    5.014505] k3-dsp-rproc 64800000.dsp: DSP initialized in IPC-only mode
    [    5.066367]  remoteproc1#vdev0buffer: assigned reserved memory node vision-apps-r5f-dma-memory@a0000000
    [    5.137744]  remoteproc0#vdev0buffer: assigned reserved memory node vision-apps-c71-dma-memory@aa000000
    [    5.160965] cdns-mhdp8546: probe of a000000.dp-bridge failed with error -22
    [    5.213058] virtio_rpmsg_bus virtio0: rpmsg host is online
    [    5.225007] virtio_rpmsg_bus virtio0: creating channel ti.ipc4.ping-pong addr 0xd
    [    5.232648] virtio_rpmsg_bus virtio0: creating channel rpmsg_chrdev addr 0xe
    [    5.239227] virtio_rpmsg_bus virtio1: rpmsg host is online
    [    5.244926] virtio_rpmsg_bus virtio1: creating channel rpmsg_chrdev addr 0xd
    [    5.278284]  remoteproc1#vdev0buffer: registered virtio0 (type 7)
    [    5.296703] urandom_read_iter: 21 callbacks suppressed
    [    5.296707] random: systemd: uninitialized urandom read (16 bytes read)
    [    5.301998]  remoteproc0#vdev0buffer: registered virtio1 (type 7)
    [    5.316410] random: systemd: uninitialized urandom read (16 bytes read)
    [    5.323040] random: systemd: uninitialized urandom read (16 bytes read)
    [    5.332263] remoteproc remoteproc1: remote processor 41000000.r5f is now attached
    [    5.375214] remoteproc remoteproc0: remote processor 64800000.dsp is now attached
    [    5.382862] platform 5c00000.r5f: configured R5F for IPC-only mode
    [    5.401187] k3-dsp-rproc 65800000.dsp: assigned reserved memory node vision-apps-c71_1-dma-memory@a8000000
    [    5.413608] k3-dsp-rproc 65800000.dsp: configured DSP for IPC-only mode
    [    5.414926] platform 5c00000.r5f: assigned reserved memory node vision-apps-r5f-dma-memory@a2000000
    [    5.421831] remoteproc remoteproc3: 65800000.dsp is available
    [    5.437150] remoteproc remoteproc3: attaching to 65800000.dsp
    [    5.443417] remoteproc remoteproc3: unsupported resource 65538
    [    5.449574] k3-dsp-rproc 65800000.dsp: DSP initialized in IPC-only mode
    [    5.456525]  remoteproc3#vdev0buffer: assigned reserved memory node vision-apps-c71_1-dma-memory@a8000000
    [    5.466419] virtio_rpmsg_bus virtio2: rpmsg host is online
    [    5.468132] virtio_rpmsg_bus virtio2: creating channel rpmsg_chrdev addr 0xd
    [    5.472647]  remoteproc3#vdev0buffer: registered virtio2 (type 7)
    [    5.539501] remoteproc remoteproc3: remote processor 65800000.dsp is now attached
    [    5.641276] remoteproc remoteproc2: 5c00000.r5f is available
    [    5.841027] remoteproc remoteproc2: attaching to 5c00000.r5f
    [    5.937744] platform 5c00000.r5f: R5F core initialized in IPC-only mode
    [    6.080356] random: crng init done
    [    6.083759] random: 11 urandom warning(s) missed due to ratelimiting
    [    6.093642]  remoteproc2#vdev0buffer: assigned reserved memory node vision-apps-r5f-dma-memory@a2000000
    [    6.218778] virtio_rpmsg_bus virtio3: rpmsg host is online
    [    6.227593] virtio_rpmsg_bus virtio3: creating channel rpmsg_chrdev addr 0xd
    [    6.242257]  remoteproc2#vdev0buffer: registered virtio3 (type 7)
    [    6.251895] remoteproc remoteproc2: remote processor 5c00000.r5f is now attached
    [    6.336640] platform 5d00000.r5f: configured R5F for IPC-only mode
    [    6.385277] platform 5d00000.r5f: assigned reserved memory node vision-apps-r5f-dma-memory@a4000000
    [    6.462948] remoteproc remoteproc4: 5d00000.r5f is available
    [    6.510895] remoteproc remoteproc4: attaching to 5d00000.r5f
    [    6.533294] platform 5d00000.r5f: R5F core initialized in IPC-only mode
    [    6.588688]  remoteproc4#vdev0buffer: assigned reserved memory node vision-apps-r5f-dma-memory@a4000000
    [    6.639566] virtio_rpmsg_bus virtio4: rpmsg host is online
    [    6.648381] virtio_rpmsg_bus virtio4: creating channel rpmsg_chrdev addr 0xd
    [    6.656808] virtio_rpmsg_bus virtio4: creating channel rpmsg_chrdev addr 0x15
    [    6.664132] virtio_rpmsg_bus virtio4: creating channel ti.ipc4.ping-pong addr 0xe
    [    6.671829]  remoteproc4#vdev0buffer: registered virtio4 (type 7)
    [    6.678908] virtio_rpmsg_bus virtio1: creating channel rpmsg_chrdev addr 0x15
    [    6.686182] virtio_rpmsg_bus virtio1: creating channel ti.ipc4.ping-pong addr 0xe
    [    6.700477] virtio_rpmsg_bus virtio2: creating channel rpmsg_chrdev addr 0x15
    [    6.704126] remoteproc remoteproc4: remote processor 5d00000.r5f is now attached
    [    6.707745] virtio_rpmsg_bus virtio2: creating channel ti.ipc4.ping-pong addr 0xe
    [    6.728452] virtio_rpmsg_bus virtio3: creating channel rpmsg_chrdev addr 0x15
    [    6.743645] platform 5e00000.r5f: configured R5F for remoteproc mode
    [    6.756682] platform 5e00000.r5f: assigned reserved memory node vision-apps-r5f-dma-memory@a6000000
    [    6.824127] remoteproc remoteproc5: 5e00000.r5f is available
    [    6.834727] remoteproc remoteproc5: Direct firmware load for j721s2-main-r5f1_0-fw failed with error -2
    [    6.840625] platform 5f00000.r5f: configured R5F for remoteproc mode
    [    6.848340] remoteproc remoteproc5: powering up 5e00000.r5f
    [    6.856151] remoteproc remoteproc5: Direct firmware load for j721s2-main-r5f1_0-fw failed with error -2
    [    6.868358] remoteproc remoteproc5: request_firmware failed: -2
    [    7.007140] platform 5f00000.r5f: assigned reserved memory node vision-apps-r5f-dma-memory@a7000000
    [    7.136615] remoteproc remoteproc6: 5f00000.r5f is available
    [    7.157249] remoteproc remoteproc6: Direct firmware load for j721s2-main-r5f1_1-fw failed with error -2
    [    7.171665] remoteproc remoteproc6: powering up 5f00000.r5f
    [    7.177423] remoteproc remoteproc6: Direct firmware load for j721s2-main-r5f1_1-fw failed with error -2
    [    7.186924] remoteproc remoteproc6: request_firmware failed: -2
    [    7.232950] virtio_rpmsg_bus virtio3: creating channel ti.ipc4.ping-pong addr 0xe
    [    7.426205] usbcore: registered new interface driver usbfs
    [    7.479479] usbcore: registered new interface driver hub
    [    7.486286] usbcore: registered new device driver usb
    [    8.217893] pvrsrvkm: disagrees about version of symbol module_layout
    [    8.311687] Bluetooth: Core ver 2.22
    [    8.320480] NET: Registered protocol family 31
    [    8.325069] Bluetooth: HCI device and connection manager initialized
    [    8.339986] Bluetooth: HCI socket layer initialized
    [    8.348558] Bluetooth: L2CAP socket layer initialized
    [    8.357961] Bluetooth: SCO socket layer initialized
    [    8.555699] am65-cpsw-nuss c200000.ethernet eth1: PHY [c200f00.mdio:00] driver [TI DP83867] (irq=POLL)
    [    8.576701] am65-cpsw-nuss c200000.ethernet eth1: configuring for phy/rgmii-rxid link mode
    [    8.617858] am65-cpsw-nuss 46000000.ethernet eth0: configuring for fixed/rgmii-rxid link mode
    [    8.628763] am65-cpsw-nuss 46000000.ethernet eth0: Link is Up - 100Mbps/Full - flow control off
    [    8.707591] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null)
    [    9.261768] pvrsrvkm: disagrees about version of symbol module_layout
    [   12.353995] pvrsrvkm: loading out-of-tree module taints kernel.
    [   12.399486] PVR_K:  1274: Read BVNC 36.53.104.796 from HW device registers
    [   12.415389] PVR_K:  1274: RGX Device registered BVNC 36.53.104.796 with 1 core in the system
    [   12.448815] [drm] Initialized pvr 1.15.6133109 20170530 for 4e20000000.gpu on minor 0
    [   12.466186] PVR_K:  1280: RGX Firmware image 'rgx.fw.36.53.104.796' loaded
    [   12.487214] PVR_K:  1280: Shader binary image 'rgx.sh.36.53.104.796' loaded
    [   13.726171] am65-cpsw-nuss c200000.ethernet eth1: Link is Up - 1Gbps/Full - flow control rx/tx
    [   13.734794] IPv6: ADDRCONF(NETDEV_CHANGE): eth1: link becomes ready
    [   13.842950] PVR_K:(Error):  1071: RGXSafetyEventHandler: Safety Watchdog Trigger ! [358]
    root@j721s2-evm:~# [MCU2_0]    161.750397 s: | I | default | Wait....
    [MCU2_0]    171.850397 s: | I | default | Wait....
    [MCU2_0]    181.950397 s: | I | default | Wait....
    [MCU2_0]    192.050397 s: | I | default | Wait....
    [MCU2_0]    202.150397 s: | I | default | Wait....
    
    

    modify device tree

    tet.txt
    // SPDX-License-Identifier: GPL-2.0
    /*
     * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
     *
     * Common Processor Board: https://www.ti.com/tool/J721EXCPXEVM
     */
    
    /dts-v1/;
    
    #include "k3-j721s2-som-p0.dtsi"
    #include <dt-bindings/net/ti-dp83867.h>
    #include <dt-bindings/phy/phy-cadence.h>
    #include <dt-bindings/phy/phy.h>
    #include <dt-bindings/mux/ti-serdes.h>
    
    / {
    	compatible = "ti,j721s2-evm", "ti,j721s2";
    	model = "Texas Instruments J721S2 EVM";
    
    	chosen {
    		stdout-path = "serial2:115200n8";
    		bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x2880000";
    	};
    
    	aliases {
    		serial2 = &main_uart8;
    		mmc0 = &main_sdhci0;
    		mmc1 = &main_sdhci1;
    		spi0 = &ospi0;
    		can0 = &mcu_mcan0;
    		can1 = &main_mcan0;
    		can2 = &main_mcan1;
    		can3 = &main_mcan2;
    		ethernet0 = &cpsw_port1;
    		ethernet1 = &main_cpsw_port1;
    	};
    
    	evm_12v0: fixedregulator-evm12v0 {
    		/* main supply */
    		compatible = "regulator-fixed";
    		regulator-name = "evm_12v0";
    		regulator-min-microvolt = <12000000>;
    		regulator-max-microvolt = <12000000>;
    		regulator-always-on;
    		regulator-boot-on;
    	};
    
    	vsys_3v3: fixedregulator-vsys3v3 {
    		/* Output of LM5140 */
    		compatible = "regulator-fixed";
    		regulator-name = "vsys_3v3";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		vin-supply = <&evm_12v0>;
    		regulator-always-on;
    		regulator-boot-on;
    	};
    
    	vsys_5v0: fixedregulator-vsys5v0 {
    		/* Output of LM5140 */
    		compatible = "regulator-fixed";
    		regulator-name = "vsys_5v0";
    		regulator-min-microvolt = <5000000>;
    		regulator-max-microvolt = <5000000>;
    		vin-supply = <&evm_12v0>;
    		regulator-always-on;
    		regulator-boot-on;
    	};
    
    	vdd_mmc1: fixedregulator-sd {
    		compatible = "regulator-fixed";
    		regulator-name = "vdd_mmc1";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		regulator-boot-on;
    		regulator-always-on;
    		enable-active-high;
    		vin-supply = <&vsys_3v3>;
    	};
    
    	vdd_sd_dv_alt: fixedregulator-sd-dv-alt {
    		compatible = "regulator-fixed";
    		regulator-name = "vdd_sd_dv_alt";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		regulator-boot-on;
    		regulator-always-on;
    		enable-active-high;
    		vin-supply = <&vsys_3v3>;
    	};
    
    	transceiver0: can-phy0 {
    		compatible = "ti,tcan1043";
    		#phy-cells = <0>;
    		max-bitrate = <5000000>;
    		standby-gpios = <&wkup_gpio0 5 GPIO_ACTIVE_LOW>;
    		//enable-gpios = <&wkup_gpio0 4 GPIO_ACTIVE_LOW>;
    		enable-gpios = <&wkup_gpio0 4 GPIO_ACTIVE_HIGH>;
    	};
    
    	transceiver1: can-phy1 {
    		compatible = "ti,tcan1043";
    		#phy-cells = <0>;
    		max-bitrate = <5000000>;
    	};
    
    	transceiver2: can-phy2 {
    		compatible = "ti,tcan1043";
    		#phy-cells = <0>;
    		max-bitrate = <5000000>;
    	};
    
    	transceiver3: can-phy3 {
    		compatible = "ti,tcan1043";
    		#phy-cells = <0>;
    		max-bitrate = <5000000>;
    	};
    
    	dp0_pwr_3v3: fixedregulator-dp0-prw {
    		compatible = "regulator-fixed";
    		regulator-name = "dp0-pwr";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		enable-active-high;
    	};
    
    	dp0: dp0-connector {
    		compatible = "dp-connector";
    		label = "DP0";
    		type = "full-size";
    		dp-pwr-supply = <&dp0_pwr_3v3>;
    
    		port {
    			dp0_connector_in: endpoint {
    				remote-endpoint = <&dp0_out>;
    			};
    		};
    	};
    
    };
    
    &main_i2c4 {
    	status = "disabled";
    };
    
    &main_pmx0 {
    	main_uart8_pins_default: main-uart8-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x038, PIN_INPUT_PULLDOWN, 11) /* (AB28) MCASP0_ACLKX.UART8_RXD */
    			J721S2_IOPAD(0x03c, PIN_OUTPUT_PULLUP, 11) /* (U27) MCASP0_AFSX.UART8_TXD */
    		>;
    	};
    //Ethan+ >>
    	main_i2c0_pins_default: main-i2c0-pins-default {
    		pinctrl-single,pins = <
    			J721E_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AH25) I2C0_SCL */
    			J721E_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AE24) I2C0_SDA */
    		>;	
    	};
    //Ethan+ <<
    	main_i2c1_pins_default: main-i2c1-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x0c4, PIN_INPUT_PULLUP, 13) /* (AB26) ECAP0_IN_APWM_OUT.I2C1_SCL */
    			J721S2_IOPAD(0x0c8, PIN_INPUT_PULLUP, 13) /* (AD28) EXT_REFCLK1.I2C1_SDA */
    		>;
    	};
    
    	main_mmc1_pins_default: main-mmc1-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */
    			J721S2_IOPAD(0x108, PIN_INPUT, 0) /* (N24) MMC1_CMD */
    			J721S2_IOPAD(0x100, PIN_INPUT, 0) /* (###) MMC1_CLKLB */
    			J721S2_IOPAD(0x0fc, PIN_INPUT, 0) /* (M23) MMC1_DAT0 */
    			J721S2_IOPAD(0x0f8, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */
    			J721S2_IOPAD(0x0f4, PIN_INPUT, 0) /* (R24) MMC1_DAT2 */
    			J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */
    			J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */
    		>;
    	};
    
    	dp0_pins_default: dp0-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x0b8, PIN_INPUT, 3) /* (AA24) MCASP1_ACLKX.DP0_HPD */
    		>;
    	};
    
    	main_cpsw_pins_default: main-cpsw-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x0b8, PIN_INPUT, 6) /* (AA24) MCASP1_ACLKX.RGMII1_RD0 */
    			J721S2_IOPAD(0x0a0, PIN_INPUT, 6) /* (AB25) MCASP0_AXR12.RGMII1_RD1 */
    			J721S2_IOPAD(0x0a4, PIN_INPUT, 6) /* (T23) MCASP0_AXR13.RGMII1_RD2 */
    			J721S2_IOPAD(0x0a8, PIN_INPUT, 6) /* (U24) MCASP0_AXR14.RGMII1_RD3 */
    			J721S2_IOPAD(0x0b0, PIN_INPUT, 6) /* (AD26) MCASP1_AXR3.RGMII1_RXC */
    			J721S2_IOPAD(0x0ac, PIN_INPUT, 6) /* (AC25) MCASP0_AXR15.RGMII1_RX_CTL */
    			J721S2_IOPAD(0x08c, PIN_OUTPUT, 6) /* (T25) MCASP0_AXR7.RGMII1_TD0 */
    			J721S2_IOPAD(0x090, PIN_OUTPUT, 6) /* (W24) MCASP0_AXR8.RGMII1_TD1 */
    			J721S2_IOPAD(0x094, PIN_OUTPUT, 6) /* (AA25) MCASP0_AXR9.RGMII1_TD2 */
    			J721S2_IOPAD(0x098, PIN_OUTPUT, 6) /* (V25) MCASP0_AXR10.RGMII1_TD3 */
    			J721S2_IOPAD(0x0b4, PIN_OUTPUT, 6) /* (U25) MCASP1_AXR4.RGMII1_TXC */
    			J721S2_IOPAD(0x09c, PIN_OUTPUT, 6) /* (T24) MCASP0_AXR11.RGMII1_TX_CTL */
    		>;
    	};
    
    	main_mdio_pins_default: main-mdio-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x0c0, PIN_OUTPUT_PULLUP, 6) /* (T28) MCASP1_AXR0.MDIO0_MDC */
    			J721S2_IOPAD(0x0bc, PIN_INPUT_PULLUP, 6) /* (V28) MCASP1_AFSX.MDIO0_MDIO */
    		>;
    	};
    
    	main_mcan0_pins_default: main-mcan0-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x068, PIN_INPUT_PULLUP, 0) /* (U28) MCAN0_RX */
    			J721S2_IOPAD(0x064, PIN_OUTPUT_PULLUP, 0) /* (W28) MCAN0_TX */
    		>;
    	};
    
    	main_mcan1_pins_default: main-mcan1-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x070, PIN_INPUT_PULLUP, 0) /* (R27) MCAN1_RX */
    			J721S2_IOPAD(0x06c, PIN_OUTPUT_PULLUP, 0) /* (V26) MCAN1_TX */
    		>;
    	};
    
    	main_mcan2_pins_default: main-mcan2-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x078, PIN_INPUT_PULLUP, 0) /* (Y25) MCAN2_RX */
    			J721S2_IOPAD(0x074, PIN_OUTPUT_PULLUP, 0) /* (R28) MCAN2_TX */
    		>;
    	};
    
    	main_gpio1_pins_default: main-gpio1-pins-default {
    		pinctrl-single,pins = <
    			J721S2_IOPAD(0x000, PIN_INPUT_PULLUP, 7) /* (AG24) EXTINTn.GPIO0_0 */
    			J721S2_IOPAD(0x004, PIN_INPUT, 7) /* (W25) MCAN12_TX.GPIO0_1 */
    			J721S2_IOPAD(0x008, PIN_INPUT, 7) /* (AC24) MCAN12_RX.GPIO0_2 */
    			J721S2_IOPAD(0x00c, PIN_INPUT, 7) /* (AE28) MCAN13_TX.GPIO0_3 */
    			J721S2_IOPAD(0x010, PIN_INPUT_PULLUP, 7) /* (AF28) MCAN13_RX.GPIO0_4 */
    			J721S2_IOPAD(0x014, PIN_INPUT_PULLUP, 7) /* (AD25) MCAN14_TX.GPIO0_5 */
    			J721S2_IOPAD(0x018, PIN_INPUT_PULLUP, 7) /* (W23) MCAN14_RX.GPIO0_6 */
    			J721S2_IOPAD(0x01c, PIN_INPUT_PULLUP, 7) /* (Y24) MCAN15_TX.GPIO0_7 */
    			J721S2_IOPAD(0x020, PIN_INPUT_PULLUP, 7) /* (AA23) MCAN15_RX.GPIO0_8 */
    			J721S2_IOPAD(0x024, PIN_INPUT_PULLUP, 7) /* (Y28) MCAN16_TX.GPIO0_9 */
    			J721S2_IOPAD(0x028, PIN_INPUT, 7) /* (AB24) MCAN16_RX.GPIO0_10 */
    			J721S2_IOPAD(0x02c, PIN_INPUT, 7) /* (V23) GPIO0_11 */
    			J721S2_IOPAD(0x030, PIN_OUTPUT_PULLUP, 7) /* (T26) GPIO0_12 */
    			J721S2_IOPAD(0x040, PIN_INPUT_PULLDOWN, 7) /* (AC28) MCASP0_AXR0.GPIO0_16 */
    			J721S2_IOPAD(0x044, PIN_INPUT_PULLDOWN, 7) /* (Y26) MCASP0_AXR1.GPIO0_17 */
    			J721S2_IOPAD(0x048, PIN_INPUT_PULLDOWN, 7) /* (AB27) MCASP0_AXR2.GPIO0_18 */
    			J721S2_IOPAD(0x04c, PIN_INPUT_PULLDOWN, 7) /* (V27) MCASP1_AXR1.GPIO0_19 */
    			J721S2_IOPAD(0x050, PIN_INPUT_PULLDOWN, 7) /* (W27) MCASP1_AXR2.GPIO0_20 */
    			J721S2_IOPAD(0x054, PIN_INPUT_PULLDOWN, 7) /* (Y27) MCASP2_ACLKX.GPIO0_21 */
    			J721S2_IOPAD(0x058, PIN_INPUT_PULLDOWN, 7) /* (AA27) MCASP2_AFSX.GPIO0_22 */
    			J721S2_IOPAD(0x05c, PIN_INPUT_PULLDOWN, 7) /* (AA26) MCASP2_AXR0.GPIO0_23 */
    			J721S2_IOPAD(0x07c, PIN_INPUT, 7) /* (T27) MCASP0_AXR3.GPIO0_31 */
    			J721S2_IOPAD(0x080, PIN_INPUT, 7) /* (U26) MCASP0_AXR4.GPIO0_32 */
    			J721S2_IOPAD(0x088, PIN_OUTPUT_PULLUP, 7) /* (AD27) MCASP0_AXR6.GPIO0_34 */
    			J721S2_IOPAD(0x0d0, PIN_INPUT, 7) /* (AF26) SPI0_CS1.GPIO0_52 */
    		>;
    	};
    //Ming++ for spi 0 device 202200822 >>
        spi0_pins_default: spi0-pins-default {
        	pinctrl-single,pins = <
        		J721E_IOPAD(0x0D4, PIN_OUTPUT_PULLDOWN, 0) /* (AH27) PIN_SPI0_CLK */
        		J721E_IOPAD(0x0CC, PIN_OUTPUT_PULLDOWN, 0) /* (AE27) PIN_SPI0_CS0 */
        		J721E_IOPAD(0x0D8, PIN_OUTPUT_PULLDOWN, 0) /* (AG26) PIN_SPI0_D0 */
        		J721E_IOPAD(0x0DC, PIN_INPUT_PULLDOWN, 0) /* (AH26) PIN_SPI0_D1 */
        	>;
        };
        pwm1_pins_default: pwm1-pins-default {
        	pinctrl-single,pins = <
        		J721E_IOPAD(0x060, PIN_OUTPUT_PULLDOWN, 7) /* (AC27) PIN_MCASP2_AXR1 */
         	>;
        };
    //Ming++		
    };
    
    &wkup_pmx0 {
    	mcu_cpsw_gpio_pins_default: mcu-cpsw-gpio-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x0dc, PIN_OUTPUT, 7) /* (F28) WKUP_GPIO0_7 */
    			J721S2_WKUP_IOPAD(0x0cc, PIN_INPUT, 7)  /* (C27) WKUP_GPIO0_3 */
    		>;
    	};
    
    	mcu_cpsw_pins_default: mcu-cpsw-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x094, PIN_INPUT, 0) /* (B22) MCU_RGMII1_RD0 */
    			J721S2_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (B21) MCU_RGMII1_RD1 */
    			J721S2_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C22) MCU_RGMII1_RD2 */
    			J721S2_WKUP_IOPAD(0x088, PIN_INPUT, 0) /* (D23) MCU_RGMII1_RD3 */
    			J721S2_WKUP_IOPAD(0x084, PIN_INPUT, 0) /* (D22) MCU_RGMII1_RXC */
    			J721S2_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (E23) MCU_RGMII1_RX_CTL */
    			J721S2_WKUP_IOPAD(0x07c, PIN_OUTPUT, 0) /* (F23) MCU_RGMII1_TD0 */
    			J721S2_WKUP_IOPAD(0x078, PIN_OUTPUT, 0) /* (G22) MCU_RGMII1_TD1 */
    			J721S2_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (E21) MCU_RGMII1_TD2 */
    			J721S2_WKUP_IOPAD(0x070, PIN_OUTPUT, 0) /* (E22) MCU_RGMII1_TD3 */
    			J721S2_WKUP_IOPAD(0x080, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */
    			J721S2_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */
    		>;
    	};
    
    	mcu_mdio_pins_default: mcu-mdio-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x09c, PIN_OUTPUT_PULLUP, 0) /* (A21) MCU_MDIO0_MDC */
    			J721S2_WKUP_IOPAD(0x098, PIN_INPUT_PULLUP, 0) /* (A22) MCU_MDIO0_MDIO */
    		>;
    	};
    
    	mcu_mcan0_pins_default: mcu-mcan0-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x0bc, PIN_INPUT_PULLUP, 0) /* (E28) MCU_MCAN0_RX */
    			J721S2_WKUP_IOPAD(0x0b8, PIN_OUTPUT_PULLUP, 0) /* (E27) MCU_MCAN0_TX */
    		>;
    	};
    
    	mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x0d0, PIN_OUTPUT, 7) 		/* (C23) WKUP_GPIO0_4 */
    			J721S2_WKUP_IOPAD(0x0d4, PIN_OUTPUT, 7) 		/* (F26) WKUP_GPIO0_5 */
    			J721S2_WKUP_IOPAD(0x0d8, PIN_INPUT_PULLUP, 7)	/* (E25) WKUP_GPIO0_6 */
    		>;
    	};
    
    	wkup_gpio1_pins_default: wkup-gpio1-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x0e0, PIN_INPUT, 7) /* (F24) WKUP_GPIO0_8 */
    			J721S2_WKUP_IOPAD(0x060, PIN_INPUT, 7) /* (C21) MCU_OSPI1_CSn1.WKUP_GPIO0_39 */
    		>;
    	};
    
    	mcu_uart1_pins_default: mcu-uart1-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x0ec, PIN_INPUT_PULLDOWN, 2) /* (F25) WKUP_GPIO0_11.MCU_UART0_RXD */
    			J721S2_WKUP_IOPAD(0x0e8, PIN_OUTPUT_PULLUP, 2) /* (F27) WKUP_GPIO0_10.MCU_UART0_TXD */
    		>;
    	};
    };
    
    &main_gpio0 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_gpio1_pins_default>;
    };
    
    &main_gpio2 {
    	status = "disabled";
    };
    
    &main_gpio4 {
    	status = "disabled";
    };
    
    &main_gpio6 {
    	status = "disabled";
    };
    
    &wkup_gpio1 {
    //	status = "disabled";
    	pinctrl-names = "default";
    	pinctrl-0 = <&wkup_gpio1_pins_default>;
    };
    
    &wkup_uart0 {
    	status = "reserved";
    };
    
    &mcu_uart0 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&mcu_uart1_pins_default>;
    };
    
    &main_uart0 {
    	status = "disabled";
    };
    
    &main_uart1 {
    	status = "disabled";
    };
    
    &main_uart2 {
    	status = "disabled";
    };
    
    &main_uart3 {
    	status = "disabled";
    };
    
    &main_uart4 {
    	status = "disabled";
    };
    
    &main_uart5 {
    	status = "disabled";
    };
    
    &main_uart6 {
    	status = "disabled";
    };
    
    &main_uart7 {
    	status = "disabled";
    };
    
    &main_uart8 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_uart8_pins_default>;
    	/* Shared with TFA on this platform */
    	power-domains = <&k3_pds 357 TI_SCI_PD_SHARED>;
    };
    
    &main_uart9 {
    	status = "disabled";
    };
    //Ming++ for spi 0 device 202200822 >>
    &main_spi0 {
        pinctrl-names = "default";
        pinctrl-0 = <&spi0_pins_default>;
    	ti,pindir-d0-out-d1-in = <1>;
        status="okay";
        spidev@0 {
           spi-max-frequency = <24000000>;
           reg = <0>;
           compatible = "linux,spidev";
    	};
    };
    //Ming++ for pwm 1 device 202200822
    //&main_ehrpwm1 {
    //    pinctrl-names = "default";
    //    pinctrl-0 = <&pwm1_pins_default>;
    //    status="okay";
    //};
    //Ming++<<
    &main_i2c0 {
    //Ethan+ >>
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_i2c0_pins_default>;
    //Ethan+ <<
    	clock-frequency = <400000>;
    
    	exp0: gpio@20 {
    		compatible = "ti,tca6416"; /*Ming++ change pca9535 to tca6416*/
    		reg = <0x20>;
    		gpio-controller;
    		#gpio-cells = <2>;
    		gpio-line-names = "CANFD1_EN", "CANFD2_EN", "CANFD3_EN",
    				  "LOCAL_CAN_STBn", "CAN_PWR_EN",
    				  "DSI3_PWR_EN",
    				  "CSI0_TX_PWDN", "CSI1_TX_PWDN",
    				  "PASS_01",
    				  "DES1_PDB", "DES2_PDB",
    				  "GPIO_PRG0_RGMII_RST",
    				  "DSI3_nRESET";
    	};
    };
    
    &main_i2c1 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_i2c1_pins_default>;
    	clock-frequency = <400000>;
    };
    
    &main_i2c2 {
    	status = "disabled";
    };
    
    &main_i2c3 {
    	status = "disabled";
    };
    
    &main_i2c4 {
    	status = "disabled";
    };
    
    &main_i2c5 {
    	status = "disabled";
    };
    
    &main_i2c6 {
    	status = "disabled";
    };
    
    &main_sdhci0 {
    	/* eMMC */
    	non-removable;
    	ti,driver-strength-ohm = <50>;
    //	disable-cqe-dcmd;
    	disable-wp;
    };
    
    &main_sdhci1 {
    	/* SD card */
    	pinctrl-0 = <&main_mmc1_pins_default>;
    	pinctrl-names = "default";
    	disable-wp;
    	ti,driver-strength-ohm = <50>;
    	vmmc-supply = <&vdd_mmc1>;
    	vqmmc-supply = <&vdd_sd_dv_alt>;
    };
    
    &mcu_cpsw {
    	pinctrl-names = "default";
    	pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default &mcu_cpsw_gpio_pins_default>;
    	reset-gpios = <&wkup_gpio0 7 GPIO_ACTIVE_LOW>;
    	status = "okay";
    };
    
    &davinci_mdio {
    	cpsw_phy0: ethernet-phy@0 {
    		reg = <0>;
    		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
    		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
    		ti,min-output-impedance;
    	};
    };
    
    &cpsw_port1 {
    	phy-mode = "rgmii-rxid";
    	phy-handle = <&cpsw_phy0>;
    	fixed-link {
    	      speed = <100>;
    	      full-duplex;
    	};
    };
    
    &main_cpsw {
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_cpsw_pins_default &main_mdio_pins_default>;
    	reset-gpios = <&exp0 12 GPIO_ACTIVE_LOW>;	/* P12 - GPIO_PRG0_RGMII_RST */	
    	status = "okay";
    };
    
    &main_cpsw_mdio {
    	main_cpsw_phy0: ethernet-phy@0 {
    		reg = <0>;
    		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
    		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
    		ti,min-output-impedance;
    	};
    };
    
    &main_cpsw_port1 {
    	phy-mode = "rgmii-rxid";
    	phy-handle = <&main_cpsw_phy0>;
    };
    
    &serdes_ln_ctrl {
    	idle-states = <J721S2_SERDES0_LANE0_PCIE1_LANE0>, <J721S2_SERDES0_LANE1_USB>,
    			<J721S2_SERDES0_LANE2_EDP_LANE2>, <J721S2_SERDES0_LANE3_EDP_LANE3>;
    };
    
    &serdes_refclk {
    	clock-frequency = <100000000>;
    };
    
    &serdes0 {
    	status = "disabled";
    	serdes0_usb_link: phy@1 {
    		reg = <1>;
    		cdns,num-lanes = <1>;
    		#phy-cells = <0>;
    		cdns,phy-type = <PHY_TYPE_USB3>;
    		resets = <&serdes_wiz0 2>;
    	};
    };
    
    &usb_serdes_mux {
    	idle-states = <1>; /* USB0 to SERDES lane 1 */
    };
    
    &edp_serdes_mux {
    	idle-states = <1>; /* EDP0 to SERDES lane 2/3 */
    };
    
    &usbss0 {
    	ti,vbus-divider;
    //	ti,usb2-only;
    };
    
    &usb0 {
    	maximum-speed = "super-speed";
    	phys = <&serdes0_usb_link>;
    	phy-names = "cdns3,usb3-phy";};
    
    &pcie1_rc {
    	status = "disabled";
    };
    
    &pcie1_ep {
    	status = "disabled";
    };
    
    &ospi1 {
    	status = "disabled";
    };
    
    &dss {
    	/*
    	 * These clock assignments are chosen to enable the following outputs:
    	 *
    	 * VP0 - DisplayPort SST
    	 * VP1 - DPI0
    	 * VP2 - DSI
    	 * VP3 - DPI1
    	 */
    
    	assigned-clocks = <&k3_clks 158 2>,
    			  <&k3_clks 158 5>,
    			  <&k3_clks 158 14>,
    			  <&k3_clks 158 18>;
    	assigned-clock-parents = <&k3_clks 158 3>,
    				 <&k3_clks 158 7>,
    				 <&k3_clks 158 16>,
    				 <&k3_clks 158 22>;
    };
    
    &dss_ports {
    	port {
    		dpi0_out: endpoint {
    			remote-endpoint = <&dp0_in>;
    		};
    	};
    };
    
    &mhdp {
    	pinctrl-names = "default";
    	pinctrl-0 = <&dp0_pins_default>;
    	cdns,no-hpd;
    };
    
    &dp0_ports {
    	#address-cells = <1>;
    	#size-cells = <0>;
    
    	port@0 {
    		reg = <0>;
    		dp0_in: endpoint {
    			remote-endpoint = <&dpi0_out>;
    		};
    	};
    
    	port@4 {
    		reg = <4>;
    		dp0_out: endpoint {
    			remote-endpoint = <&dp0_connector_in>;
    		};
    	};
    };
    
    &mcu_mcan0 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&mcu_mcan0_pins_default &mcu_mcan0_gpio_pins_default>;
    	phys = <&transceiver0>;
    };
    
    &mcu_mcan1 {
    	status = "disabled";
    };
    
    &main_mcan0 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_mcan0_pins_default>;
    	phys = <&transceiver1>;
    };
    
    &main_mcan1 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_mcan1_pins_default>;
    	phys = <&transceiver2>;
    };
    
    &main_mcan2 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_mcan2_pins_default>;
    	phys = <&transceiver3>;
    };
    
    &main_mcan3 {
    	status = "disabled";
    };
    
    &main_mcan4 {
    	status = "disabled";
    };
    
    &main_mcan5 {
    	status = "disabled";
    };
    
    &main_mcan6 {
    	status = "disabled";
    };
    
    &main_mcan7 {
    	status = "disabled";
    };
    
    &main_mcan8 {
    	status = "disabled";
    };
    
    &main_mcan9 {
    	status = "disabled";
    };
    
    &main_mcan10 {
    	status = "disabled";
    };
    
    &main_mcan11 {
    	status = "disabled";
    };
    
    &main_mcan12 {
    	status = "disabled";
    };
    
    &main_mcan13 {
    	status = "disabled";
    };
    
    &main_mcan14 {
    	status = "disabled";
    };
    
    &main_mcan15 {
    	status = "disabled";
    };
    
    &main_mcan16 {
    	status = "disabled";
    };
    
    &main_mcan17 {
    	status = "disabled";
    };
    
    

  • Hi Pierre ,

    Your device tree does not contain these changes which i already mentioned earlier.

    main_usbss0_pins_default: main-usbss0-pins-default {
    pinctrl-single,pins = <
    J721S2_IOPAD(0x0ec, PIN_OUTPUT, 6) /* (AG25) TIMER_IO1.USB0_DRVVBUS */
    >;
    };

    &usbss0 {
    pinctrl-0 = <&main_usbss0_pins_default>;
    pinctrl-names = "default";
    /delete-property/ ti,usb2-only;
    };

    Make sure that your dts file has below changes 

    ////////Changes made ///
    &main_pmx0 {
            main_usbss0_pins_default: main-usbss0-pins-default {
                    pinctrl-single,pins = <
                            J721S2_IOPAD(0x0ec, PIN_OUTPUT, 6) /* (AG25) TIMER_IO1.USB0_DRVVBUS */
                    >;
            };
    };
    &serdes0 {
            #address-cells = <1>;
            #size-cells = <0>;
            status = "okay";
            serdes0_usb_link: phy@1 {
                    reg = <1>;
                    cdns,num-lanes = <1>;
                    #phy-cells = <0>;
                    cdns,phy-type = <PHY_TYPE_USB3>;
                    resets = <&serdes_wiz0 2>;
            };
    };
    &serdes0_pcie_link {
            status = "disabled";
    };
    &usbss0 {
            pinctrl-0 = <&main_usbss0_pins_default>;
            pinctrl-names = "default";
            /delete-property/ ti,usb2-only;
    };
    
    &usb0 {
            dr_mode = "otg";
            maximum-speed = "super-speed";
            phys = <&serdes0_usb_link>;
            phy-names = "cdns3,usb3-phy";
    
    };

    Please apply the changes and check 

    Regards 

    Diwakar

  • Hi Diwakar,

    AG25 in our board, is use for other function.

    Could you tell me , AG25 on evm board is for what.


    Ming Lu

  • Hi Pierre ,

    AG 25 is used for USB0_DRVVBUS in evm.

    Regards 

    Diwakar

  • I will test it on our evm board. 
    seem can detcted ups

    But show some error failed on phy (same with prebuild image)

    otodas600_usb3.0.txt
    j7-evm login: root
    root@j7-evm:~# [   25.448764] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
    [   25.454273] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 1
    [   25.462073] xhci-hcd xhci-hcd.0.auto: hcc params 0x200073c9 hci version 0x100 quirks 0x0000002000010010
    [   25.471507] xhci-hcd xhci-hcd.0.auto: irq 437, io mem 0x06010000
    [   25.477732] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 5.10
    [   25.485994] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
    [   25.493267] usb usb1: Product: xHCI Host Controller
    [   25.498148] usb usb1: Manufacturer: Linux 5.10.120-g95b90aa828 xhci-hcd
    [   25.504753] usb usb1: SerialNumber: xhci-hcd.0.auto
    [   25.509960] hub 1-0:1.0: USB hub found
    [   25.513731] hub 1-0:1.0: 1 port detected
    [   25.518778] cdns-mhdp8546 a000000.dp-bridge: no PHY configured
    [   25.520239] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
    [   25.530179] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 2
    [   25.530257] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
    [   25.537842] xhci-hcd xhci-hcd.0.auto: Host supports USB 3.0 SuperSpeed
    [   25.546239] j721e-pcie 2910000.pcie:       IO 0x0018001000..0x0018010fff -> 0x0018001000
    [   25.552002] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
    [   25.560387] j721e-pcie 2910000.pcie:      MEM 0x0018011000..0x001fffffff -> 0x0018011000
    [   25.568071] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 5.10
    [   25.576529] j721e-pcie 2910000.pcie:   IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
    [   25.584340] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
    [   25.584342] usb usb2: Product: xHCI Host Controller
    [   25.584344] usb usb2: Manufacturer: Linux 5.10.120-g95b90aa828 xhci-hcd
    [   25.584347] usb usb2: SerialNumber: xhci-hcd.0.auto
    [   25.616369] j721e-pcie 2910000.pcie: Failed to init phy
    [   25.616722] hub 2-0:1.0: USB hub found
    [   25.625393] hub 2-0:1.0: 1 port detected
    [   25.625416] cdns-mhdp8546 a000000.dp-bridge: no PHY configured
    [   25.629617] xhci-hcd xhci-hcd.0.auto: remove, state 1
    [   25.640229] usb usb2: USB disconnect, device number 1
    [   25.644299] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
    [   25.645752] xhci-hcd xhci-hcd.0.auto: USB bus 2 deregistered
    [   25.656120] j721e-pcie 2910000.pcie:       IO 0x0018001000..0x0018010fff -> 0x0018001000
    [   25.658416] xhci-hcd xhci-hcd.0.auto: remove, state 4
    [   25.671556] usb usb1: USB disconnect, device number 1
    [   25.672138] j721e-pcie 2910000.pcie:      MEM 0x0018011000..0x001fffffff -> 0x0018011000
    [   25.688154] j721e-pcie 2910000.pcie:   IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
    [   25.927427] xhci-hcd xhci-hcd.0.auto: USB bus 1 deregistered
    [   25.935265] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
    [   25.940767] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 1
    [   25.948539] xhci-hcd xhci-hcd.0.auto: hcc params 0x200073c9 hci version 0x100 quirks 0x0000002000010010
    [   25.957947] xhci-hcd xhci-hcd.0.auto: irq 437, io mem 0x06010000
    [   25.964250] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 5.10
    [   25.972549] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
    [   25.979825] usb usb1: Product: xHCI Host Controller
    [   25.984841] usb usb1: Manufacturer: Linux 5.10.120-g95b90aa828 xhci-hcd
    [   25.991459] usb usb1: SerialNumber: xhci-hcd.0.auto
    [   25.996578] j721e-pcie 2910000.pcie: Failed to init phy
    [   25.996718] hub 1-0:1.0: USB hub found
    [   26.005666] cdns-mhdp8546 a000000.dp-bridge: no PHY configured
    [   26.005674] hub 1-0:1.0: 1 port detected
    [   26.015692] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
    [   26.021229] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 2
    [   26.021347] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
    [   26.028887] xhci-hcd xhci-hcd.0.auto: Host supports USB 3.0 SuperSpeed
    [   26.042963] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
    [   26.044149] j721e-pcie 2910000.pcie:       IO 0x0018001000..0x0018010fff -> 0x0018001000
    [   26.051143] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 5.10
    [   26.067399] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
    [   26.072112] j721e-pcie 2910000.pcie:      MEM 0x0018011000..0x001fffffff -> 0x0018011000
    [   26.074626] usb usb2: Product: xHCI Host Controller
    [   26.086064] j721e-pcie 2910000.pcie:   IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
    [   26.087556] usb usb2: Manufacturer: Linux 5.10.120-g95b90aa828 xhci-hcd
    [   26.102422] usb usb2: SerialNumber: xhci-hcd.0.auto
    [   26.107658] hub 2-0:1.0: USB hub found
    [   26.111464] hub 2-0:1.0: 1 port detected
    [   26.115748] xhci-hcd xhci-hcd.0.auto: remove, state 1
    [   26.116251] j721e-pcie 2910000.pcie: Failed to init phy
    [   26.120828] usb usb2: USB disconnect, device number 1
    [   26.131141] cdns-mhdp8546 a000000.dp-bridge: no PHY configured
    [   26.131901] xhci-hcd xhci-hcd.0.auto: USB bus 2 deregistered
    [   26.142682] xhci-hcd xhci-hcd.0.auto: remove, state 4
    [   26.142803] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
    [   26.147744] usb usb1: USB disconnect, device number 1
    [   26.156116] j721e-pcie 2910000.pcie:       IO 0x0018001000..0x0018010fff -> 0x0018001000
    [   26.180122] j721e-pcie 2910000.pcie:      MEM 0x0018011000..0x001fffffff -> 0x0018011000
    [   26.196109] j721e-pcie 2910000.pcie:   IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
    [   26.411719] xhci-hcd xhci-hcd.0.auto: USB bus 1 deregistered
    [   26.419225] j721e-pcie 2910000.pcie: Failed to init phy
    [   26.568642] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
    [   26.574160] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 1
    [   26.581936] xhci-hcd xhci-hcd.0.auto: hcc params 0x200073c9 hci version 0x100 quirks 0x0000002000010010
    [   26.591354] xhci-hcd xhci-hcd.0.auto: irq 437, io mem 0x06010000
    [   26.597551] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 5.10
    [   26.605816] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
    [   26.613026] usb usb1: Product: xHCI Host Controller
    [   26.617895] usb usb1: Manufacturer: Linux 5.10.120-g95b90aa828 xhci-hcd
    [   26.624496] usb usb1: SerialNumber: xhci-hcd.0.auto
    [   26.629655] hub 1-0:1.0: USB hub found
    [   26.633438] hub 1-0:1.0: 1 port detected
    [   26.637685] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
    [   26.643215] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 2
    [   26.650889] xhci-hcd xhci-hcd.0.auto: Host supports USB 3.0 SuperSpeed
    [   26.658576] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
    [   26.666831] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 5.10
    [   26.675117] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
    [   26.682334] usb usb2: Product: xHCI Host Controller
    [   26.687241] usb usb2: Manufacturer: Linux 5.10.120-g95b90aa828 xhci-hcd
    [   26.693891] usb usb2: SerialNumber: xhci-hcd.0.auto
    [   26.699139] hub 2-0:1.0: USB hub found
    [   26.702978] hub 2-0:1.0: 1 port detected
    [   26.707300] cdns-mhdp8546 a000000.dp-bridge: no PHY configured
    [   26.714545] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
    [   26.722092] j721e-pcie 2910000.pcie:       IO 0x0018001000..0x0018010fff -> 0x0018001000
    [   26.730266] xhci-hcd xhci-hcd.0.auto: remove, state 1
    [   26.735334] usb usb2: USB disconnect, device number 1
    [   26.740702] j721e-pcie 2910000.pcie:      MEM 0x0018011000..0x001fffffff -> 0x0018011000
    [   26.748989] xhci-hcd xhci-hcd.0.auto: USB bus 2 deregistered
    [   26.754704] xhci-hcd xhci-hcd.0.auto: remove, state 4
    [   26.759779] usb usb1: USB disconnect, device number 1
    [   26.765170] j721e-pcie 2910000.pcie:   IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
    [   27.023898] xhci-hcd xhci-hcd.0.auto: USB bus 1 deregistered
    [   27.031236] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
    [   27.036775] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 1
    [   27.044585] xhci-hcd xhci-hcd.0.auto: hcc params 0x200073c9 hci version 0x100 quirks 0x0000002000010010
    [   27.054018] xhci-hcd xhci-hcd.0.auto: irq 437, io mem 0x06010000
    [   27.060232] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 5.10
    [   27.068515] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
    [   27.075730] usb usb1: Product: xHCI Host Controller
    [   27.080610] usb usb1: Manufacturer: Linux 5.10.120-g95b90aa828 xhci-hcd
    [   27.087212] usb usb1: SerialNumber: xhci-hcd.0.auto
    [   27.092401] hub 1-0:1.0: USB hub found
    [   27.096223] hub 1-0:1.0: 1 port detected
    [   27.100451] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
    [   27.105980] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 2
    [   27.113652] xhci-hcd xhci-hcd.0.auto: Host supports USB 3.0 SuperSpeed
    [   27.120260] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
    [   27.128475] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 5.10
    [   27.136741] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
    [   27.144063] usb usb2: Product: xHCI Host Controller
    [   27.148941] usb usb2: Manufacturer: Linux 5.10.120-g95b90aa828 xhci-hcd
    [   27.155572] usb usb2: SerialNumber: xhci-hcd.0.auto
    [   27.160810] hub 2-0:1.0: USB hub found
    [   27.164637] hub 2-0:1.0: 1 port detected
    [   27.169058] j721e-pcie 2910000.pcie: Failed to init phy
    [   27.175705] cdns-mhdp8546 a000000.dp-bridge: no PHY configured
    [   27.182038] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
    [   27.189593] j721e-pcie 2910000.pcie:       IO 0x0018001000..0x0018010fff -> 0x0018001000
    [   27.197695] j721e-pcie 2910000.pcie:      MEM 0x0018011000..0x001fffffff -> 0x0018011000
    [   27.205834] j721e-pcie 2910000.pcie:   IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
    [   27.214393] j721e-pcie 2910000.pcie: Failed to init phy
    [   27.592703] nfs: Deprecated parameter 'intr'
    [   27.593083] nfs: Deprecated parameter 'intr'
    [   28.847557] Initializing XFRM netlink socket
    
    root@j7-evm:~# [   30.429672] bridge: filtering via arp/ip/ip6tables is no longer available by default. Update your sc.
    [   30.446012] Bridge firewalling registered
    [   31.134202] process 'docker/tmp/qemu-check519904905/check' started with executable stack
    
    

    The only differnt is that switch and AG25 gpio

    Other setup is the same

  • Hi perre ,

    I will test it on our evm board. 

    there is a bit of confusion ,EVM means it is TI one or what ?

    when you say EVM i assume it is TI one .

    Regards 

    Diwakar 

  • I check the circuit.

    That we don't have the SN74CB3Q3257PWR to switch the USB0_DRVVBUS or USB1_DRVVBUS 。

    Is that mean we can't change USB2.0 to 3.0?

    evm board

    2766.evm.pdf

    Our board

    2022-12-07 16 05 15.pdf

  • I asked the hardware ,

    he say that USB switch 3->0 , 4->1 is for type-c voltage switch. 

    USB0_DRVVBUS that we default is up ,  we don't need this gpio.

    Do you know what could cause USB 3.0 not work ?

  • Hi Pierre ,

    Can you share your usb 3.1 type c interface schematic .

    Wanted to know how your usb is getting power (USB_VBUS connection).

    Regards 

    Diwakar

  • Hi Diwakar,

    We don't have type c .

  • Hi Pierre,

    Where this is going then ?

     

    Regards 

    Diwakar

  • Hi Diwakar,

    connect to CON_USB3_U410-ZZ-A001

    2022-12-08 08 25 48.pdf

  • Hi Diwakar,

    I find when I setting the phys

    phys = <&serdes0_usb_link>;
    USB 2.0 will failed too
     
    If mark the phys 
    USB 2.0 will be ok
  • Hi Diwakar,

    SERDES_TX1_USBC_N Connect to  SERDES0_TX1_P

  • Hi Pierre,

    SERDES_TX1_USBC_N wanted to know USB end for this . it will be going to USB can you check that.

    Regards 

    Diwakar