right now we are running an Asynchronous SINGLE Read Operation on a Nonmultiplexed NOR Device.
In TRM AM387x Sitara ARM Microprocessors (MPUs) (Rev. E) (ti.com) chapter 126.96.36.199.3.3 there is a mention of Multiple Read.
"Figure 11-26 shows an asynchronous multiple read operation on a Nonmultiplexed Device, in which two word32 host read accesses to the GPMC are split into one multiple (page mode of 4 word 16) read access to the attached device."
So, in order to replace Single Read with Page Mode we do not need to change any registers apart from The GPMC_CONFIG1_i READMULTIPLE, and just provide GPMC with two 32bit words and the system will automatically split them into one multiple read access consisting of 4 16bit words?