Part Number: AM625
Hi.
In our design we are using the 2x8 DDR4 configuration instead of 1x16 as on the eval board.
2 questions :
1) On the x8 DDR4 IC there is nTDQS signal ( BALL A3 ) , should it be used and connected to the CPU , if yes to what pin ?
2) The eval board schematics ( E1 and E2 ) does not have the suggested in the app note ( https://www.ti.com/lit/pdf/SPRAD06 ) ADDR_CTR lane termination resistors. So - should we have ? Does the fact that we are 2x8 increases the importance of the termination resistors ?
Another , not memory related question - our LCD is MIPI , but the VDD is 1.8V . Digital inputs of the LCD have to be 1.8V ( this is clear ) , LVDS pairs - any affect of the voltage levels should be taken into configuration ?
Thank you.