Hi, Ti engineers
C6657 PCIe supports two channels by default. We designed a PCI card based on c6657. The hardware design is X1 interface, that is, one channel is used. In the software design, we need to use the RBL mode of DSP, that is, pcie-boot. Since RBL is officially solidified into the chip by Ti, I tried to read the channel configuration parameters of RBL. After training, PL_GEN2 register LN_ EN = 0, PL_LINK_CTRL register LNK_MODE is 2, LINK_STAT_CTRL register
NEGOTIATED_LINK_WD is 2,
1. According to NEGOTIATED_LINK_WD can roughly judge from this that RBL is configured as two PCIe channel modes?
2. If the RBL is configured with two channel modes by default, the RBL cannot be modified. Is there a certain risk in using pciex1 for the card we designed?
Can you give me some advice? thank you!
