TDA4VM: PSDK RTOS Board_init initializes PLL, but invalid

Annie Liu

Part Number: TDA4VM

Hi team,

Debugging under ti-processor-sdk-rtos-j721e-evm-08_02_00_05, the customer found that the board initialization function Board_init() cannot be used to configure the PLL. The fls_app_dac demo routine compiled with the original code of the unchanged PSDK under mcusw, the following is the result of loading and running it in the CCS environment. Among them, DMSC loads and runs the sysfw file ti-fs-firmware-j721e-gp.bin. mcu1_0 loads and runs sciserver_testapp_freertos_mcu1_0_release.xer5f. mcu2_1 loads and runs fls_app_dac_mcu2_1_release.xer5f.

The clock source configuration of TIMER0 is configured in board_pll.c. The running program did not report any errors when executing Board_init(). But as a result, the clock source selection register CTRLMMR_TIMER0_CLKSEL of TIMER0 has not changed (the correct configuration register value should be 9). The initialization configuration of BOARD_INIT_PLL by Board_init() does not take effect.

Would you help to check what's wrong?

Thanks.

Annie

over 3 years ago

0 Annie Liu over 3 years ago

TI__Genius 10295 points

Hi Team,

Is there any update for this case?

Thanks,

Annie

0 Erick Narvaez over 3 years ago in reply to Annie Liu

TI__Mastermind 36307 points

Annie,

Let me check with our PDK experts to see why the Board_init() does not make this change.

Regards,

Erick

0 Lin Wang over 3 years ago in reply to Erick Narvaez

Prodigy 20 points

Hi Erick,

Is there any progress?

0 Erick Narvaez over 3 years ago in reply to Lin Wang

TI__Mastermind 36307 points

Hello,

Our expert is taking a look at this and should respond soon.

Regards,

Erick

0 Parth Nagpal over 3 years ago in reply to Erick Narvaez

TI__Mastermind 42135 points

Hi Annie,

I can see the same issue at my end. I am analyzing this further, will get back to you on this.

Regards,
Parth

0 Parth Nagpal over 3 years ago in reply to Parth Nagpal

TI__Mastermind 42135 points

Hi Annie,

If the selected parent clock is not available, Board_pllInit looks for another parent that can provide the clock and makes sure that the required frequency is set. The provided clock parent in the gBoardPllClkCfgMain may or may not be selected, but the given frequency will always be set if the API is returning success, which should be good enough. Please refer to the Board_PLLSetModuleClkFreq API in board_pll.c

If your use case strictly requires you to set a particular clock parent, you can do so by first setting the clock parent using Sciclient_pmSetModuleClkParent and then setting clock frequency using Sciclient_pmSetModuleClkFreq. You can refer to the main_ospi_flash_test.c at PDK\packages\ti\drv\spi\test\ospi_flash\src for reference.

Regards,
Parth

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TDA4VM: PSDK RTOS Board_init initializes PLL, but invalid