HI,
We are using lpDDR4 with AM625x in our design. Center to Center distance between the two devices are maintained at 2000 mils (max) as per TI's DDR guidelines document.We have performed a pre-layout SI simulation and as per that 2.5 inches is the maximum trace length for the DDR signals. Kindly confirm on the maximum trace length for the lpDDR4 lines , is 2.5 inches is ok? Also the center to center placement distance of 2 inches as per the DDR document is ok?.
Please confirm these.