This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM625: lpDDR4 placement and maximum trace length

Part Number: AM625

HI,

We are using lpDDR4  with AM625x in our design. Center to Center distance between the two devices are maintained at 2000 mils (max) as per TI's DDR guidelines document.We have performed a pre-layout SI simulation and as per that 2.5 inches is the maximum trace length for the DDR signals. Kindly confirm on the maximum trace length for the lpDDR4 lines , is 2.5 inches is ok? Also the center to center placement distance of 2 inches as per the DDR document is ok?.

Please confirm these.

  • Yes, 2.5in is the rule of thumb considering the propagation delay max and the velocity compensation formula (500ps * 5 = 2.5in).  It would be better to get a propagation delay measurement from your simulations to ensure you stay below 500ps if possible, as different board layers have different characteristics which will affect delay.

    Regards,

    James