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AM6442: GPMC Initialization, but no bus activity

James Cassidy
Prodigy 50 points

Part Number: AM6442
Other Parts Discussed in Thread: SYSCONFIG

Hello,

I am attempting without success to initialize and use the GPMC for bus transactions with an FPGA.  I have initialized the GPMC clock and configured its registers to provide a addr/data muxed source synchronous NOR type itnerface.  However when run on the TMDS64GPEVM evaluation board, I see no bus activity.  All the lines appear floating or tri-stated - i.e. they are not actively driven.

The suspicion is that the mux function of the pins is not being set to GPMC mode, even though I have them enabled in sysconfig.  Tracing down into Pinmux_init() function's call to Pinmux_config( gPinMuxMcuDomainCfg, PINMUX_DOMAIN_ID_MCU ), I observe the following calls to CSL_REG32_WR( regAddr, pinmuxCfg->settings ) to set the pin's functions:

***Note: Note the program is being run from the M4, so these addresses are from the M4's perspective.  The actual base address is: CSL_MCU_PADCFG_CTRL0_CFG0_BASE + PADCFG_PMUX_OFFSET = 0x04084000.

0x84084028 = 0x50000 (327680)

0x8408402C = 0x10000 (65536)

I am also uncertain as to whether all the appropriate clocks have been enabled.  I am able to access the registers of the GPMC and their expected default values are present.  I am trying to use the GPMC on both the AM64x and AM62x processors, and have provided a pared down version of the program that exhibits the issue. 

As always, any help would be greatly appreciated.

Regards,

Jim.

  • 0
    Prodigy 50 points

     I don't see the uploaded example project showing the problem.  I have included it here....

    TimeTest.zip

  • 0 in reply to James Cassidy
    TI__Genius 12440 points

    James

    thanks for sharing the Example project, we will review it and get back to you, please expect some answer in a day or two.

    regards

    Anshu

  • 0 in reply to Anshu Choudhary
    TI__Guru 54328 points

    Hello James,

    I saw your code and you are trying to do GPMC initializations in M4 (MCU domain) and unfortunately this peripheral is not available in MCU domain and it is available in main domain for AM64X. can you please try to use GPMC from main domain and continue your test.

    Please refer to TRM for more details.

    Regards,

    S.Anil

  • 0 in reply to Swargam Anil
    Prodigy 50 points

    Thanks for looking into the issue Swargam.  It is strange that a program in the M4 can both read and write the control registers of the GPMC.  The example program demonstrates this capability.  As an example, I have modified the example program to read back the control setting applied to GPMC_CONFIG1(0).  The result is:

    write value = 0x78001213

    read value  = 0x78001213

    What does not happen is the pin functions are not switched to the GPMC.  The pin mux certainly can be done for other peripherals, i.e. i2c, spi, etc.  Even though the sysconfig shows the pins of the GPMC to be configured, they are not connected to the outside world in the Pinmux_config() function.

    Can you please elaborate on the what the TRM means by 'Module Allocation'?  Is this referring to the inability to configure the pin functions?

    Thanks again for the assistance!

    Jim.

  • 0 in reply to James Cassidy
    Prodigy 50 points

    P.S.  Just to be clear about what we are attempting. while the GPMC is configured by the M4, the data DMA driven transfers between DDR and GPMC would occur in the Main domain.  To be specific:

    1.  Initialize the GPMC from the M4 domain.

    2.  The M4 waits for an external event.

    3.  Upon detecting the external event, configure a DMA channel to move data from DDR memory to the GPMC.

    4.  Go to step 2.

  • 0 in reply to James Cassidy
    TI__Guru 54328 points
    James Cassidy said:
    Can you please elaborate on the what the TRM means by 'Module Allocation'?  Is this referring to the inability to configure the pin functions?

    Hello James,

    Yes your understanding is correct and you cannot do like pins configurations and CLK configurations and other parameters configurations for GPMC peripheral in MCU domain. You should configure GPMC initializations in main domain instead of MCU domain.

    Because GPMC peripheral is available on Main Domain only. 


    You can achieve your output from AM64x Hw but you need to do GPMC initializations from main domain and you can follow below procedure.

    1. Initialize the GPMC from the MAIN domain.

    2.  The MAIN DOMAIN waits for an external event.

    3.  Upon detecting the external event, configure a DMA channel to move data from DDR memory to the GPMC.

    4.  Go to step 2.

    Will you face any problem if you follow the above method?

    Regards,

    S.Anil.

  • 0 in reply to Swargam Anil
    Prodigy 50 points

    Thanks for the suggestion Swargam.  The main domain is running Linux.  The reason for using the M4 domain is to achieve deterministic and very low latency responses to the event.

    Best Regards,

    Jim.

  • 0 in reply to James Cassidy
    TI__Guru 54328 points

    Hello James,

    You can run Linux on A53 and peripherals ( GPMC ,IRQ and other ) run on R5F core in main domain.

    I can say that the R5F core is more powerful than the M4.

    If this helps we can close thread .

    Regards,

    S.Anil.

  • 0 in reply to Swargam Anil
    Prodigy 50 points

    That is true, thanks for the suggestion.  But the actual target will eventually be the AM62x, and on that device the R5 is not available for application use.

    Thanks,

    Jim.

  • 0 in reply to James Cassidy
    Prodigy 50 points

    I forgot to mention that the thread can be closed.

    Best Regards,

    Jim.

  • 0 in reply to James Cassidy
    TI__Guru 54328 points


    Hello James,

    Thanks for your reply. We are closing the thread, please open additional threads if you have more questions.

    Regards,

    S.Anil.