PROCESSOR-SDK-J7200: ENET-FW running on U-Boot

Hi,

Both ethfw and native-linux-driver can be used to control cpsw5g. From u-boot it is easier to use native-linux-driver. I will mention the changes required for the same in this post. If the customer wants to opt for Ethfw based solution, let me know. Different changed have to made in both ethfw and u-boot to enable that. The nattive-linux driver runs while booting u-boot and doesn't require rproc.

Using cpsw5g in u-boot is not out-of-box configuration. If you want to use cpsw5g in u-boot, you would have to make changes in device-tree and add cpsw5g node and pin-ctrl nodes for the pin configurations of cpsw ports and mdio.

For reference, you can see the " mcu_cpsw" node in [Linux-SDK-Install-dir]/board-support/u-boot-[commit-hash]/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi for cpsw 5g node and "mcu_cpsw_pins_default" and "mcu_mdio_pins_default" nodes in [Linux-SDK-Install-dir]/board-support/u-boot-[commit-hash]/arch/arm/dts/k3-j7200-common-proc-board.dts for pin-ctrl.

For clocks and register ranges, you can use the following reference :

cpsw0: ethernet@c000000 {
		compatible = "ti,j7200-cpswxg-nuss";
		#address-cells = <2>;
		#size-cells = <2>;
		reg = <0x00 0xc000000 0x00 0x200000>;
		reg-names = "cpsw_nuss";
		ranges = <0x00 0x00 0x00 0xc000000 0x00 0x200000>;
		clocks = <&k3_clks 19 33>;
		clock-names = "fck";
		power-domains = <&k3_pds 19 TI_SCI_PD_EXCLUSIVE>;

		dmas = <&main_udmap 0xca00>,
		       <&main_udmap 0xca01>,
		       <&main_udmap 0xca02>,
		       <&main_udmap 0xca03>,
		       <&main_udmap 0xca04>,
		       <&main_udmap 0xca05>,
		       <&main_udmap 0xca06>,
		       <&main_udmap 0xca07>,
		       <&main_udmap 0x4a00>;
		dma-names = "tx0", "tx1", "tx2", "tx3",
			    "tx4", "tx5", "tx6", "tx7",
			    "rx";

		ethernet-ports {
			#address-cells = <1>;
			#size-cells = <0>;
			cpsw0_port1: port@1 {
				reg = <1>;
				ti,mac-only;
				label = "port1";
			};

			cpsw0_port2: port@2 {
				reg = <2>;
				ti,mac-only;
				label = "port2";
			};

			cpsw0_port3: port@3 {
				reg = <3>;
				ti,mac-only;
				label = "port3";
			};

			cpsw0_port4: port@4 {
				reg = <4>;
				ti,mac-only;
				label = "port4";
			};
		};

		cpsw5g_mdio: mdio@f00 {
			compatible = "ti,cpsw-mdio","ti,davinci_mdio";
			reg = <0x00 0xf00 0x00 0x100>;
			#address-cells = <1>;
			#size-cells = <0>;
			clocks = <&k3_clks 19 33>;
			clock-names = "fck";
			bus_freq = <1000000>;
		};

		cpts@3d000 {
			compatible = "ti,j721e-cpts";
			reg = <0x00 0x3d000 0x00 0x400>;
			clocks = <&k3_clks 19 16>;
			clock-names = "cpts";
			interrupts-extended = <&gic500 GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "cpts";
			ti,cpts-ext-ts-inputs = <4>;
			ti,cpts-periodic-outputs = <2>;
		};
	};