Hi experts,
When I do not enable interrupt and errorpin of the error event in ESM configuration, Can I read the ESM_RAW_j register to determine whether the error event occurs?
Thanks,
Shukai
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Hi experts,
When I do not enable interrupt and errorpin of the error event in ESM configuration, Can I read the ESM_RAW_j register to determine whether the error event occurs?
Thanks,
Shukai
Hi Shukai,
The ESM can signal both low and high priority interrupts to a processor to deal with an event and/or manipulate an I/O error pin to signal an external hardware that an error has occurred.
So yes you could read/poll ESM_RAW_j, or could implement an interrupt handler to handle interrupts from the ESM.
Regards,
kb