Hi,
I would like to ask a question on L1D cache.
According to SPRU871K, TMS320C64x+ Megamodule Reference Guide, L1D cache can be configured with its control registers, such as L1DCFG.
However, if I would like the linker to load a certain block of data into L1D, how should I do that? Here is the dilemma:
- The linker need to load data to L1D, but it runs before the program.
- Only the program could enable L1D.
How should I solve this?
Thanks,
Zheng