Internal pull-down register value

edited with a corrected sentence..

Hiroshi,

It is difficult to quote a typical resistance value for the pull up/down because it can vary with the process of the device that you are getting.

Section 4.4 of the Datasheet lists the range of Input current (Ii) on I/Os based on whether you are trying to oppose and internal IPU/IPD or not, so with this you can get an idea on what type of current you will need to draw externally to oppose the Internal Pull.  This current range is a worst case on the I/O buffers configured either at 3.3V or 1.8V for the I/Os.  The range of current that will be consumed on a particular I/O also depends if the I/O buffered are powered by a 1.8v or a 3.3v supply rail.  For example lets say that you have a silicon device at the hottest end of the process(worst case) and you have a 3.3V powered buffer/pin(some pins can be 1.8V, so depends how they are powered) with an IPU enabled, and you are trying to oppose the internal PU by an external pull resistor, then you can think of trying to oppose a maximum resistor value of R=V/I = 3.3V/70uA = 47.1k.  

There is also another very important section in the datasheet section 3.3 that explains in more detail on how to help choose adequate external pull resistors if needed.

I hope this helps.

regards,

miguel