Part Number: TMS320C6657
Hello,
Our custom board have 2 TMS320C6657 processors. We are using the hyperlink boot mode to boot the second processor so it can eventually communicate with the first one. We have about 50 boards that works as expected in hyperlink boot mode. But about 10 of our boards fail to boot DSP2 in hyperlink boot mode.
To set the hyperlink on DSP2 we only use the boot pins to set the PLL and the default parameters. After booting, I can see in CCS that the DSP2's hyperlink is powered on and set with the default parameters correctly.
On DSP1 I run the TI example "hyplnk_exampleProject" that setup the PLL with the same settings as DSP2, then setup up the peripheral for hyperlink "hyplnkExamplePeriphSetup". That's when the problem occurs: after taking the hyperlink out of reset, the peripheral hyperlink (DSP2) returns rerror which, according to the documentation https://www.ti.com/lit/ug/sprugw8c/sprugw8c.pdf?ts=1655373356043 page 51, is a remote error and a catastrophic failure but unfortunately the documentation doesn't give an explanation of what can be the cause or how to fix the error.
If, instead of booting from hyperlink, I setup the hyperlink in a program that I run on DSP2 in CCS and set the hyperlink SerDes Control as advised in the doc as follow:
SLEEP_CNT= 0xFF (recommended value)
DISABLE_CNT = 0xFF
Then the hyperlink between the 2 DSPs works fine. So it's not an hardware fault.
The problem is I have no way to set sleep_cnt and disable_cnt when I use hyperlink boot mode, I have to use the default values which are:
SLEEP_CNT= 0x09
DISABLE_CNT = 0x2E
Can you offer an explanation of why 50+ of our boards can boot with the default hyperlink parameters but about 10 fails?
Is there anything you can suggest to avoid the peripheral remote error (rerror)?
Regards,
Emilie
