AM625: PRU control

First off:

The PRU cores cannot be booted from the M4. For more information, reference my reply here:
https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1138120/am625-access-pru-from-m4-mcu/4224322#4224322

Please note that the PRU Getting Started Labs are live! If your customers are new to PRU programming, I suggest that they take a look. This lab in particular talks about how to debug a PRU core in CCS: https://software-dl.ti.com/processor-sdk-linux/esd/AM62X/08_03_00_19/exports/docs/common/PRU-ICSS/PRU-Getting-Started-Labs_Lab5.html

(apologies about the lack of pictures. I will add images to the lab document at some point, but right now I'm focused on getting more multicore documentation published).

Ok, going back to the problem 

1) How are you changing the memory value? e.g., are you just left clicking in the memory browser and updating the value, as documented at https://software-dl.ti.com/processor-sdk-linux/esd/AM62X/08_03_00_19/exports/docs/common/PRU-ICSS/PRU-Getting-Started-Labs_Lab5.html#debugging-c-code section "Reading and modifying values in memory"?

I believe that you then need to step forward one PRU clock cycle for the change to the memory value to be applied. Then you should be able to see the value from other Memory Browser views.

2) If the steps in 1) do not work, I want to make sure I understand: You are making a change in the Memory Browser when CCS is attached to PRU0. Then you want to attach to other cores and make sure that you can see the updated value from their Memory Browsers?

Regards,

Nick