xdc error: L1DSRAM not defined

I'm attempting to build some DMAN3/ACPY3 code and I nned to define a heap in L1 memory.  xdc is giving me the following error:

Error: memory name 'L1DSRAM' is not defined by the platform

How do I get xdc ro recognize the C674 internal memores?

My .cfg files:

DSPtasks_common.cfg.xs:

var Ipc                     = xdc.useModule('ti.sdo.ipc.Ipc');
var BIOS                    = xdc.useModule('ti.sysbios.BIOS');
var MultiProc               = xdc.useModule('ti.sdo.utils.MultiProc');
var SharedRegion            = xdc.useModule('ti.sdo.ipc.SharedRegion');
var Syslink                 = xdc.useModule ('ti.syslink.ipc.rtos.Syslink');

xdc.loadPackage ('ti.syslink.ipc.rtos');

if ( (Program.platform.$name != undefined) && (Program.platform.$name.match(/evmDA830/)) ) {
    /* Ipc */
    Ipc.sr0MemorySetup = true;
}

/* Ipc configuration */
if ( (Program.platform.$name != undefined) && (Program.platform.$name.match(/evm6472/)) ) {
    /* Set host id */
    Ipc.hostProcId = MultiProc.getIdMeta("CORE5");
    Ipc.generateSlaveDataForHost = true;
}
else if ( (Program.platform.$name != undefined) && (Program.platform.$name.match(/evm6474/)) ) {
    /* Set host id */
    Ipc.hostProcId = MultiProc.getIdMeta("CORE2");
    Ipc.generateSlaveDataForHost = true;
}
else {
    /* Set host id */
    Ipc.hostProcId = MultiProc.getIdMeta("HOST");
}

Ipc.procSync = Ipc.ProcSync_PAIR;

/* Set Shared Region variables by picking up the information from Platform
 * memory map
 */
var sr0MemSection = Program.cpu.memoryMap['SR0'];
var SHAREDREG_0_MEM     = sr0MemSection.base;
var SHAREDREG_0_MEMSIZE = sr0MemSection.len;
var SHAREDREG_0_ENTRYID = 0;
var SHAREDREG_0_OWNERPROCID = Ipc.hostProcId;

var sr1MemSection = Program.cpu.memoryMap['SR1'];
var SHAREDREG_1_MEM     = sr1MemSection.base;
var SHAREDREG_1_MEMSIZE = sr1MemSection.len;
var SHAREDREG_1_ENTRYID = 1;
var SHAREDREG_1_OWNERPROCID = Ipc.hostProcId;

/*
 *  Need to define the shared region. The IPC modules use this
 *  to make portable pointers. All processors need to add this
 *  call with their base address of the shared memory region.
 *  If the processor cannot access the memory, do not add it.
 */
SharedRegion.setEntryMeta(SHAREDREG_0_ENTRYID,
    {
      base:        SHAREDREG_0_MEM,
      len:         SHAREDREG_0_MEMSIZE,
      ownerProcId: SHAREDREG_0_OWNERPROCID,
      isValid:     true,
      name:        "shared_region_0",
    });

SharedRegion.setEntryMeta(SHAREDREG_1_ENTRYID,
    {
      base:        SHAREDREG_1_MEM,
      len:         SHAREDREG_1_MEMSIZE,
      ownerProcId: SHAREDREG_1_OWNERPROCID,
      isValid:     true,
      name:        "shared_region_1",
      createHeap:  true
    });

/*
*  Application constants that all three programs use.
*/
Program.global.MSGQ_NAME            = "MSGQ_";
Program.global.HEAP_NAME            = "HeapMemMP";
Program.global.HEAP_ALIGN           =   128;
Program.global.HEAP_MSGSIZE         =   128;
Program.global.HEAP_NUMMSGS         =    10;
Program.global.HEAPID               =     0;

DSPtasks_ti816x_dsp.cfg:

/* Set the BIOS timer frequency  to 32KHz so as to match with the default timer
 * frequency on Linux
 */
var Timer        = xdc.useModule('ti.sysbios.timers.dmtimer.Timer');
Timer.intFreq.hi = 0;
Timer.intFreq.lo = 32768;

var System   = xdc.useModule('xdc.runtime.System');
var SysStd   = xdc.useModule('xdc.runtime.SysStd');
System.SupportProxy = SysStd;

var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc');
MultiProc.setConfig("DSP", ["DSP", "VIDEO-M3", "VPSS-M3", "HOST"]);

/* Load common configuration needed for running all SysLink samples */
xdc.loadCapsule("DSPtasks_common.cfg.xs");

var Notify        = xdc.useModule('ti.sdo.ipc.Notify');
var MessageQ      = xdc.useModule('ti.sdo.ipc.MessageQ');
var BIOS          = xdc.useModule('ti.sysbios.BIOS');
var Task          = xdc.useModule('ti.sysbios.knl.Task');
var Sem           = xdc.useModule('ti.sysbios.knl.Semaphore');

var Memory   = xdc.useModule('xdc.runtime.Memory');
Memory.defaultHeapSize = 0x8000;
Program.heap = 0x8000;

/* Configure some BIOS heaps */
var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem');

var heapMemParams = new HeapMem.Params();
heapMemParams.size = 0x4000;
heapMemParams.sectionName = ".L1D_HEAP";

/* Create L1DHEAP as global variables so it can be used in C code. */
Program.global.L1DHEAP = HeapMem.create(heapMemParams);

// Place heaps. L1DSRAM is defined in platform file
Program.sectMap[".L1D_HEAP"] = "L1DSRAM";  // L1DHEAP
//Program.sectMap[".EXTERNAL_HEAP"] = "DDR2"; // EXTERNALHEAP
Program.sectMap[".text"] = "DDR2";

/* Task that does the message passing */
var tsk1 = Task.create('&Preprocessing_taskFxn');
tsk1.instance.name = "Preprocessing_taskFxn";
tsk1.arg0 = MultiProc.getIdMeta ("HOST");
tsk1.stackSize = 0x1000;

/* DMAN3 stuff */
var DMAN3  = xdc.useModule('ti.sdo.fc.dman3.DMAN3');
DMAN3.heapInternal  = "L1DHEAP";
DMAN3.heapExternal = "DDR2";
DMAN3.numQdmaChannels = 8;
DMAN3.paRamBaseIndex = 78;
DMAN3.numPaRamEntries = 48;
DMAN3.nullPaRamIndex = 127;
DMAN3.tccAllocationMaskH = 0xffffffff;
DMAN3.tccAllocationMaskL = 0x0;
DMAN3.numTccGroup   = [4, 3, 2, 0, 0, 5];
DMAN3.numPaRamGroup = [4, 4, 2, 0, 0, 5];
DMAN3.qdmaChannels = [0, 1, 2, 3, 4, 5, 6, 7];
DMAN3.maxQdmaChannels = 8;
DMAN3.maxTCs          = 2;

/* ACPY3 stuff */
//var ACPY3  = xdc.useModule('ti.sdo.fc.acpy3.ACPY3');

Lee Holeva