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6474 - EMAC Interrupt

tugrul mutlu
Intellectual 365 points

Hi;

I am trying to modify our 6455 EMAC project in order to use them in our 6474 source code. So i didnt try to use the new CSL library ( with call back functions). Anyway when i am trying to send packets ( in loobback mode ) for the first packet i get both tx and rx interrupt. ( I bind them on two events). However for the next packets no interrupts occur. 

I check related registers and see that both rxgoodframes and txgoodframes are increasing. and also i can see that related registers are all correct ( MACINVECTOR, TXINTSTATRAW, TX_EN, RX_EN .. ) Furthermore i check CSR, IER register. but it seem it is not related with that.

I am not sure it is related with INT_CONTROL register. I just write 0 in order to prevent any interrupt pacing. Should i write something to this register ? Thanks

Tugrul  

  • 0
    Intellectual 365 points

    An additional information, i noticed that

    In EMAC subsytem SGMII registers 

    Receive status register ( C_RX_STAT ) and Tranmit status register ( C_TX_STAT ) is 1 after i sent the second packet. They dont reset to 0. On the other hand for the first packet, first they set to 1 and then reset to 0 again.