Hello,
in the TMS320TCI648x DSP Bootloader User's Guide (SPRUEA7D) in section 5.3.2 it is stated: "At the end of boot, core 0 releases core 1 and 2 out of reset and then core 0 runs from the entry point in the boot table. Core 1 and core 2 run from the base address of their respective L2 RAM, i.e., 0x800000."
Does anyone know if the three cores run at the same time after they are initialized? Or does core 0 run first and then core 1 and 2 (or core 1 and 2 first, and then core 0)? If they don't run at the same time, is there a way to specify some order/sequence in which they should start running?
I need the three cores to either be initialized first, and then start running together at the same time, or, if this is not possible, to make sure that they run in a specified sequence, since some shared resources have to be initialized correctly before they are accessed by other cores.
Thanks,
Petar