I have a MT29C2G48MAKL Combination NAND Flash & LPDRAM memory mounted on the top of an OMAP3530 device (CBB package). Looking at the BSDL for the 3530 I see there are cells for the bottom pins but not the top pins. For example, SDRC_DO is listed as going to the bottom ball D6 and top ball J2. Top ball J2 is listed under the group vdds_mem which is defined as a linkage bit_vector. It appears there is no way to test the POP memory using boundary scan - is this correct?
Also, I am not familiar with the ICEPICK commands required to get the device into boundary scan mode - how do I implement this and can it be accomplished thru boundary scan?
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