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Problems about EDMA3

Other Parts Discussed in Thread: CCSTUDIO

I am working on the C6474 EVM.There are some questions and problem about EDMA3:

1.Does the EDMA3 stop working in the interrupt service fonction?

2.Does the EDMA3 stop working while I load a new program using CCS and the emulator on the EVM board?

3.Does the EDMA3 reset after loading a new program using CCS and the emulator on the EVM board? If not ,how to reset EDMA?

4.A channel is configured to link NULL prameter set. When I load program for the first time,it enter the the transfer completion interrupts succeed. But when I reload again(there is no power off), it can't enter the ISR .
what's the reason please?

Thank you!
Regards

  • Hi,

    I have the same problem in C6747.

    I am not sure about qustion 2 and 3, but in answer to 1 - The EDMA is definetly works during the interrupt.

     

    Regards

    Arye.

  • Wang nan said:
    1.Does the EDMA3 stop working in the interrupt service fonction?

    As Arye mentioned there is nothing that specifically prevents the EDMA from running while the CPU is servicing an interrupt. As long as there are system events still triggering the EDMA will continue to function.

    Wang nan said:
    2.Does the EDMA3 stop working while I load a new program using CCS and the emulator on the EVM board?
    I think this depends on several factors including whether or not any events are still occuring. Some peripherals have bits you can set in a register that will halt them when the emulator halts the CPU, but the EDMA does not - so if something is still running the EDMA should continue to service that event(s).

    Wang nan said:
    3.Does the EDMA3 reset after loading a new program using CCS and the emulator on the EVM board? If not ,how to reset EDMA?
    I think this shares the same answer from #2 but you can always disable all events by writing to EECR and EECRH (Event Enable Clear registers). This would turn off all EDMA events and act as a reset. Note that the other registers and PaRAM would not be reset with this method, but you could always overwrite them.

    Wang nan said:
    4.A channel is configured to link NULL prameter set. When I load program for the first time,it enter the the transfer completion interrupts succeed. But when I reload again(there is no power off), it can't enter the ISR . what's the reason please?
    Are you re-programming the PaRAM after it completes? If not, when the channel links to the NULL set the next time you try to trigger that channel it will have a 0 count, thus no transfer. If you are re-programming that channel's PaRAM when you reload the project then there should be no reason the transfer fails. I think a few more details about what specifically you are doing would be helpful.

  • Thank you both,Arye and TimHarron.

    TimHarron,your reply is perfect.

    I am working with the AIF(antenna interface).The frame synchronization modul is still working over the CPU are reset.So it always gives EDMA3 the events.

    About #4,I re-programme the PaRAM in a new time.
    In fact,it is the same src code as the first.I configue the EDMA3 with the  PaRAM_A,it has value to transfer.And it links NULL PaRAM.I did the same thing for the first time and the second time.
    In the first time,it can enter the EDMA3 completion ISR,but the second time it can't.
    It is strange.

    By the way,TimHarron,are you familiar with the AIF.
    There are also some problem about that.
    We are working on the C6474EVM.
    We have succeed in DSP_A sending to DSP_B transmition,and in DSP_B to DSP_A transmition.
    But we can't succeed in DSP_A and DSP_B both sending and receiving.
    Is there some special notice abuot the AIF configuration in this case?
    We exame the data in the EDMA completion ISR.
    I don't know what's the different about one derection and tow derection?

    Thank you very much!

  • Wang nan said:
    In the first time,it can enter the EDMA3 completion ISR,but the second time it can't.
    It is strange.

    That is indeed strange. If you are running through the exact same code twice but the second pass fails then I am not sure what would cause that. My first suggestion would be to step through the initialization code on the first and second passes to verify that everything is exactly the same.

    Wang nan said:
    I don't know what's the different about one derection and tow derection?
    Sadly I'm not very familiar with the AIF. I did a quick glance through the AIF user guide and I don't really see anything specific about bi-directional transfers. One of the folks from the factory frequents these boards though and he can probably help out better than I can.

  • Hi  TimHarron,

    Thank you for your help,I think there is some mistake in my code,but I didn't find by now.
    I will try to find it.

    Best Regards.

  • Do you use CSL for programming the EDMA or the EDMA LLD Low Level Driver or are you doing all the programming by direct register accesses? If you are not using CSL or LLD, please do use those starting from examples that can show you all the initialization and other settings to use.

    The CSL examples include an eventEdmaHandler in the file C:\CCStudio_v3.3\csl_C6474\example\edma\edma_interrupt\src\edmaintdispatcher.c . Be careful though, since it uses Region1 and that can lead to confusion especially in simple tests. I posted some example code that runs on the C6455 at the posting http://e2e.ti.com/support/dsp/tms320c6000_high_performance_dsps/f/112/p/11561/45088.aspx#45088 [edit: RandyP to correct the link] . This will at least show how to use the CSL to run a simple transfer and to get interrupts.

    Wang nan said:

    4. A channel is configured to link the NULL parameter set. When I load program for the first time, it enters the transfer completion interrupt service routine. But when I reload (there is no power off), it can't enter the ISR .
    what's the reason please?

    The steps and questions to narrow down the problem are:

    1. Identify the DMA channel you are using. If it is 0-31 you will look at the first register of a pair, if it is 32-63 you will look at the xxxxH second register of a pair.
    2. After the first transfer has completed and the second is programmed, look at the EMR and SER registers to see if the bit corresponding to your DMA channel is set.
    3. Then check the IPR and IER registers from the EDMA and the IER register from the DSP (sorry they are named the same). The DSP.IER bit will be for the DSP interrupt number which will not be the same as the DMA channel number.
    4. If all of these are right, let the second event occur.
    5. Can you confirm if the data transfer occurs or not?
    6. Does the Param get cleared to NULL again?
    7. How are you detecting that the ISR is not executed again?
    8. What channel are you using?
    9. What trigger source are you using? ESR or a signal event?