Issue with CPU triggered EDMA3 on 6455

Hi

 I am using the EDMA3 of C6455 processor to do a CPU triggered transfer of
data. I am used to TIC64x and I understand that there are 64 channels and each
channel is triggered either by an event or a CPU triggered action. I seem to be
a little confused reading 6455 and need clarity. Can some one tell me how to go
about understanding the EDMA3 controller working?. Also I am doing a small
example to have a CPU triggered transfer. Here is my code
#include <stdio.h>
#include <stdlib.h>
#include <csl.h>
#define SRCADDR� (0x02A04004)
void main()
{
int *ptr=(int *)(0x0800000);//L2 memory
unsigned int status,index;
*((int *)0x02A04000)=0x00100008;//PaRam 0 OPT
*((int *)SRCADDR)=0x800000;//source address
*((int *)0x02A04008)=0x100;//count of elements
*((int *)0x02A0400C)=0x800500;//destination address
//values to be moved
for(index=0;index<255;index++)
{
*(ptr++)=index;
}

*((int *)0x02A01010)=0x00000001;//ESR� for channel 0

}


But this code does not do the trick for me. I seem to be doing fine setting the
parameters for channel 0 and using the ESR to trigger.... Thanks for the help

regards
Bala