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GMACs on 6678

steve duncan
Prodigy 85 points

Apologies for the dumb question...

The C6678 datasheet states the performance is 40GMACs per core (SPRS691 Section 1).  I presume a MAC is defined in the normal manner as a combined multiplication and accumulation operation.

Looking at the instruction set, I can see the DDOTP4H instruction does 8 MACs per .M unit per cycle.  At 1.25GHz that makes 20GMACs per core, not 40.

I can't see that anything else that will use the other 8 multipliers in the .M unit.   How would I get the full 40GMACs/core performance?

Regards,

Steve D

 

  • 0
    TI__Guru* 84110 points

    Steve,

    Please see the CMATMPY instruction. Each .M unit can do 16 16-bitx16-bit multiplies per cycle.

    Is this an intellectual exercise or do you have an application you are trying to design or build?

    Regards,
    RandyP

     

    If you need more help, please reply back. If this answers the question, please click  Verify Answer  , below.

  • 0 in reply to RandyP
    Prodigy 85 points

    Hi Randy,

    Thanks for your quick and helpful reply.  This tells me, if I'm not mistaken, that the maximum rate I can run an FIR filter is 20GMACs per core.  The higher rate applies only to complex operations and is (presumably) limited by bus bandwidth to the M unit.

    I will contact you about my application.

    Steve