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OMAP35X with NOR flash (Numonyx P30)

Klaus Gusenleitner
Prodigy 30 points
Other Parts Discussed in Thread: SN74LVC16373A, OMAP3503

Hi,

we use a OMAP3503 with a Numonyx Axcell P30-65nm, 1-Gbit flash. The lower 16 address lines are demultiplexed with a SN74LVC16373A latch.
Our problem are sporadic writing problems to flash. Once a writing problem has occurred no more flash writes to this
flash block will be successfully. Even power off/on of the device does change the behavior.
Only erasing the block repairs the block and makes it writable again.
My suspicion is an invalid set of GPMC config values. Does anyone have a working set of the GPMC configs for this type of flash?

Thanks
Klaus

  • 0
    Prodigy 30 points

    Hi,

    I have done some research and came to the following conclusion:
    When the power supply is cut off while erasing a flash block the flash block will behave as described above.
    We use Linux 2.6.35.6 and UBI/UBIFS for the root file system. It would appear that UBI/USBFS has a problem with this behavior.
    Using JFFS2 instead has solved the problem.

    Klaus

  • 0 in reply to Klaus Gusenleitner
    Intellectual 560 points

    Hi Klaus:

    I am using the same chip but having trouble to read/write to it. See below is my GPMC configuration for this NOR chip:

    #define OMAP35x_SYNC_GPMC_CONFIG1 0x68411213
    #define OMAP35x_SYNC_GPMC_CONFIG2 0x000C1502
    #define OMAP35x_SYNC_GPMC_CONFIG3 0x00040402
    #define OMAP35x_SYNC_GPMC_CONFIG4 0x0B051505
    #define OMAP35x_SYNC_GPMC_CONFIG5 0x020E0C15
    #define OMAP35x_SYNC_GPMC_CONFIG6 0x0B0603C3
    #define OMAP35x_SYNC_GPMC_CONFIG7 0x00000850

    Would you please take a look if there are wrong?

    Thanks in advance.

    Philip

  • 0 in reply to Tianhua Chu
    Prodigy 30 points

    Hello Philip,

    by now we use UBI/UBIFS again. The former problem was solved by switching to Linux 3.0.4. The flash is connect 16 bit wide and we use GPMC config:

    #define GPMC_CONF1 0x61401203
    #define GPMC_CONF2 0x00111006
    #define GPMC_CONF3 0x00040402
    #define GPMC_CONF4 0x10060f08
    #define GPMC_CONF5 0x040c1110
    #define GPMC_CONF6 0x8f0604c4
    #define RCR 0x284b
    #define GPMC_SIZE_128M 0x8
    #define CONFIG_SYS_FLASH_BASE  0x10000000

    int nor_init(void)
    {

     __raw_writel(0, GPMC_CONFIG7 + GPMC_CONFIG_CS0);
     delay(1000);
     /* Delay for settling */
     __raw_writel(GPMC_CONF1, GPMC_CONFIG1 + GPMC_CONFIG_CS0);
     __raw_writel(GPMC_CONF2, GPMC_CONFIG2 + GPMC_CONFIG_CS0);
     __raw_writel(GPMC_CONF3, GPMC_CONFIG3 + GPMC_CONFIG_CS0);
     __raw_writel(GPMC_CONF4, GPMC_CONFIG4 + GPMC_CONFIG_CS0);
     __raw_writel(GPMC_CONF5, GPMC_CONFIG5 + GPMC_CONFIG_CS0);
     __raw_writel(GPMC_CONF6, GPMC_CONFIG6 + GPMC_CONFIG_CS0);
     /* Enable the config */
     __raw_writel((((GPMC_SIZE_128M & 0xF) << 8) | ((CONFIG_SYS_FLASH_BASE >> 24) & 0x3F) |
      (1 << 6)), (GPMC_CONFIG7 + GPMC_CONFIG_CS0));
     delay(2000);

     __raw_writew(0x60, CONFIG_SYS_FLASH_BASE + RCR * 2);
     __raw_writew(0x03, CONFIG_SYS_FLASH_BASE + RCR * 2);
     __raw_writew(0xff, CONFIG_SYS_FLASH_BASE);

     return 0;
    }

    Could you try this configuration?

    Klaus