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C6745 EMIFA Configuration

Anulal SS53
Prodigy 195 points

Hello,

I doubt whether I can configure my c6745 EMIFA in following configuration. 

Address lines A5 to A12, EMA_BA[0] and EMA_BA[1] as GPIOs. All EMIFA data pins, address lines [A0 to A4], and rest of pins belongs to EMIFA as EMIF interface pins.

Please let me know whether it  is possible.

Regards

Anulal

  • 0
    TI__Genius 14545 points

    Anulal,

        What is the end goal of programming the pins in that way? Can you provide a block diagram or some other textual description to help us understand your doubts?

  • 0 in reply to dabuan
    Prodigy 195 points

     Drew Abuan,

    Thank you for reply.

    Actually I need more GPIO pins in my design since other GPOIs are already engaged . So  to use unused EMIF pins as GPIO.  Please refer attached diagram. There some EMIFA signals (Towards Device x) to be configured as GPIO at the same time other EMIFA signals will be used as EMIF.

  • 0 in reply to dabuan
    Prodigy 195 points

    Drew Abuan,

    Thank you for reply.

    Actually I need more GPIO pins in my design since other GPOIs are already engaged . So  to use unused EMIF pins as GPIO.  Please refer  diagram, there some EMIFA signals (Towards Device x) to be configured as GPIO at the same time other EMIFA signals will be used as EMIF.

     

    Anulal

  • 0 in reply to Anulal SS53
    TI__Mastermind 27585 points

    Anulal, for 8-bit asynchronous memory interfacing, the EMA_BA pins are used as the LSB's of the address. Make sure those are not used as GPIOs and are connected to the external memory.

    Also if you don't use the WAIT pin, how can you be sure the device is ready when performing reads?

    Otherwise that setup will be ok.

    Jeff

  • 0 in reply to jc-ti
    Prodigy 195 points

    Jeff,

    Thank you for your correction.

    As you said EMA_BA pins cant be avoided. Further, my design does not use WAIT pin. So what I understood is, we can configure unused EMIF pins as GPIOs. 

    Anulal