• State Resolved
  • Locked Locked
  • Replies 4 replies
  • Subscribers 98 subscribers
  • Views 799 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

SPI Communication on an EVM6748 by LogicPD

Steve Kreyer
Intellectual 520 points

Hello,

 

I have the following scenario:

I have an EVM6748 evaluation board by LogicPD and I want to interconnect this board to another evaluation board which runs a PowerPC via SPI. Iam using the PSP SPI driver. Now to my problem: I connect the SPI pins through the expansion header J30 using pins 64 for SPI_1_CLK, 63 for SPI_1_SIMO and 65 for SPI_1_SOMI. I have a small test  application (configured according to the example application provided by the PSP) which configures the C6748 SPI_1 port as slave since my PPC board is the master. The PPC board already transfers data and drives the SPI_1_CLK. Now Iam getting stucked at C6748 side. When I try to read the bytes which are sent via SPI using the Stream_read function a event missed error on the particular DMA channel is reported and the execution is aborted. What does "event miss" mean? Also I couldn't find a documentation on the EDMA3 controller module on the processor and register descriptions. The C6748 datasheet is not really meaningful according to this module.

 

Any help would be very appreciated.


TIA,
Steve

P.S. I was not really sure in which forum to put since this issue seems to be both hardware related and PSP / EMDA3_LLD related. If this is the wrong forum please move the post to a better fitting one.

  • 0
    TI__Expert 5500 points

    Hi Steve,

     

    Can you please mention which version of the BIOS PSP are you using?. 

    An event miss occurs, when there are no PaRAM sets programmed for that particular event or the EDMA itself has not be been configured appropriately to perform any transactions. First, the PaRAM sets are programmed depending on the number of bytes to be transferred and then, the DMA is enabled for transfer.

    Referring to section 2.13 of SPI User Guide, when a character is received, the SPI module signals the DMA via the REVT signal. Since you are getting an event miss, the data has reached the receive buffer register of the SPI and an event is sent to the DMA. But, the DMA is somehow unable to process it due to lack of programming the channel/parameters of EDMA as mentioned above. Can you please mention your application scenario?.How many bytes are you intending to read?. etc,.

    Secondly, try configuring the SPI in polled/Interrupt mode to check if all is good with the hardware modification/setup you have made. Just to isolate the issue, and ofcourse configuring SPI in DMA mode an be checked next.

    For the EDMA3 controller module and register description, please refer: EDMA User Guide

     

    Thanks & regards,

    Raghavendra

  • 0 in reply to Raghavendra Maddikery
    Intellectual 520 points

    Hi Raghavendra,

     

    thanks for pointing out to the documentation. This helps me alot. And also your tip about trying it out first in polled mode was good. This solved the issue for me. I had some synchronization / configuration problems with SPI on the C6748 side. Since these failures were solved also DMA mode works now for me.

     

    However I've still a problem during the first transfer after the sender's (PPC board's) reset. Then the C6748 reads the bits within the SPI bitstream out of phase. For example when trying to send 0x0D 0x0E, the C6748 reads 0x86 0x87 (the SIMO circuit is high before and after the transfer). This is only the case for the first transfer after senders's reset., on consecutive transfers I get the correct result on the receiver (C6748) side. On the receiver side I've configured POL=0 and PHASE=0 (which means output data on the rising edge and input data on the falling edge). On the sender (PPC) side, where I've configured POL=0 but PHASE=1 (which means also output data on the rising edge and input data on the falling edge), the meaning of the PHASE bit seems to be different, or am I missing something here?

     

    Thanks,

    Steve

  • 0 in reply to Steve Kreyer
    TI__Expert 5500 points

    Hi Steve,

    The SPI Userguide section 2.11.3 shows the actions for various combinations of "PHASE" and "POLARITY". From this, what you have mentioned is appropriate for the receiver(C6748) side. But on the PPC side, not very sure. So, will get back to you on this. In the meanwhile, can you please share its(sender - PPC) userguide/doc?.

     

    Thanks & regards,

    Raghavendra

  • 0 in reply to Raghavendra Maddikery
    Intellectual 520 points

    Hi Raghavendra,

     

    thanks for your effort and time. The documentation for the PPC can be found at MPC5643EL docu . For the SPI modes you can refer to section 16.4.4.

     

    Thanks,
    Steve