Some problems with the Phase-Locked Loop (PLL) Controller in my C6713-200M board. The extern oscilator with 25M is provided the clock input.
The PLL initilization program is as following:
/* Put PLL in bypass */
PLL_bypass();
PLLDelay(20);
/* Reset PLL */
PLL_reset();
PLLDelay(20);
/* Set main multiplier/divisor */
PLL_RSET(PLLM, 16); // 25MHz x 16 = 400MHz, PLL OUT
PLL_RSET(PLLDIV0, PLL_PLLDIV0_RMK(1, 0)); // 25MHz / 1 = 400MHz, PLL REF
PLL_RSET(OSCDIV1, PLL_OSCDIV1_RMK(1, 1)); // 25MHz / 5 = 5Mhz
/* Set EMIF clock */
PLL_RSET(PLLDIV3, PLL_PLLDIV3_RMK(1, 4)); // 400MHz / 5 = 80MHz
PLLDelay(20);
/* Set peripheral clock,SYSCLOCK2 must be exactly half of SYSCLOCK1 */
PLL_RSET(PLLDIV2, PLL_PLLDIV2_RMK(1, 3)); // 400MHz / 4 = 100MHz
PLLDelay(20);
/* Set DSP clock */
PLL_RSET(PLLDIV1, PLL_PLLDIV1_RMK(1, 1)); // 400MHz / 2 = 200MHz
PLLDelay(20);
/* Take PLL out of reset */
PLL_deassert();
PLLDelay(4000);
/* Enalbe PLL */
PLL_enable();
PLLDelay(20);
Running the above program, an ECLKOUT signal with frequency 80MHz can be obtained. I test the signal with oscilloscope and find it was a
sinusoidal wave with amplitude about 0.5V. When I decrease the ECLKOUT frequency, the amplitude increases. When ECLKOUT =25.5MHz, the amplitude
is about 3.0V,but the signal is still sinusoidal wave. When the ECLKOUT frequency decreases more, for example, ECLKOUT frequency is 11.25MHz, the signal is more like a square wave. I don't konw what the problem is with C6713-200 chip. The signal CLKOUT2 is also suffering from the same problems.
