Omapl138 running at 456MHz

You might find the power supply reference designs from the Analog eLAB Helpful

Hi Drew:

     yes,I have seen it ,but it focus on the power supply core voltage at 1.2v, but nothing about 1.3v at high frequence ,456MHz.

There might be a way to up the core voltage from the PMIC - it would be worth you while to check in with the Power Management Forum to see if this is possible. This is the only reference design that I am aware of other than schematics for EVM's

My standard design uses a 375MHz part running at 360MHz with a 24MHz input clock.  I wanted to see what the performance of the part  running at 450MHz so I changed the core voltage to 1.3V, changed the 24MHz to 25MHz and redid the software.  It was easy for me to bump the voltage because I did not use a PMIC.  Anyway, result is a noticeable improvement in performance.

hi Victor,

     Thanks for your reply.   I use a pmic  to supply 1.3V /1.8V/3.3V, use a  LDO to supply RVDD, PLL0_VDDA, PLL1_VDDA, USB_CVDD, SATA_VDD 1.2V,

if don't change the 24MHz to 25Mhz,  the core can't run at 450MHz, right? if your core voltage is 1.3V ,how did you to supply  RVDD, PLL0_VDDA, PLL1_VDDA, USB_CVDD, SATA_VDD , Connect to CVDD or use a separated LDO?

Thanks!

You have to use 25MHZ in order to multiply up to 475MHz.  I only went up to 450MHz because I need to divide the PLL3 to be below 66MHz.

My power supply guy was able to only bump up the 1.2V to 1.3V.  The other two rails remained the same. So, whatever was powered by 1.2V is now at 1.3V.  Note that this was just a bench test to compare performance.  My prototype has been running flawlessly with these changes for over a month.

Victor,

       Thanks!  Before bumped up the 1.2V to 1.3V,  the RVDD, PLL0_VDDA, PLL1_VDDA, USB_CVDD, SATA_VDD and CVDD is a 1.2V net ,  so you bumped up 1.2V to 1.3V ,

all 1.2V was bumped up to 1.3V.  As you said, your prototype has some flawles, Do you discribe it. 

Thanks!

I said my unit was running flawlessly. I see no problems with it on the bench with these prototype changes.

You do know there is a price premium and longer lead time for the 475MHz part.  Is there a reason why you want to run it at 456MHz instead of 475MHz?  I had to run it at 450MHz which gives me a EMIFA clock of 64MHz.   If I run it at 475MHz, then the EMIFA clock would have been only 59MHz.  I cannot exceed 66MHz on the EMIFA clock.  Do you have the same kind of limitation?