GPMC write to SMSC9220 ethernet on OMAP/DM3730 BBXM style board

Hi there,

I'm working on the bringup of a board that's based on the Beagleboard-XM design. The bringup has been going well and I've been impressed by the overall quality and ease of development with xloader and u-boot. Most things worked straight off the bat so thanks to the TI and other folk who did the hard work for that. I've posted the full patches that I've made to the xloader and u-boot codebase for my bringup here: https://sites.google.com/site/w2debug/debug1 Hopefully, I'll be able to get it merged into upstream with some time.

Ok, so the problem I wanted to talk about has to do with GPMC. On this board, I used GPMC cs4 to interface with a SMSC 9220 ethernet controller. This is much the same as what is done on other similar boards such as the TI EVM. When I tested this, I found that in u-boot, I'm able to detect and read registers from the SMSC9220 like the ID register and BYTE_TEST register. But it fails to establish link state, and fails to send out any packets. When I debugged this further, I found that it appears that GPMC writes to the SMSC9220 controller weren't having any effect. For example, writing various patterns to the INT_EN register always read back as 0. Same is true with PMT_CTL. My consolelog that shows this is appended below. I have setup GPMC cs4 in what I believe is the correct way:

+static u32 gpmc_net_config[GPMC_MAX_REG] = {
+       NET_GPMC_CONFIG1,
+       NET_GPMC_CONFIG2,
+       NET_GPMC_CONFIG3,
+       NET_GPMC_CONFIG4,
+       NET_GPMC_CONFIG5,
+       NET_GPMC_CONFIG6,
+       0
+};

+       /* Configure GPMC registers */
+       enable_gpmc_cs_config(gpmc_net_config, &gpmc_cfg->cs[4],
+                             CONFIG_SMC911X_BASE, GPMC_SIZE_16M);
+
+       /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
+       writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
+       /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
+       writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
+       /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
+       writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
+               &ctrl_base->gpmc_nadv_ale);

My pinmux looks correct and I verified that the chip select works, as can be seen since register reads work fine. So I'm a bit confused why writes wouldn't work. I would welcome any advice or suggestions on what I should check out.

U-Boot 2011.06-rc1-00063-gb3a6f32-dirty (Jun 05 2011 - 19:51:24)

Thanks,

jayakumar