C6474 doorbell interrupt

Xiaoyan,

Looking at table 7-13 and 7-15 in: http://focus.ti.com/lit/ds/symlink/tms320c6474.pdf

You can see that

RIOINT 0-1 go to core 0 event 70 & 71

RIOINT 2-3 go to core 1event 70 & 71

RIOINT 4-5 go to core 2 event 70 & 71

RIOINT7 can go to all cores through CIC3, or to the TPCC for use with the EDMA when using the EDMA to program the LSU.  (See DIOLib:http://processors.wiki.ti.com/index.php/DIO_Library)

You should not use RIOINT7 if you are trying to interrupt more than one core, so use the others.

So in order for you to use the DOORBELL message to cause an interrupt, you have to setup some of the SRIO interrupt registers, specifically the DOORBELLn_ICRR and DOORBELLn_ICCR2 registers.  Please refer to section 4.4 in:

http://focus.ti.com/lit/ug/sprug23d/sprug23d.pdf

So depending on which DOORBELL ICSR bits you want to cause the interrupts to the various cores, you must set up these routing registers, where INTDSTn at the peripheral level equates to RIOINTn at the device level.  After that just make sure you send the appropriate Doorbell INFO field to set the ICSR (see figure 42).

Regards,

Travis

Travis，

        First, thank you for your answer for that I have achieved some useful information from your explanation,but there are still some problem.

        some configurations are as follows: the doorbell info field which the C6455 send is 0x0000h,and at the C6474 side, the doorbell0_ICRR=0x00000000h,and the event is CSL_INTC_EVENTID_RIOINT0, and use vectid_4, and do not use CIC[2:0], I feel these configuration are correct,but the doorbell is triggered from c6455,the c6474 can not response,so can you give me some suggestion ?do you know what the possible problem is?

        Thanks a lot!

       xiaoyan

Xiaoyan,

Is the ICSR bit in the C6474 being set?  Wondering if the problem exists external to the SRIO peripheral, or if something else is going on.  What is the LSU completion code, CC, for the doobell in the C6455?  Are you able to send other data packets successfully (you see the correct memory contents in the C6474), just having issues with the doorbells? 

Regards,

Travis

Travis,

          Thanks for your attention. I will answer your question one by one.

          The ICSR bit is not being set, the LSU completion code is 0000,and the data packets can be sent successfully,that is i can see correct memory contents in the C6474.

          The interrupt configuration programme is as follows:

void InitDoorBellIntr()

{ 

/* Intc module initialization */

    intcContext.eventhandlerRecord = EventHandler;

    intcContext.numEvtEntries = 10;

    CSL_intcInit(&intcContext);

//HPI/PCI Host interrupt hook to int13

         vectId = CSL_INTC_VECTID_4;

         hIntc20 = CSL_intcOpen (&intcObj20,   CSL_INTC_EVENTID_RIOINT0,                                                              &vectId,

                                                                 NULL);

/* Enable INT13 */

    CSL_intcHwControl(hIntc20,CSL_INTC_CMD_EVTENABLE,NULL);

// Hook Isr appropriately

         CSL_intcHookIsr(CSL_INTC_VECTID_4,&DoorBellIntr);

//select Events to Int4~Int15(Evt16(I2c) to Int4) others is GPIO Evts

  //  INTMUX1 = 0x33343547;

/*clear the Doorbell ICSR*/

         RIO_DOORBELL0_ICCR = 0xFFFFFFFF;

/*set the ICRR,route to INTDST0*/

   RIO_DOORBELL0_ICRR = 0x00000000;

/*set the RIO_INTDST0_RATE_CNTL*/

         RIO_INTDST0_RATE_CNTL = 0x00000001;

/* Enable NMIs */

    CSL_intcGlobalNmiEnable();

/* Enable global interrupts */

    CSL_intcGlobalEnable(NULL);

} 

 And the Doorbell packet is defined as follows :

void DoorBell_int(Dest_ID)

{

   RIO_LSU1_REG0 = (0x00000000);        

   RIO_LSU1_REG1 = (0x00000000);  //in l2 ram      

   RIO_LSU1_REG2 = (0x00000000);  //data addr      

   RIO_LSU1_REG3 = (0x00000002);  //4B      

   RIO_LSU1_REG4 = (0x20000001|(Dest_ID<<8));

   RIO_LSU1_REG5 = (0x00000fA0);

   while((RIO_LSU1_REG6 & 0x00000001) ==0x0001){};

}

       Are there problem in these two programme?

      Thank you again.

      xiaoyan

Xiaoyan,

If the ICSR bit is not set, the problem is not in how you have your interrupt routing configured at the device level.  The DOORBELL ICSR bit should be set, regardless if you set the pacing register or route the INTDST correctly to cause an interrupt.  What I can not understand is how you have a LSU CC = 0b000, but the ICSR bit is not set in the C6474.  If the doorbell was truly sent from the C6455 device, the LSU bsy bit would be set until either a) it received a DONE response from the C6474 that the ICSR bit was set, b) it received a RETRY response from the C6474 that the ICSR bit was already set, or C) there was a timeout, no response was sent.  There are also programming errors possible in the LSU the would prohibit the packet from being sent out at all, but in this case and in case B and C, the CC is not 0b000.  Only case A should result in 0b0000. 

They only thing I see strange in the above is that you have set the byte count to 2.  This field is a don't care for Doorbell packets since it uses the doorbell info field to fill in those two bytes.  It should not make a difference, but can you try to change this to 0 bytes and see if it has any affect.  If you are able to send data packets and aren't in some errored condition, this has to be a very minor/easy explanation to why this isn't working.  After I sent my response yesterday, I was thinking it was going to be the pacing register, but that doesn't appear to be it.  Try to figure out why the ICSR bit is not getting set.

Regards,

Travis

Travis,

         There is also a problem, it takes a long time to send the doorbell packet for the c6455, that is the total time is not normal.

        I will debug again carefully to find the reason.

      Thank you very much for your help.

       xiaoyan.

Travis,

          Just now, a new progress ocurrs, that is when C6455 send the data packet to c6474,the LSU CC=0b000,but when sending the doorbell pacekt ,the LSU CC=0b001,that is the timeout ocurr, but the timeout value is 3~6 seconds , i do not know why the doorbell response is not been received, is it associated with the c6474`SRIO configuration?if the timeout ocurrs, what is the possible reason that causes it ? I am very eager to get your suggestion.

         xiaoyan.

Yes, CC = 0b001 would prevent the ICSR bit from being set.  So if you are seeing Port_OK, then check the error registers on both devices.  You must clear all the error-stated conditions before sending any packets.  Check out the following thread which explains:

http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/439/p/11735/45935.aspx#45935

Also, make sure the the ENFTP bit of the SerDes registers are set to 1 for C6455, and are set to 0 for the C6474.  That is a common issue that has burnt people in the past.

Regards,

Travis

Xiaoyan,

Great, I'm glad you figure it out.  Knew it had to be something simple :)

For explanation on outbound credit issue, see the following thread:

http://e2e.ti.com/support/dsp/tms320c6000_high_performance_dsps/f/112/p/71298/346980.aspx#346980

Regards,

Travis