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How to calculate the processing time of a function?

I have a DM648 EVM, and want to measure it's mpeg-4 encoding performance.  There is an example within the SDK.  It does not use the tcf file to configure DSP/BIOS and has no thread besides the main function.  So I can not use CLK_gethtime() to recode the elapsed time.  Is there any other API I can use to recode the time?

Thanks.

  • I've suggested how this might be done in previous posts such as this one but unfortunately I do not have an actual code snippet to give. I will see if I can find code that does this but it will not be difficult to program the timer yourself in any case.  

  • Please search for the Application Report SPRA887. Even though the app report is written for a specific library and not specifically for the DM648, there is an example on page 5 that shows how to use the CSL TIMER module functions to measure the elapsed time of a called function.

  • Thanks, it's very useful.

  • Thanks. 

  • FYI, the time stamp counter in the CPU is extremely easy to use.  Here's some example code:

    extern cregister volatile unsigned int TSCL;

     

    // to start the timer you need to do a one-time dummy write

    TSCL=0;

    :

    :

    :

     

    // Inside your code to be benchmarked do something like this

    Start_time = TSCL;

     

    // run code to be benchmarked here

     

    Stop_time = TSCL;

     

    Total_cycles = Stop_time – Start_time;

  • It's exactly what I used. Thanks.  By the way, TSCL stores CPU cycles that has elapsed?  If the CPU is 891MHz, is that means TSCL will be 891,000,000 after 1 second?  For I found it increased too slow.

  • dou guo said:

    It's exactly what I used. Thanks.  By the way, TSCL stores CPU cycles that has elapsed?  If the CPU is 891MHz, is that means TSCL will be 891,000,000 after 1 second?  For I found it increased too slow.

    The time stamp counter (TSC) runs at CPU/1 speed.  If it's increasing too slowly then you may have your PLL programmed incorrectly.  How are you measuring the speed it increases?  How much do you think it's off?

  • in CCS, you can add a breakpoint in the beginning and the end of your function. Then simulate it and profile the cpu clock cycle. you can get the clock cycle count and transform them into time. Possibly it's a approximate result.

  • dou guo said:

    If the CPU is 891MHz, is that means TSCL will be 891,000,000 after 1 second?

     

    After 1 second TSC will be 891,000,000 higher than the previous time you read it. TSC is the concatenation of TSCH and TSCL. When you read TSCL, TSCH is latched to give you the correct high-32 bits of the count so that there is no mismatch when a rollover occurs. Since TSCL is the low 32 bits of TSC, it will rollover every 4.8 seconds at 891 MHz.

    In hardware (not simulator), TSC may continue counting even when the DSP is halted by emulation.

    What count value did you get that was too slow? And how are you establishing the time between two reads of TSCL?

  • On this point the easiest way to check the TSC would be to create a 1-second interrupt which reads and stores the TSCH/L values. If using BIOS you could easily create a PRD function to execute once every 1000 ticks (by default a tick is 1ms) and then have the PRD function read both registers. You should be able to see the TSC increment approximately 891,000,000 times between each call of the PRD function.

  • I check TSCL value using CCS's view-> register function.  I fount that after the program had executed even for several minutes, the TSCL does not rellover and TSCH is always 0. 

    I use a  XDS560 PCI emulater to connect DM648 EVM.

  • I do not use BIOS, so the first one is prefered.  Thank you anyway.

  • I do not set PLL manually.  I check TSCL value using CCS's view-> register function.  I fount that after the program had executed even for several minutes, the TSCL does not rellover and TSCH is always 0.   Because it's National Holiday, I will not go back to work until Oct. 9,  so I can not check whether PLL is set correctly now.  Anyway, thanks for your advice.

  • Based on this behavior I would definitely double-check your PLL settings as it sounds like the CPU is not running at full speed. I took Brad's code and added a dummy delay loop:

     // to start the timer you need to do a one-time dummy write
     TSCL=0;

     // Inside your code to be benchmarked do something like this
     Start_time = TSCL;

     // run code to be benchmarked here
     // Dummy loop
     for(counter = 0; counter < 1000; counter++);
     
     Stop_time = TSCL;

     Total_cycles = Stop_time - Start_time;

    With this code the Total_cycles is equal to roughly 11000. If I double the dummy loop from 1000 to 2000 then the Total_cycles reaches about 22000. This is about what I expect to see here, so I decided to change to the PRD implementation I suggested before. My periodic function is called every 100ms and reads the current value of TSCL and prints that value via LOG_printf(). Here's a snippet of the output log I received:

    0 TSCL value: 89103665

    1 TSCL value: 178204261

    2 TSCL value: 267304859

    3 TSCL value: 356405461

    4 TSCL value: 445506059

    5 TSCL value: 534606661

    6 TSCL value: 623707259

    7 TSCL value: 712807861

    8 TSCL value: 801908459

    9 TSCL value: 891009061

    10 TSCL value: 980109663

    You will notice that each value is about 89 100 000 cycles apart which is 1/10th the CPU frequency. As I am running my periodic function 10 times per second this matches up almost perfectly. [:)]

  • Thanks, Tim. I can not verify your suggestion right now.  If the problem is the PLL setting, how do I set it correctly?  Is that setted in .gel file?  If that, I noticed that when connecting to EVM board, the GEL Output said that "The CPU is 891MHz", is that correct?

  • Yes, the GEL file should configure the device to operate at 891MHz. If you want to try out the code I sent I can post it up here.

  • It would be best if you can post it.  I will try it out later.

    Thanks a lot.[:)]