DM3730 eDMA TCC Interrupt generation

Hi Guys,

Currently, I'm working on a problem with the DSP side of the DM3730.  We're using DSP Bios 5.41.7.24 and not much else so far.  The data coming in is left justified audio data into McBSP2.

I've managed to enable eDMA, and use it to successfully fill a ping-pong buffer, but I've not yet managed to get the interrupt to fire.  I'm sure I'm not that far away, but I'll post the key piece of code here and hope someone may be able to point out where I'm going wrong.

I get the correct TCC in the IPR, so it's making it that far,  and according to the CPU.IER, IRQ4 is enabled

Hopefully someone out there can see the magic bullet which is required, as I'm getting quite lost here.

Thanks in advance,

paddy

  mcbsp2_params_ping.ACNT = sizeof(unsigned int);
  mcbsp2_params_ping.BCNT = 128;
  mcbsp2_params_ping.CCNT = 1;
  mcbsp2_params_ping.SRC = (unsigned int *)(MY_MCBSP+MCBSPLP_DRR_REG);//(int *) RXBUFF2;//
  mcbsp2_params_ping.DST = (unsigned int *) RXBUFF1;
  mcbsp2_params_ping.SBIDX = 0;//sizeof(int);
  mcbsp2_params_ping.DBIDX = sizeof(unsigned int);
  mcbsp2_params_ping.DCIDX = 0;
  mcbsp2_params_ping.SCIDX = 0;
  mcbsp2_params_ping.SAM = 0;
  mcbsp2_params_ping.DAM = 0;
  mcbsp2_params_ping.TCC = myTCC;
  mcbsp2_params_ping.TCCMODE = 0;
  mcbsp2_params_ping.FWID = 0x2;
  mcbsp2_params_ping.TCINTEN = 1;
  mcbsp2_params_ping.ITCINTEN = 0;
  mcbsp2_params_ping.BCNTRLD = 0;//sizeof(RXBUFF1)/sizeof(int);
  mcbsp2_params_ping.LINK = mcbsp2_pong << 5; //mcbsp2_ping << 5;
  mcbsp2_params_ping.STATIC = 0;
  mcbsp2_params_ping.SYNCDIM=1;
 
  // assign event to TPCCDMAQ1
  *(int *)0x01C00240 = *(int *)0x01C00240 | (0x1<<16);
 
 
  //SYSC_LICFG0 Table: 5-482 SPRUGN P.996
  // ref: 5.4.4.6.7 DMA Completion mode.
  *(int *)0x01C20040 = *(int *)0x01C20040 | 0x300;
 
  eDMA_EnableTCCInterrupt(myTCC); //TPCC_IESR
 
 
  // Enable TPTC0_INTEN: 5.3.2.1.2.4 Completion Interface to TPCC P.709
  *(int *)0x01C10108 = *(int *)0x01C10508 | 0x02;
 
  C64_enableIER (isr_mask | C64_EINT4);
 
  eDMA_AssignChannelToEvent(mcbsp2_ping, EDMA_MCBSP2_DMA_RX); //TPCC_DCHMAPI
 
  eDMA_EnabledEvent(EDMA_MCBSP2_DMA_RX); //TPCC_EESR & WUGEN_MEVTSET2
  WUGEN_EnableInterrupt(IVA_IRQ_MCBSP2_IRQ_RX); //WUGEN_MEVTSET0

  WUGEN_ClearEvent(EDMA_MCBSP2_DMA_RX); //WUGEN_MEVTCLR2

 

 Also, within the DSP/BIOS TCF file I have:
 
  bios.HWI.instance("HWI_INT4").fxn = prog.extern("SDMATxRx");
  bios.HWI.instance("HWI_INT4").useDispatcher = 1;
  bios.HWI.instance("HWI_INT4").interruptSelectNumber = 29;