TCI6486 EVM SRIO CSL external loopback fail

This is an SRIO external loop-back... You will need to externally short the Tx and Rx... I have a board having TCI6486 working fine with the CSL SRIO external loopback example..

Regards,

Amit

(amitkumar.einfochips.com)

One more thing, the following code does not seem to work:

    /* Init PSC module */
    CSL_pscInit(NULL);

    /* Open PSC module to get a Handle */
    hPsc = CSL_pscOpen(&pscObj, CSL_PSC, NULL, &status);

    /* Enable clock for the specified module SRIO */
    CSL_pscHwControl(hPsc, CSL_PSC_CMD_ENABLE_MODULE, &module);
    /*Enable SRIO Power domain GO transition */
    CSL_pscHwControl(hPsc, CSL_PSC_CMD_PWRDMN_TRNS, &pwrDmn);

Check MDSTAT6 register for the status of clock gating to SRIO. The last nibble should be '3'.

I got it working by writing to the MDCTL6 register of PSC as follows:

    //enable clock to SRIO
    PSCR->MDCTL6 = ((PSCR->MDCTL6) & (0xFFFFFFE0)) | (0x03);
    PSCR->PTCMD = 0x01;
    while (((PSCR->MDSTAT6) & 0x1F) != 0x03);

Hope this will help you.

Thanks,

Amit

(amitkumar.solanki@einfochips.com)

Amitkumar, thank for your information. CSL external loopback "enableSRIO()" initialize SRIO clock and power domain. I can pass the following testing.

//enable clock to SRIO
    PSCR->MDCTL6 = ((PSCR->MDCTL6) & (0xFFFFFFE0)) | (0x03);
    PSCR->PTCMD = 0x01;
    while (((PSCR->MDSTAT6) & 0x1F) != 0x03);

I was still failed in the following initialization. could you please help me?

do{
     /* Setup the SRIO with the selected setup in the last step */
  status = CSL_srioHwSetup(hSrio, &hwSetup);
     if (status!=CSL_SOK){
      LOG_printf(&LOG0, "CSL_srioHwSetup failed/n");
         return;
     }

  //Delay for PLL? need to re-clear errors?
  for(index=0; index<0x10000; index++) {
         dummy_cnt = index + 1;
   dummy_cnt++;
  }

  CSL_srioGetHwStatus (hSrio, CSL_SRIO_QUERY_SP_ERR_STAT, &response);

 }while(response.data & 0x1);

I will try to connect mini-SMB cable between Tx and Rx later. By the way, someone told me TCI6486 EVM with 4 DSPs had the SRIO interface connected in a chain. Conceptually, I could use DSP0 to connect DSP1 by SRIO without external Tx and Rx short. I am not sure if it will or will not work for this situation.

Hi Sungyi,

Your code works fine on my board. I am having a board based on TCI6486. I have externally shorted Tx and Rx  pins.

Regards,

Amit

(amitkumar.solanki@einfochips.com)

Anitkumar,

Thank for your sugguestion and help. TCI6486 EVM user guide showed 4 DSPs SRIO were connected in a chain.

Can I just modify the CSL external loopback example for DSP0 and DSP1 by internal SRIO chaining?

The original Poster mentioned :-

2.          TCI6486 CSL SRIO external loopback example:

response.data & 0x1 returned returned error and it meaned SRIO was not initialized.

Please refer to “srio_external_loopbk_example_fail.rar” and “CSL SRIO external loopback example.doc”

(   CSL_srioGetHwStatus (hSrio, CSL_SRIO_QUERY_SP_ERR_STAT, &response);   )

Basically the SERDES do not "initialise" until both ends of the link have been physically connected and enabled and can send control symbols between each other I guess the code fails here because there is no loopback cable so RX and TX blocks are not connected.

The documentation isn't very clear on this point.

It's also worth mentioning that you have to keep calling CSL_srioHwSetup until all the ports you want to used are initialised, I think this is effectively  pulsing the BOOT_COMPLETE bit and thus forcing the Serdes to restart/re-attempt the initialisation sequence.

Again the documentation doesn't make this clear.

Hope this is of some help.

Best Regards

Bryan