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AM623: VTT regulation and decoupling

VM
Intellectual 805 points
Part Number: AM623
Other Parts Discussed in Thread: TPS65219

Hi,

The reference layout for the AM6232 does not show VTT regulation and decoupling, which seems like an excellent reduction in additional board space for my customer. They have stated that speaking with the memory suppliers they use, they still recommend its use.

Please advise whether the AM6232 has some internal architectural features that mitigate the risk of eliminates the VTT regulator. As far as I know the recommended PMIC (TPS65219) does not have the regulator suggesting that they may be able to avoid.

Many Thanks

  • 0
    TI__Guru**** 160769 points

    Hello Vanessa Mwanga, 

    Thank you for reviewing the layout and providing your thoughts. 

    The DDR termination depends on the layout topology. 

    As mentioned by you,  the VTT regulation and decoupling cap reduction was based on customer queries and inputs.

    If space or cost is not a concern, you could always consider adding termination.

    Regards,

    Sreenivasa

  • 0
    TI__Guru* 77720 points

    VTT termination is not necessary with the AM62x as long as you only have one DDR4 device in the design, and thus all signals addr/ctrl/data are point to point connections.  It is highly recommended that you perform board level signal integrity simulations to ensure adequate read/write eye margins. 

    If the memory supplier is still suggesting VTT, then i cannot refute that.  Be sure to explain to them that you would only use one memory device at a max data transfer rate of 1600MTs. 

    Be sure to follow all the design rules in our DDR design and layout guidelines app note:https://www.ti.com/lit/pdf/sprad06  This app note does indicate that you need VTT termination for DDR4 designs, but we are working on removing that requirement for the next revision of the app note.

    Regards,

    James