EMIF clock on TMS320C6455 DSK

Vladimir Podosinov said:

Hi,

I have a TMS320C6455 DSK kit from Spectrum Digital. I am trying to clock an external DAC with parallel input, and using Asynchronous EMIF write for that. I guess here are couple of the questions:

1. AECLKOUT which suppose to be used by EMIF cycle can be up to 166 MHz, which means with 2 cycle turn around time and 1 cycle for SETUP/STROBE/HOLD, the maximum clock (AWE) is 33.2 MHz. Am I correct, or there is any way to make it faster?

166 MHz is the max clock speed.

Vladimir Podosinov said:

2. I am trying to make AECLKOUT to be 166 MHz, as a reference I am using pin 78 on Peripheral connector to measure output with oscilloscope. There is a lot of amiguity. SPRU971c, says the input clock is SYSCLOCK3, TMS320C6455 manual says it's SYSCLOCK4. I was able to change SYSCLOCK4 in GEL file, and see output at TP11 on DSK. However, ECLK_OUT pin 78 still has 96 MHz clock. What is wrong, or is there some sort of register I need to change? How to get that 166 MHz clock?

Thanks for any replies.

Vladimir

Sorry, the datasheet is correct and the EMIF user guide is wrong.  You should use the AECLKINSEL bit to choose between SYSCLK4 and AECLKIN as the input clock to the EMIF.  Then set the PLLDIV4 value and make sure the divider is enabled.  If you're not seeing the value that you expect then perhaps your CPU frequency is also wrong (e.g. SYSREFCLK) or else one of your dividers is not programmed correctly.