6455 writing bytes to the EMIF

I found this sample code which is almost what I want.

void emifaReadWrite (
    void
)
{
    Uint32                result, index, tempData;
    CSL_EmifaObj          emifaObj;
    CSL_Status            status;
    CSL_EmifaHwSetup      hwSetup ;  

    CSL_EmifaMemType      asyncVal, syncVal;
    CSL_EmifaAsyncWait    asyncWait = CSL_EMIFA_ASYNCWAIT_DEFAULTS;
    CSL_EmifaAsync        asyncMem = CSL_EMIFA_ASYNCCFG_DEFAULTS;
    CSL_EmifaSync         syncMem = CSL_EMIFA_SYNCCFG_DEFAULTS;

    /* Pointer that points to Async(CE3) start area */
    Uint32 *pAsyncData = (Uint32 *)EMIFA_CE3_BASE_ADDR;

    /* Pointer that points to Sync(CE3) start area */
    Uint32 *pSyncData = (Uint32 *)EMIFA_CE3_BASE_ADDR;
   
    /* Clear local data structures */  
    memset(&emifaObj, 0, sizeof(CSL_EmifaObj));     
    memset(&hwSetup, 0, sizeof(CSL_EmifaHwSetup));

    /* setting for asynchronous type */
    asyncVal.ssel = EMIFA_MEMTYPE_ASYNC;
    asyncVal.async = &asyncMem;
    asyncVal.sync = NULL;

    /* setting for synchronous type */
    syncVal.ssel = EMIFA_MEMTYPE_SYNC;
    syncVal.async = NULL;
    syncVal.sync = &syncMem;
   
    /* setup the hardware parameters */
    hwSetup.asyncWait = &asyncWait;
    hwSetup.ceCfg[0] = &asyncVal;  
    hwSetup.ceCfg[1] = NULL;
    hwSetup.ceCfg[2] = &syncVal;
    hwSetup.ceCfg[3] = NULL;     
       
    printf("\tInfo: Read-Write operations of EMIFA \n"); 

    /* Initialize EMIFA CSL module */
    status = CSL_emifaInit(NULL);
    if (status != CSL_SOK) {
        printf("EMIFA: Initialization error.\n");
        printf("\tReason: CSL_emifaInit [status = 0x%x].\n", status);      
        return;
    }
    else {
        printf("EMIFA: Module Initialized.\n");
    }

    /* Opening the EMIFA instance */
    hEmifa =  CSL_emifaOpen(&emifaObj, CSL_EMIFA, NULL, &status);
    if ((status != CSL_SOK) || (hEmifa == NULL)) {
        printf("EMIFA: Error opening the instance. [status = 0x%x, hEmifa \
                = 0x%x]\n", status, hEmifa);       
        return;
    }
    else {
        printf("EMIFA: Module instance opened.\n");
    }
   
    /* Setting up configuration parameter using HwSetup */
    status =  CSL_emifaHwSetup(hEmifa, &hwSetup);                    
    if (status != CSL_SOK) {
        printf("EMIFA: Error in HW Setup.\n");         
        printf("Read write operation fails\n");
        return;      
    }
    else {
        printf("EMIFA: Module Hardware setup is successful.\n");
    }
   
    printf("\tInfo: Async read write \n");
    /* Write 'invalid' values into EMIFA CS2 area. This is to overwrite the
     * previous valid values.
     */
    tempData = 0xdeadbeef;
    for (index = 0; index < DATA_CNT; index++) {
        pAsyncData[index] = tempData;
    }

    /* Write **valid** values into CS2 area. */
    tempData = 0x55550000;
    for (index = 0; index < DATA_CNT; index++) {
        pAsyncData[index] = tempData + index;
    }

    /* Verify that the data was indeed written */
    result = DATA_MATCH_SUCCESS;
    for (index = 0; index < DATA_CNT; index++) {
        if (pAsyncData[index] != (tempData + index)) {
            result = DATA_MATCH_FAIL;                    
            break ;
        }
    }

    /* Print the appropriate messages */
    if (result == DATA_MATCH_SUCCESS) {
        printf("\nAsynchronous Read Write is Successful\n");
    }
    else {
        printf("\nAsynchronous Read Write is NOT Successful\n");
    }      

    printf("\tInfo: Sync read write  \n");
    /* Write 'invalid' values into EMIFA CS4 area. This is to overwrite the
     * previous valid values.
     */
 
    tempData = 0xdeadbeef;
    for (index = 0; index < DATA_CNT; index++) {
        pSyncData[index] = tempData;
    }

    /* Write **valid** values into CS4 area. */
    tempData = 0x56780000;
    for (index = 0; index < DATA_CNT; index++) {
        pSyncData[index] = tempData + index ;
    }

    /* Verify that the data was indeed written */
    result = DATA_MATCH_SUCCESS;
    for (index = 0; index < DATA_CNT; index++) {
        if (pSyncData[index] != (tempData + index)) {
            result = DATA_MATCH_FAIL;                 
            break ;
        }
    }

    /* Print the appropriate messages */
    if (result == DATA_MATCH_SUCCESS) {
        printf("\nSync Read Write is Successful\n");
    }
    else {
        printf("\nSync Read Write is NOT Successful\n");
        printf("\tReason:Error in data read.[status = 0x%x]\n", status);
    }     
    return;
}

My question is because of the way my Hardware is connected i need to use AAWE#/ASWE# for the clock and ACE2# for write enable. Is it possible to set up the EMIF like this?

lester davis said:

My question is because of the way my Hardware is connected i need to use AAWE#/ASWE# for the clock and ACE2# for write enable. Is it possible to set up the EMIF like this?

THe emif port is hooked to an FPGA, and the FPGA person said this is how these pins need to work. Hopefully the FPGA is flexible enough to do it the way it is wired.

Thanks

RIngo

The FPGA is definitely going to be more flexible than the EMIF will be. I think you should be able to configure it to properly communicate with the EMIF.

Looking at this sample code I'm confused.

First there is

   /* Pointer that points to Async(CE3) start area */
    Uint32 *pAsyncData = (Uint32 *)EMIFA_CE3_BASE_ADDR;

    /* Pointer that points to Sync(CE3) start area */
    Uint32 *pSyncData = (Uint32 *)EMIFA_CE3_BASE_ADDR;

so pAsyncData and pSyncData point to the same place which is CE3.

Then in the code it says it is wrinting to CE2 using pAsyncData and writing to CE4 using pSyncData. Am i missing somehting or are the first definitions incorrect?

From where did you find this code? CE4 (on the DSK) is connected to the headers and not any memory, so I don't know why the example code would mention that chip enable. Also, CE3 is connected to Flash which requires a little more hand-holding than what I saw in the code snippet. So while I do not understand why the Sync and Async areas are both inside CE3, I do not see how this code would work to begin with.

I'm assuming the code was installed with the 6455 EVM. It is located here
C:\CCStudio_v3.3\boards\dsk6455_v2\csl_c6455\example\emifa

I know there is not any memory on the DSK, but there is an FPGA there on my production board. I'm just trying to sort out the code so I understand it.

So I'm assuming I need to declare the location for CE2 and change the bas address to use that location then I should be able to use the code with the FPGA on CE2. I'll just be writing, not reading.

the test code seems to work, there is data coming out of the FPGA. But now I need to send real data wheich will be an MPEG stream. I have a stream captured and in ascii format. It is very long, about 3 MB. Is there a way to read this file then send it out the EMIF? The file looks like this:

47 3e 00 18 99 0b 6e 6c  2a b1 6f 5a 87 b7 11 cd 
c5 23 21 3e 4c 93 ea 8d  fc 6b 85 34 85 b6 28 d1 
be cd bc a6 8d a2 30 8d  9d 99 86 86 99 d4 45 1b 
f8 cc ce d4 b5 8d f6 2d  e3 b7 12 0b 10 d7 77 26 
e3 05 69 3e ee 30 4e 61  dd c6 fb 17 f7 74 6f e3 
44 8d a8 f8 c9 4b 6d d4  b6 fb 26 f1 1b 8c 42 65 
67 49 1f 3d a6 a8 a2 6c  5b c9 d2 47 5c 60 6b b8 
46 3b 3b bb 89 55 6e 19  3d dc 20 1f d3 2e e1 9c 
a6 46 ce ab 83 99 49 1e  4d 1b f8 ae d4 a3 6a 6a 
4e 6f 6d b8 db 88 25 d2  ee e3 1e 0a 98 d9 77 71 
16 8e 08 79 ee 31 5a 9f  c9 b8 6a a1 65 2a f5 c5 
03 91 54 55 dc 5f 27 52  4f f5 97 75

Then keeps going. It is way to long for copy-paste so I'm hoping there is a way to read the text file.

Any suggestions?

Ringo

You have choices for how to access the file data, depending on what is convenient for you. Here are some options:

1. In your program, allocate a large array that can store your data. Then in CCS use File->Data->Load to read from your source data file and copy the data to the large array that you have allocated. Then your application can read from that array and transfer the data to the FPGA via EMIF. To be sure of the data format, you might want to do File->Data->Save first to create a file in one of the available formats, then look at that file to see how you should format yours. This method will give you the top speed for accessing your data within the application.

2. GEL supports some file I/O functionality. Look at the Help file for some ideas on using this (Help->Contents look for "FileI/O functions through GEL" and "file I/O".

3. Use <stdio.h> to access the standard CIO functions like fscanf and fgets. This method will give you the greatest application flexibility, but it will likely be pretty slow since the data has to stream across the JTAG interface to get to the C6455, and CIO functions are notoriously slow - at least when compared to a high-speed DSP like the C6455.

Are these what you were looking for?

Thanks, this is what i'm looking for. Is there a document somewhere that describes #1 above and exactly how to do it? I created a couple files using load as suggested and don;t fully understand the header.

1 file starts with

1651 1 0 0 500   Where 500 is the length

Another starts with

1651 2 0 0 200  where 200 is the length. I'm assuming the 1 and 2 are the file type, but what is 1651 and what are the other two 0's?

Also, when I do a file->load and load one of these files it looks like it does it but it never asks me where to store it. So it is loaded to memory I guess but how do I get it in an array. There must be a step I'm missing.

Thanks

Ringo

I found the help file that describes what each number is for, but I still don;t see how to get the data into the array.

You will soon have found all your answers on your own. :)

The place to look: from inside CCS, Help->Contents, then Index tab, then type in "loading data files". There are step-by-step instructions for what you want to do, and a link to the Data File Formats description.

I have seen that page but I still don't get how to declare the array so it points to the right memory address. I guess it is a syntax thing I'm not getting.

I can declare an array like this

Uint32                  data[771000];

and I can load the data into SDRAM at 0xe0000000 using file->load, but how do I point the array to 0xe0000000?

Ringo

When you compile, link, and load your program, the symbols will be available to CCS. Then you can use "data" (no "s) in the Loading File into Memory  Address field. CCS will resolve the symbol and put the physical address into the field.

To figure out how to put your array at a specific location, you will need to look through the Assembly Language Tools and C-compiler User Guides to see how the linker can be controlled and how the C-compiler can control data placement with #pragma's.

Better yet, spring for the IW6455 training class. You will learn what you need to start any program, plus a lot of information that you might not have even known to ask about.

Can u help me??

i need to control daughter card (Emif A). How can i enable Emif?

i think , once i should enable, then i can control emifa...

i will wait your answers...

Can u help me??

i need to control daughter card (EmifA). i think, firstly i should enable EmifA, but How can i enable EMIFA??

Your two posts were tacked onto the end of a thread discussing specific parts of EMIF activity at the chip level for the C6455.

Your two posts appear to be related to operation of board-level components of a specific EVM or development board.

Please do two things to make it easier to help you:

Re-post starting a new thread with a descriptive title for your issue plus include details like board description, DSP device name/number, other details that would be needed to help you.

Then add a short post to this old thread saying you have done this new post. Then we will know to look for the new one and maintain consistency with you.

Ringo,

Can you tell me the connectors you used to interface the DSK's EMIF and the FPGA ? I know its the Samtec ones for the DSK but what about the  FPGA. Do you connect from the EMIF to the XGI headers of the Virtex-5 EVM ?

A quick reply will be greatly appreciated.

Thanks,

Varun

Hi Ringo,

i 'm using TMS320C6455 and TMS320C6211 DSP board and Xilinx XC2S200E FPGA development board as daudhter card. The FPGA board i used have 20MHz ADC DAC units. So i'm using the FPGA board as daugther card. Sampled datas at FPGA board is sent to DSP board.

Regards,

Cenk ALBAYRAK