C667x EMIF16 interface

TI EMIF interfaces are designed to support x32bit, x16bit and x8bit buses.  Internally the A0 address line is always used to address memory on a 32bit boundary.  Since memories that have x16 or x8 bit memory interface require more address lines to address the same amount of memory the TI EMIF interface will reassign the upper address lines to support the need for these additional address lines.  Since the C6672 only has 16 of the data lines on the pins of the part the most significant address line is always needed to support theLSB of the address bus.  If a x8bit memory was attached to the EMIF then the two most significant address lines would be needed. 

If you address the memory internally it will appear in a linear fashion as follows.  A2 will always be the least significant address line for a x32 bit memory access.  A1 and A0 don't change.

Address                    Data

0x000000                 0x33221100

0x000004                 0x77665544

Externally we only have a x16bit interface so to address and external memory the addressing for the above would appears as follows

0x000000                  0x1100

0x000001                  0x3322

0x000002                  0x5544

0x000003                  0x7766

The EMIF interface handles this internally so if you perform a full word read at address 0x000004 it will appear as two x16bit reads externally at address 0x000002 and address 0x000003.  As you can see the EMIF had to generate the least significant address bit so it could delineate to two accesses needed to get all 32bits of data.  Since the EMIF will always assign the internal address bit A2  to the external address A0 pin we reassign the most significant address line to that support that extra address bit.  I know it's confusing but that's they way that TI has defined the EMIF. 

As I mentioned previously the EMIF interface was originally designed to support x32, x16 and x8 bit buses.  If there are 24 actual pins on the device then in x32 bit mode the maximum amount of memory that the 24 address bits could support would be 32bits for each of the 2²⁴ addresses.  The same number of address lines would only return 16bits for each of the 2²⁴addresses or half the amount of memory and half again for an 8bit memory interface. 

The C6672 EMIF will address 2²⁴ 16bit words of memory so the total amount of memory that each CS can support is 2²⁴= 16M x 2bytes or 32Mbytes.

So, we should consider the MSB(s) of the C66x EMIF address lines as BA signals like in C64x's EMIF.

Since there are only 16bit data lines, and the EMIF A0 stands for a 32bit position, why not just define the MSB(s) of the C66x EMIF address lines as BA signals in the datasheet for an easy use?

I have seen the EMIF defined in other data sheets with a number of address lines and two bank address lines.  The C6457 defines the addresses as EA[19:0] and BA[1:0]  for example.  The important difference is the use of the BA address lines in all modes.  The C6457 only uses the BA address lines if memories of 16 or 8 bit widths are used.  If the memory width is 32bits BA[1:0] are inactive limiting the address space to a block that can be addressed by the 20 bits of the EA[19:0] address lines. 

In the C6672 we redefine the upper address bits to act in the same manner as the BA lines in the C6657.  Since we only have a 16bit data bus available A23 will always be redefined but A22 can be either the MSB of the address bus for a 16bit interface or the LSB of the address bus for an 8bit interface.  If we used the BA concept similar to the C64xx devices then that last bit would be inactive in 16bit mode and the memory space would be addressed with 23bits of address instead of the 24bits available.  Rather then lose half the addressable space be making one of the address lines inactive we chose the method that redefines the addresses.  We could have re-numbered the address bus at the balls of the part so that the internal A23 is always defined as A0 on the outside of the part but there is already documentation of the EMIF bus with A0 as the 32bit boundary.  EMIF addressing is confusing enough without contridicting the existing documentation for redefining the top two address lines.