• State
  • Locked Locked
  • Replies 2 replies
  • Subscribers 98 subscribers
  • Views 361 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

6455 EDMA + memory map error

brady
Intellectual 450 points

Hi,

I am trying to simply use EDMA to transfer data from DDR to on-chip memory, and I am a bit stuck.  I believe the PaRAM set is properly configured with the correct source and destination addresses, and the channel is configured to use that PaRAM set, but as soon as I trigger the channel I get the EMR showing a missed event, and the TC ERRSTAT register showing MMRAERR ("User attempted to read or write to an invalid address in configuration memory map.").  I can write to or read from the same addresses as submitted for the transfer if I do it manually.  Anyone have hints as to how to proceed here or what I may be doing wrong?

Many thanks,

B.

  • 0
    TI__Mastermind 41665 points

    I would only expect that bit to be set if the transfer somehow attempted accessing outside of valid memory, though it is hard to say what the problem is based on what you have there, I would suspect some configuration issue with the EDMA, perhaps you could post your PaRAM set?

  • 0 in reply to Bernie Thompson TI
    Intellectual 450 points

    first PaRAM set:

      paramSetupSin.option =    
        CSL_EDMA3_OPT_MAKE( CSL_EDMA3_ITCCH_DIS,
                            CSL_EDMA3_TCCH_EN, 
                            CSL_EDMA3_ITCINT_DIS,
                             CSL_EDMA3_TCINT_DIS,
                            TCC_SIN,            
                            CSL_EDMA3_TCC_NORMAL,
                            CSL_EDMA3_FIFOWIDTH_NONE,
                            CSL_EDMA3_STATIC_DIS, 
                            CSL_EDMA3_SYNC_A,   
                            CSL_EDMA3_ADDRMODE_INCR,
                            CSL_EDMA3_ADDRMODE_INCR 
                            ); 
      paramSetupSin.srcAddr = (Uint32)gOffChipSine;
      paramSetupSin.aCntbCnt = CSL_EDMA3_CNT_MAKE(8192,1); // (ACNT, BCNT)
      paramSetupSin.dstAddr = (Uint32)gLocalSine ; // destination address.
      paramSetupSin.srcDstBidx = CSL_EDMA3_BIDX_MAKE(0,0); // (srcbidx, destbidx) 
      paramSetupSin.linkBcntrld =
        CSL_EDMA3_LINKBCNTRLD_MAKE(hParamCos,0);  // l (LINK, BCNTRLD)
      paramSetupSin.srcDstCidx = CSL_EDMA3_CIDX_MAKE(0,0); //  (SRCCIDX, DSTCIDX)
      paramSetupSin.cCnt = 1; 

     

    The linked-to set is the same except for the source/dest addresses, TCCH is disabled, TCC is different, TCINT is enabled, and it links back to this set.

    Interestingly, it works if I either make ACNT smaller, or if I make it AB-synced and have A*B = 8192.  Am I exceeding a maximum transfer size?

     

    edit:  gLocalSine is in on-chip memory, gOffChipSine is in off-chip memory, if that was not clear.