hi TI
We will be compatible with other DDR IC, and we are using J721s2.
How can I confirm that s2 SDK is compatible with this DDR chip.LPDDR4_SI_Simulation_Report_20221028_V1.0.pptx
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hi TI
We will be compatible with other DDR IC, and we are using J721s2.
How can I confirm that s2 SDK is compatible with this DDR chip.LPDDR4_SI_Simulation_Report_20221028_V1.0.pptx
Waiting for your reply!
Hello,
Can you please give some more information on the DDR IC that you wish to use? This powerpoint is not opening properly.
When you mention our SDK, which SDK release are you referring to? The RTOS or the Linux?
Regards,
Erick
hi
The DDR IC is MT53E1G32D2FW-046 AAT:B. We use both RTOS and LINUX SDK, LINUX-J721S2 08_04_00_13 &RTOS-J721S2 08_04_00_0. In the test report,the chip manufacturer suggests to configure some drive strength(such as DQ CA), so that the chip will work better. I have some questions:
1.where to change the config of the drive strength ?
2. whether the SDK default config compatible with the DDR IC ?
Hello Fengying,
We've notified our DDR experts and you should receive a reply shortly.
Thanks,
Erick
Hi,
You can use the Jacinto7 DDR Register Config tool (https://www.ti.com/lit/pdf/spracu8) to configure drive strength. You can obtain the tool from the link in the Abstract of the corresponding documentation. Please see section 2.3 for more information on the IO Control tab of the tool.
As far as I can tell, the default SDK configuration would likely work with MT53E1G32D2FW-046; however, you may need to alter IO settings for your custom board design.
Regards,
Kevin
hi Kevin
Thanks for your reply! Because of the shortage of chip materials, we may use another two chips, K4FBE3DHW-THCL_32G-40-105°C_4266MHz_M00054 and H54G56BYYQX046_4GB-40-105°C_4266Mbps_M00041, Can these two chips work well on the original sdk?
Hello,
Is this thread still open ?
Best Regards,
Kelvin
Hi,
we may use another two chips, K4FBE3DHW-THCL_32G-40-105°C_4266MHz_M00054 and H54G56BYYQX046_4GB-40-105°C_4266Mbps_M00041, Can these two chips work well on the original sdk?
We ask that you review the LPDDR4 datasheet and fill in the Jacinto7 Register Configuration tool accordingly to generate register settings for each device. If there is a parameter in the tool which further clarification is needed or we have misinterpreted your question, please let us know.
Regards,
Kevin