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VENC1_process freeze on DM365

Julien Biau
Prodigy 20 points
Other Parts Discussed in Thread: THS7303

Hi all,

 

I use a DM365IPNC-MT5 with DVSDK_4 and kernel 2.6.32 to stream (with live555) a h264 video.

But VENC1_process freeze :

 

root@dm365-evm:/# ./loadmodules.sh
CMEMK module: built on Jun 15 2011 at 08:38:07
  Reference Linux version 2.6.32
  File /home/julien/ti-dvsdk_dm365-evm_4_02_00_06/linuxutils_2_26_01_02/packages/ti/sdo/linuxutils/cmem/src/module/cmemk.c
allocated heap buffer 0xc4000000 of size 0x134000
CMEM Range Overlaps Kernel Physical - allowing overlap
CMEM phys_start (0x1000) overlaps kernel (0x80000000 -> 0x82800000)
cmemk initialized
IRQK module: built on Jun 15 2011 at 08:38:11
  Reference Linux version 2.6.32
  File /home/julien/ti-dvsdk_dm365-evm_4_02_00_06/linuxutils_2_26_01_02/packages/ti/sdo/linuxutils/irq/src/module/irqk.c
irqk initialized
EDMAK module: built on Jun 15 2011 at 08:38:15
  Reference Linux version 2.6.32
  File /home/julien/ti-dvsdk_dm365-evm_4_02_00_06/linuxutils_2_26_01_02/packages/ti/sdo/linuxutils/edma/src/module/edmak.c
root@dm365-evm:/# ./encode -5 -I 4
H264 Video Encoder started.
davinci_resizer davinci_resizer.2: RSZ_G_CONFIG:0:1:124
davinci_previewer davinci_previewer.2: ipipe_set_preview_config
davinci_previewer davinci_previewer.2: ipipe_set_preview_config
CODEC_DEBUG_ENABLE: Inside Funtion to get memtab Requirement -> H264VENC_TI_numAlloc
CODEC_DEBUG_ENABLE: Number of memtabs required: 15
CODEC_DEBUG_ENABLE: Inside Funtion to Get Memory Requirements of the current algoirthm  instance -> H264VENC_TI_vpfe-capture vpfe-capture: IPIPE Chained
alloc
CODEC_DEBvpfe-capture vpfe-capture: Resizer present
UG_ENABLE: H264VENC_TI_Obj-memTaEVM: switch to HD imager video input
b[0].size =         0x0710
CODEC_DEBUG_ENABLE: tH264EncState-memTab[1].size =         0x1498
CODEC_DEBUG_ENABLE: tH264EncState-memTab[2].size =         0x1498
CODEC_DEBUG_ENABLE: EXT_MEM_SCRATCH-memTab[3].size =         0x5000
CODEC_DEBUG_ENABLE: EXT_MEM_PERSIST-memTab[4].size =         0x0800
CODEC_DEBUG_ENABLE: MAX_REF_BUFFERS-memTab[5].size =         0x323400
CODEC_DEBUG_ENABLE: LIST_SLICE_SIZES-memTab[6].size =         0x0320
CODEC_DEBUG_ENABLE: uiMaxCodeSize-memTab[7].size =         0xcd94
CODEC_DEBUG_ENABLE: uiMaxCodeSize-memTab[8].size =         0xcd94
CODEC_DEBUG_ENABLE: KALEIDO_COMMANDS-memTab[9].size =         0x10600
CODEC_DEBUG_ENABLE: AIR_BIT_STORAGE-memTab[10].size =         0x20000
CODEC_DEBUG_ENABLE: AIR_BIT_STORAGE-memTab[11].size =         0x40000
CODEC_DEBUG_ENABLE: tStPhysicalAddrHandle-memTab[12].size =     0x0280
CODEC_DEBUG_ENABLE: IMCOP_TO_DDR-memTab[13].size =         0xc000
CODEC_DEBUG_ENABLE: MEGAPIX_IMCOP_TO_DDR-memTab[14].size =         0x5f00
CODEC_DEBUG_ENABLE: Exiting Funtion H264VENC_TI_alloc

CODEC_DEBUG_ENABLE: Inside Init Obj Function
CODEC_DEBUG_ENABLE: Intialises the memory allocated for a given handle object instance
CODEC_DEBUG_EN-----Exposure time = 2f2ABLE: Checking M
-----Exposure time = 2f2emTab Parameters-> Base_Null, Ba
vpfe-capture vpfe-capture: width = 1280, height = 720, bpp = 1
se_Not_Aligned avpfe-capture vpfe-capture: adjusted width = 1280, height = 720, bpp = 1, bytesperline = 1280, sizeimage = 1382400
nd Overlap
CODEC_DEBUG_ENABLE: vpfe-capture vpfe-capture: width = 1280, height = 720, bpp = 1
Checking MemTab vpfe-capture vpfe-capture: adjusted width = 1280, height = 720, bpp = 1, bytesperline = 1280, sizeimage = 1382400
Parameters-> Base_Null, Base_Not_Aligned and Overlap Completed
CODEC_DEBUG_ENABLE: Checking Input parameter Values
CODEC_DEBUG_ENABLE: Checking of Input parameter Completed
CODEC_DEBUG_ENABLE: Inside H264VENC_TI_Copy_codearm968 Function to Copy Code & Data Sections
CODEC_DEBUG_ENABLE: Succesfully Copied Code & Data Sections
CODEC_DEBUG_ENABLE: Inside H264VENC_TI_Copy_codearm968_3 Function to Copy Code & Data Sections
CODEC_DEBUG_ENABLE: Succesfully Copied Code & Data Sections
CODEC_DEBUG_ENABLE: Inside H264VENC_TI_Copy_codearm968_2 Function to Copy Code & Data Sections
CODEC_DEBUG_ENABLE: Succesfully Copied Code & Data Sections
CODEC_DEBUG_ENABLE: Initializing SPS parameters
CODEC_DEBUG_ENABLE: SPS parameters initialization Completed
CODEC_DEBUG_ENABLE: Initializing PPS parameters
CODEC_DEBUG_ENABLE: SPS parameters initialization Completed
CODEC_DEBUG_ENABLE: Inside Slice Initilization Call
CODEC_DEBUG_ENABLE: Slice Initilization Completed
CODEC_DEBUG_ENABLE: Inside IRES Call to get Number of Resources -> H264VENC_TI_numResourceDescriptors
CODEC_DEBUG_ENABLE: Number of Resources Required - 50
CODEC_DEBUG_ENABLE: Inside IRES Call to Get Resource -> H264VENC_TI_getResouceDescriptors
CODEC_DEBUG_ENABLE: Exiting IRES Call to Get Resource function
CODEC_DEBUG_ENABLE: Inside DDR allocation
CODEC_DEBUG_ENABLE: Inside IRES Call to Init Resource -> H264VENC_TI_initResources

CODEC_DEBUG_ENABLE: Resource Number - 0
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 0
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x42744000

CODEC_DEBUG_ENABLE: Resource Number - 1
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 1
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x42744020

CODEC_DEBUG_ENABLE: Resource Number - 2
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 4
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x42744080

CODEC_DEBUG_ENABLE: Resource Number - 3
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 5
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x427440a0

CODEC_DEBUG_ENABLE: Resource Number - 4
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 6
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x427440c0

CODEC_DEBUG_ENABLE: Resource Number - 5
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 7
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0davinci_v4l2 davinci_v4l2.1: Before finishing with S_FMT:
layer.pix_fmt.bytesperline = 1280,
 layer.pix_fmt.width = 1280,
 layer.pix_fmt.height = 720,
 layer.pix_fmt.sizeimage =1382400
x427440e0

COdavinci_v4l2 davinci_v4l2.1: pixfmt->width = 1280,
 layer->layer_info.config.line_length= 1280
DEC_DEBUG_ENABLE: Resource Number - 6
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 8
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x42744100

CODEC_DEBUG_ENABLE: Resource Number - 7
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 9
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x42744120

CODEC_DEBUG_ENABLE: Resource Number - 8
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 10
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x42744140

CODEC_DEBUG_ENABLE: Resource Number - 9
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 11
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x42744160

CODEC_DEBUG_ENABLE: Resource Number - 10
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 12
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x42744180

CODEC_DEBUG_ENABLE: Resource Number - 11
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 13
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x427441a0

CODEC_DEBUG_ENABLE: Resource Number - 12
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 14
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x427441c0

CODEC_DEBUG_ENABLE: Resource Number - 13
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 15
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x427441e0

CODEC_DEBUG_ENABLE: Resource Number - 14
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 16
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x42744200

CODEC_DEBUG_ENABLE: Resource Number - 15
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 17
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x42744220

CODEC_DEBUG_ENABLE: Resource Number - 16
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 18
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x42744240

CODEC_DEBUG_ENABLE: Resource Number - 17
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 19
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x42744260

CODEC_DEBUG_ENABLE: Resource Number - 18
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 20
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x42744280

CODEC_DEBUG_ENABLE: Resource Number - 19
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 21
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x427442a0

CODEC_DEBUG_ENABLE: Resource Number - 20
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 22
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x427442c0

CODEC_DEBUG_ENABLE: Resource Number - 21
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 23
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x427442e0

CODEC_DEBUG_ENABLE: Resource Number - 22
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 24
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x42744300

CODEC_DEBUG_ENABLE: Resource Number - 23
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 25
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x42744320

CODEC_DEBUG_ENABLE: Resource Number - 24
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 28
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x42744380

CODEC_DEBUG_ENABLE: Resource Number - 25
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 29
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x427443a0

CODEC_DEBUG_ENABLE: Resource Number - 26
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 30
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x427443c0

CODEC_DEBUG_ENABLE: Resource Number - 27
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 31
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x427443e0

CODEC_DEBUG_ENABLE: Resource Number - 28
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 32
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x42744400

CODEC_DEBUG_ENABLE: Resource Number - 29
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 33
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x42744420

CODEC_DEBUG_ENABLE: Resource Number - 30
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 34
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x42744440

CODEC_DEBUG_ENABLE: Resource Number - 31
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 35
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x42744460

CODEC_DEBUG_ENABLE: Resource Number - 32
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 36
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x42744480

CODEC_DEBUG_ENABLE: Resource Number - 33
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 37
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x427444a0

CODEC_DEBUG_ENABLE: Resource Number - 34
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 38
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x427444c0

CODEC_DEBUG_ENABLE: Resource Number - 35
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 39
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x427444e0

CODEC_DEBUG_ENABLE: Resource Number - 36
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 40
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x42744500

CODEC_DEBUG_ENABLE: Resource Number - 37
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 41
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x42744520

CODEC_DEBUG_ENABLE: Resource Number - 38
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 42
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x42744540

CODEC_DEBUG_ENABLE: Resource Number - 39
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 43
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x42744560

CODEC_DEBUG_ENABLE: Resource Number - 40
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 44
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x42744580

CODEC_DEBUG_ENABLE: Resource Number - 41
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 45
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x427445a0

CODEC_DEBUG_ENABLE: Resource Number - 42
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 46
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x427445c0

CODEC_DEBUG_ENABLE: Resource Number - 43
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 47
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x427445e0

CODEC_DEBUG_ENABLE: Resource Number - 44
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 48
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x42744600

CODEC_DEBUG_ENABLE: Resource Number - 45
CODEC_DEBUG_ENABLE: Assigned Edma Channel Index: 49
CODEC_DEBUG_ENABLE: Assigned Number of TCs: 1 
CODEC_DEBUG_ENABLE: Assigned Param Space Address: 0x42744620
CODEC_DEBUG_ENABLE: IRES Call to Open EDMA Channel Successfully Completed
CODEC_DEBUG_ENABLE: Inside IMCOP Resource allocation
CODEC_DEBUG_ENABLE: IMCOP addr0  :0x11f00000
CODEC_DEBUG_ENABLE: IMCOP addr1  :0x11f06300
CODEC_DEBUG_ENABLE: IMCOP addr2  :0x11f09400
CODEC_DEBUG_ENABLE: IMCOP addr3  :0x11f09f00
CODEC_DEBUG_ENABLE: Resource Number - 47
CODEC_DEBUG_ENABLE: HDVICP resoruce alloted
CODEC_DEBUG_ENABLE: Inside Encoder Handle Structure Activate Call -> H264VENC_TI_activate
CODEC_DEBUG_ENABLE: Inside IRES Call to Activate All Resources -> H264VENC_TI_activateAllResources
CODEC_DEBUG_ENABLE: Control Call With SETPARAM Command
CODEC_DEBUG_ENABLE: Control Call With SETPARAM Command Completed Successfully
CODEC_DEBUG_ENABLE: Inside IRES Call to Deactivate All Resources -> H264VENC_TI_deactivateAllResources
CODEC_DEBUG_ENABLE: Inside Encoder Handle Structure Deactivate Call -> H264VENC_TI_deactivate
CODEC_DEBUG_ENABLE: Inside Encoder Handle Structure Activate Call -> H264VENC_TI_activate
CODEC_DEBUG_ENABLE: Inside IRES Call to Activate All Resources -> H264VENC_TI_activateAllResources
CODEC_DEBUG_ENABLE: Control Call With GETBUFINFO Command
CODEC_DEBUG_ENABLE: Control Call With GETBUFINFO Command Completed Successfully
CODEC_DEBUG_ENABLE: Inside IRES Call to Deactivate All Resources -> H264VENC_TI_deactivateAllResources
CODEC_DEBUG_ENABLE: Inside Encoder Handle Structure Deactivate Call -> H264VENC_TI_deactivate
Play this stream using the URL "rtsp://192.168.1.44:8554/live"
Beginning streaming...
a
CODEC_DEBUG_ENABLE: Inside Encoder Handle Structure Activate Call -> H264VENC_TI_activate
CODEC_DEBUG_ENABLE: Inside IRES Call to Activate All Resources -> H264VENC_TI_activateAllResources
CODEC_DEBUG_ENABLE: H264VENC_TI_encode function executing..
CODEC_DEBUG_ENABLE: DEVICE ID CHECK completed
CODEC_DEBUG_ENABLE: SEI USERDATA INSERTION initialization done..
CODEC_DEBUG_ENABLE: H264VENC_TI_Init executed..
CODEC_DEBUG_ENABLE: bitstream initialization done..
CODEC_DEBUG_ENABLE: pAddrHndl computed and stored..
CODEC_DEBUG_ENABLE: reset_vIMCOP_every_frame done..
CODEC_DEBUG_ENABLE: Inside ARM926 H264VENC_TI_Encode_Frame_HeaderGen Function Call
CODEC_DEBUG_ENABLE: Sequence Scaling Flag is 3
CODEC_DEBUG_ENABLE: Seq scaling matrix Copied in to CALC command set
CODEC_DEBUG_ENABLE: Generating the NAL unit containing Sequence Parameter Set SPS
CODEC_DEBUG_ENABLE: Generation of the NAL uniMUX: initialized INT_HDVICP_ENABLE
t containing Sequence Parameter Set (SPS) Completed
CODEC_DEBUG_ENABLE: Generating the NAL unit containing Picture Parameter Set PPS
CODEC_DEBUG_ENABLE: Generation of NAL unit containing Picture Parameter Set PPS Completed
CODEC_DEBUG_ENABLE: H264V_TI_DMA_Map_TC executed..
CODEC_DEBUG_ENABLE: Inside H264VENC_TI_KALEIDO_PSC_Reset Function
CODEC_DEBUG_ENABLE: Exiting H264VENC_TI_KALEIDO_PSC_Reset Function
CODEC_DEBUG_ENABLE: Inside H264VENC_TI_KALEIDO_PSC_Enable_InitRam_Low Function
CODEC_DEBUG_ENABLE: Exiting H264VENC_TI_KALEIDO_PSC_Enable_InitRam_Low Function
CODEC_DEBUG_ENABLE: Inside H264VENC_TI_Loader_arm968 Function to Load Code & Data Sections

CODEC_DEBUG_ENABLE: DMA of Section 0 and Parameters are:
    Source Address: 0x87d36000     Destination Address: 0x12040000     Number of Bytes: 32

CODEC_DEBUG_ENABLE: DMA of Section 1 and Parameters are:
    Source Address: 0x87d36020     Destination Address: 0x12040100     Number of Bytes: 43192

CODEC_DEBUG_ENABLE: DMA of Section 2 and Parameters are:
    Source Address: 0x87d408d8     Destination Address: 0x1206649c     Number of Bytes: 3992

CODEC_DEBUG_ENABLE: DMA of Section 3 and Parameters are:
    Source Address: 0x87d41870     Destination Address: 0x12067734     Number of Bytes: 116
CODEC_DEBUG_ENABLE: Succesfully Loaded Code & Data Sections
CODEC_DEBUG_ENABLE: Inside H264VENC_TI_KALEIDO_PSC_SyncReset Function
CODEC_DEBUG_ENABLE: Exiting H264VENC_TI_KALEIDO_PSC_SyncReset Function
CODEC_DEBUG_ENABLE: Inside H264VENC_TI_KALEIDO_PSC_Enable Function
CODEC_DEBUG_ENABLE: Exiting H264VENC_TI_KALEIDO_PSC_Enable Function
CODEC_DEBUG_ENABLE: Inside ARM926 H264VENC_TI_Encode_Frame Function Call
CODEC_DEBUG_ENABLE: Physical addresses computed and stored in the structure
CODEC_DEBUG_ENABLE: H264VENC_TI_Encode_Frame Function Executed..
CODEC_DEBUG_ENABLE: Generate interrupt to arm968 using KLD intc

What's wrong please ?

 

Thanks

  • 0
    Prodigy 20 points

    I think something goes wrong with my kernel, here is my log :

     

    Linux version 2.6.32.17-davinci1_IPNC_DM365_2.6.0 (julien@julien-laptop) (gcc version 4.3.3 (Sourcery G++ Lite 2009q1-203) ) #19 PREEMPT Wed Jun 15 10:47:06 CEST 2011
    CPU: ARM926EJ-S [41069265] revision 5 (ARMv5TEJ), cr=00053177
    CPU: VIVT data cache, VIVT instruction cache
    Machine: DaVinci DM36x EVM
    Memory policy: ECC disabled, Data cache writeback
    DaVinci dm36x_rev1.2 variant 0x8
    Built 1 zonelists in Zone order, mobility grouping off.  Total pages: 10160
    Kernel command line: noinitrd rw ip=dhcp root=/dev/nfs nfsroot=192.168.1.32:/home/julien/Target,nolock mem=40M console=ttyS1,115200n8 vpfe_capture.interface=1 dm365_imp.oper_mode=0
    PID hash table entries: 256 (order: -2, 1024 bytes)
    Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)
    Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)
    Memory: 40MB = 40MB total
    Memory: 36420KB available (3532K code, 314K data, 120K init, 0K highmem)
    Hierarchical RCU implementation.
    NR_IRQS:245
    Console: colour dummy device 80x30
    Calibrating delay loop... 147.86 BogoMIPS (lpj=739328)
    Security Framework initialized
    Mount-cache hash table entries: 512
    CPU: Testing write buffer coherency: ok
    DaVinci: 8 gpio irqs
    NET: Registered protocol family 16
    MUX: initialized INT_EDMA_CC
    MUX: initialized INT_EMAC_RXTHRESH
    MUX: initialized INT_EMAC_RXPULSE
    MUX: initialized INT_EMAC_TXPULSE
    MUX: initialized INT_EMAC_MISCPULSE
    EVM: HD imager video input
    MUX: initialized MCBSP0_BDX
    MUX: initialized MCBSP0_X
    MUX: initialized MCBSP0_BFSX
    MUX: initialized MCBSP0_BDR
    MUX: initialized MCBSP0_R
    MUX: initialized MCBSP0_BFSR
    MUX: initialized INT_PRTCSS
    bio: create slab <bio-0> at 0
    DM365 IPIPE initialized in Continuous mode
    SCSI subsystem initialized
    vpss vpss: dm365_vpss vpss probed
    vpss vpss: dm365_vpss vpss probe success
    dm365_afew_hw_init
    ch0 default output "COMPOSITE", mode "NTSC"
    VPBE Encoder Initialized
    Switching to clocksource timer0_1
    NET: Registered protocol family 2
    IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
    TCP established hash table entries: 2048 (order: 2, 16384 bytes)
    TCP bind hash table entries: 2048 (order: 1, 8192 bytes)
    TCP: Hash tables configured (established 2048 bind 2048)
    TCP reno registered
    NET: Registered protocol family 1
    RPC: Registered udp transport module.
    RPC: Registered tcp transport module.
    RPC: Registered tcp NFSv4.1 backchannel transport module.
    JFFS2 version 2.2. (NAND) © 2001-2006 Red Hat, Inc.
    msgmni has been set to 71
    alg: No test for stdrng (krng)
    Block layer SCSI generic (bsg) driver version 0.4 loaded (major 253)
    io scheduler noop registered
    io scheduler anticipatory registered (default)
    DM365 IPIPEIF probed
    imp serializer initialized
    davinci_previewer initialized
    davinci_resizer initialized
    Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
    serial8250.0: ttyS0 at MMIO 0x1c20000 (irq = 40) is a 16550A
    serial8250.0: ttyS1 at MMIO 0x1d06000 (irq = 41) is a 16550A
    console [ttyS1] enabled
    brd: module loaded
    at24 1-0050: 32768 byte 24c256 EEPROM (writable)
    NAND device: Manufacturer ID: 0xec, Chip ID: 0x75 (Samsung NAND 32MiB 3,3V 8-bit)
    2 NAND chips detected
    Creating 5 MTD partitions on "davinci_nand.0":
    0x000000000000-0x000000080000 : "bootloader"
    0x000000080000-0x0000001f0000 : "params"
    0x0000001f0000-0x0000003f0000 : "kernel"
    0x0000003f0000-0x000001bf0000 : "filesystem1"
    0x000001bf0000-0x000004000000 : "filesystem2"
    davinci_nand davinci_nand.0: controller rev. 2.3
    rtc_davinci rtc_davinci.0: rtc core: registered rtc_davinci as rtc0
    i2c /dev entries driver
    Linux video capture interface: v2.00
    ths7303 1-002c: chip found @ 0x58 (DaVinci I2C adapter)
    ths7303 1-002c: ths7303 write failed
    ths7303: probe of 1-002c failed with error -121
    vpfe_init
    vpfe-capture: vpss clock vpss_master enabled
    vpfe-capture vpfe-capture: v4l2 device registered
    vpfe-capture vpfe-capture: video device registered
    EVM: switch to HD imager video input
    mt9p031 1-0048: Detected a MT9P031 chip ID 1801
    mt9p031 1-0048: mt9p031 1-0048 decoder driver registered !!
    vpfe-capture vpfe-capture: v4l2 sub device mt9p031 registered
    vpfe_register_ccdc_device: DM365 ISIF
    DM365 ISIF is registered with vpfe.
    af major#: 250, minor# 0
    AF Driver initialized
    aew major#: 249, minor# 0
    AEW Driver initialized
    Trying to register davinci display video device.
    layer=c1160800,layer->video_dev=c1160964
    Trying to register davinci display video device.
    layer=c1160400,layer->video_dev=c1160564
    davinci_init:DaVinci V4L2 Display Driver V1.0 loaded
    watchdog watchdog: heartbeat 60 sec
    Advanced Linux Sound Architecture Driver Version 1.0.21.
    ALSA device list:
      No soundcards found.
    IPv4 over IPv4 tunneling driver
    GRE over IPv4 tunneling driver
    TCP cubic registered
    Initializing XFRM netlink socket
    NET: Registered protocol family 17
    NET: Registered protocol family 15
    davinci_emac_probe: using random MAC addr: 1a:42:ad:39:02:5c
    emac-mii: probed
    rtc_davinci rtc_davinci.0: setting system clock to 2011-03-25 18:48:57 UTC (1301078937)
    eth0: attached PHY driver [Generic PHY] (mii_bus:phy_addr=1:01, id=181b8b0)
    Sending DHCP requests .
    PHY: 1:01 - Link is Up - 100/Full
    ., OK
    IP-Config: Got DHCP answer from 0.0.0.0, my address is 192.168.1.50
    IP-Config: Complete:
         device=eth0, addr=192.168.1.50, mask=255.255.255.0, gw=192.168.1.254,
         host=192.168.1.50, domain=, nis-domain=(none),
         bootserver=0.0.0.0, rootserver=192.168.1.32, rootpath=
    Looking up port of RPC 100003/2 on 192.168.1.32
    Looking up port of RPC 100005/1 on 192.168.1.32
    VFS: Mounted root (nfs filesystem) on device 0:13.
    Freeing init memory: 120K

  • 0 in reply to Julien Biau
    TI__Expert 8465 points

    Hi Julien Biau,

    Can you please refer the post http://e2e.ti.com/support/embedded/f/356/p/98843/345872.aspx#345872, and also please share H264 encoder version and parameter values.