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TDA4VM: TDA4VH: how to set csirx lane speed to 2.5Gbps

Part Number: TDA4VM
Other Parts Discussed in Thread: TDA4VH

Dear experts,

I use psdk_rtos_sdk_08_02_02_04 to develop TDA4VH software. 

We had the same problem as this thread, https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1026164/tda4vm-csi-rx-lane-speed-setting

We are trying to bring up 2 8M cameras in CSI1, but when we follow the default configuration(in Csirx_initDPhyCfg(), psmClkFreqDiv=0x53, leftLaneBandSpeed=CSIRX_LANE_BAND_SPEED_1350_TO_1500_MBPS, bandGapTimerVal=0x14), we cannot receive the complete image of the two cameras.

Then we try to change leftLaneBandSpeed and rightLaneBandSpeed to CSIRX_LANE_BAND_SPEED_2250_TO_2500_MBPS, but still not normal.

1. when the LaneBandSpeed  is changed to CSIRX_LANE_BAND_SPEED_2250_TO_2500_MBPS, do psmClkFreqDiv and bandGapTimerVal still need to be modified? 

From the datasheet of TDA4VH, I didn't find out how to modify these two parameters.

2. I know from the thread https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1026164/tda4vm-csi-rx-lane-speed-setting that deserializer should send deskew calibration sequence at the very start to calibrate the CLK-DAT skew. 

Can this solve our problem?

In this case, is there any modification to the csirx driver?

BR,

subin