Hi Schuyler:
This new E2E is cloned from this Old E2E: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1158875/sk-am64-sdk8-4-of-am64-is-buggy-on-the-eth-phy/4397447#4397447
Let me make it shorter and much clear:
#1. Customer is testing with SDK8.4 + Their PCB.
#2. They are using 2 DP83867 ETH phy, this is the same design with the TI EVM.
#3. The current issue is:
Step0: Ifconfgi ETH0 / ETH1 down.
Step1: Ifconfig ETH0 up, do the ping. (No any problem here.)
Step2: ifconfig ETH1 up, do the ping. (No any problem here.)
Step3: ifconfig ETH0 down, ETH1 is still working. (No problem here.)
Step4: ifconfig ETH1 down. (No problem here.)
Step5: ifconfig ETH1 / ETH0 up. (No problem here.)
Step6: do the ping from ETH1/ ETH0, (no problem here.)
Step7: ifconfig ETH1 down. (We will have the problem here.)
In the normal case, when doing the ifconfig ETH1 down, the ETH1 will be down, but the ETH0 should be working here.
in the fail case,,the ETH0 will be down after ETH is down. (The ETH0 should not be effected by ETH1.)
So, the fail case reproduced rate is about 30%.
IE: 70% Customer PCB has no this issue, only 30% of their PCB has this issue.
Any comments?
We will do the schematic review.
But, we want to know if this is the HW issue to cause since I never met this kind of issue from the other customer.
BR Rio