c6416 mcbsp tx interrupt can't work

Welcome to the TI E2E Community. We all hope you will have many successful projects.

The best help for your first program would be a Board Support Package, if available, from SEED. I tried looking at their website, but was not able to figure out how to translate very much of the website information for my use. I was able to find that the DEC6416 uses the C6416T 1GHz processor. Most board manufacturers do provide a BSP for their boards, and these usually have examples for using the components on the board, such as the AIC23. But it might not include the use of interrupts.

sprc090 contains the Chip Support Library (CSL) for the C6000 family and will have some examples for using the CSL with different components and some boards. sprc118 contains the Driver Developer's Kit (DDK) which will also have some examples, including one for the dsk6416_edma_aic23; this will not be exactly what you are looking for, but it might be a great way to implement your program. Both of these can be downloaded from the TI website www.ti.com, then do a Keyword search for either of the sprcNNN names.

jinfei tang said:

1)  how can GIE be cleared every time i run the program?

You must explicitly enable GIE in your program. This is usually done in the main() function. If you have done this and confirmed that GIE=1 before you start the McBSP running, then something is happening after that point to turn it off. The most likely cause would be an interrupt being serviced without proper configuration for that interrupt, or an invalid interrupt occurring.

Whenever an interrupt occurs it will set a bit in the IFR register. If the corresponding bit in the IER register is also set (enabled), then the DSP will start executing from the interrupt vector location. At this time, the GIE bit will be cleared to prevent another interrupt from occurring until the ISR is completed or until the ISR enables other interrupts. If no ISR has been setup, then it is possible that GIE may be cleared by the hardware during the interrupt but never restored. This would also mean that the ISR or interrupt vector stub never returns correctly.

thank randyp very much for his advice.  after a long time of wandering around, i find here to be a good place to start.

now i will post my program. this program has four parts: main file sineirq.c, codec.h, sineirq.cmd and vectors.asm. aic23's control interface is activated by some GPIO pins of 6416. so in the main program, a large part is dedicated to gpio and aic23 control initialization.

sineirq.c

*********************************************************************/

#include <stdio.h>
//#include <math.h>
#include <csl.h>
#include <csl_irq.h>
#include <csl_cache.h>
#include <csl_mcbsp.h>
#include <csl_gpio.h>
#include "CODEC.h"

static Uint32 evid;

static MCBSP_Config MyMcbspConfig =
{
 MCBSP_SPCR_RMK  //Serial Port Control Register (SPCR)
 (       
  MCBSP_SPCR_FREE_NO,   // Serial clock free running mode(FREE)
  MCBSP_SPCR_SOFT_NO,   // Serial clock emulation mode(SOFT)
  MCBSP_SPCR_FRST_YES,   // Frame sync generator reset(FRST)
  MCBSP_SPCR_GRST_YES,   // Sample rate generator reset(GRST)
  MCBSP_SPCR_XINTM_XRDY,   // Transmit interrupt mode(XINTM)
  MCBSP_SPCR_XSYNCERR_NO,  // Transmit synchronization error 
  MCBSP_SPCR_XRST_YES,   // Transmitter reset(XRST)
  MCBSP_SPCR_DLB_OFF,     // Digital loopback(DLB) mode
  MCBSP_SPCR_RJUST_RZF,  // Receive data sign-extension and
          //   justification mode(RJUST)
  MCBSP_SPCR_CLKSTP_DISABLE,  // Clock stop(CLKSTP) mode
  MCBSP_SPCR_DXENA_OFF,   // DX Enabler(DXENA) -Extra delay for
         //   DX turn-on time.
  MCBSP_SPCR_RINTM_RRDY,   // Receive interrupt(RINT) mode
  MCBSP_SPCR_RSYNCERR_NO,  // Receive synchronization error(RSYNCERR)
  MCBSP_SPCR_RRST_YES   // Receiver reset(RRST)
 ),
   
 MCBSP_RCR_RMK // Receive Control Register (RCR)
 ( 
  MCBSP_RCR_RPHASE_SINGLE,  // Receive phases
  MCBSP_RCR_RFRLEN2_OF(0),  // Receive frame length
         //   in phase 2(RFRLEN2)
  MCBSP_RCR_RWDLEN2_32BIT,  // Receive element length
         //   in phase 2(RWDLEN2) 
  MCBSP_RCR_RCOMPAND_MSB,  // Receive companding mode (RCOMPAND) 
  MCBSP_RCR_RFIG_NO,   // Receive frame ignore(RFIG)
  MCBSP_RCR_RDATDLY_0BIT,  // Receive data delay(RDATDLY)
  MCBSP_RCR_RFRLEN1_OF(0),  // Receive frame length
         //   in phase 1(RFRLEN1)
  MCBSP_RCR_RWDLEN1_32BIT, // Receive element length
         //   in phase 1(RWDLEN1)
  MCBSP_RCR_RWDREVRS_DISABLE // Receive 32-bit bit reversal
         //   feature.(RWDREVRS)
 ),
 MCBSP_XCR_RMK //Transmit Control Register (XCR)
 (           
  MCBSP_XCR_XPHASE_SINGLE, // Transmit phases
  MCBSP_XCR_XFRLEN2_OF(0), // Transmit frame length
         //   in phase 2(XFRLEN2)
  MCBSP_XCR_XWDLEN2_32BIT,  // Transmit element length
          //   in phase 2
  MCBSP_XCR_XCOMPAND_MSB,  // Transmit companding mode(XCOMPAND)
  MCBSP_XCR_XFIG_NO,   // Transmit frame ignore(XFIG)
  MCBSP_XCR_XDATDLY_0BIT,  // Transmit data delay(XDATDLY)
  MCBSP_XCR_XFRLEN1_OF(1),  // Transmit frame length
         //   in phase 1(XFRLEN1)
  MCBSP_XCR_XWDLEN1_32BIT,  // Transmit element length
         //   in phase 1(XWDLEN1)
  MCBSP_XCR_XWDREVRS_DISABLE  // Transmit 32-bit bit reversal feature
 ),

 MCBSP_SRGR_DEFAULT,
 MCBSP_MCR_DEFAULT,     // Using default value of MCR register
 MCBSP_RCERE0_DEFAULT,   // Using default value of RCERE registers
 MCBSP_RCERE1_DEFAULT,
 MCBSP_RCERE2_DEFAULT,
 MCBSP_RCERE3_DEFAULT,
 MCBSP_XCERE0_DEFAULT,   // Using default value of XCERE registers
 MCBSP_XCERE1_DEFAULT,
 MCBSP_XCERE2_DEFAULT,
 MCBSP_XCERE3_DEFAULT,
 MCBSP_PCR_RMK //serial port pin control register(PCR)
 (  
  MCBSP_PCR_XIOEN_SP,   // Transmitter in general-purpose I/O mode
  MCBSP_PCR_RIOEN_SP,   // Receiver in general-purpose I/O mode
  MCBSP_PCR_FSXM_EXTERNAL,  // Transmit frame synchronization mode
  MCBSP_PCR_FSRM_EXTERNAL,  // Receive frame synchronization mode
  MCBSP_PCR_CLKXM_INPUT,   // Transmitter clock mode (CLKXM)
  MCBSP_PCR_CLKRM_INPUT,   // Receiver clock mode (CLKRM)
  MCBSP_PCR_CLKSSTAT_0,   // CLKS pin status(CLKSSTAT)
  MCBSP_PCR_DXSTAT_0,     // DX pin status(DXSTAT)
  MCBSP_PCR_FSXP_ACTIVEHIGH,  // Transmit frame synchronization polarity(FSXP)
  MCBSP_PCR_FSRP_ACTIVEHIGH,  // Receive frame synchronization polarity(FSRP)
  MCBSP_PCR_CLKXP_FALLING,  // Transmit clock polarity(CLKXP)
  MCBSP_PCR_CLKRP_RISING  // Receive clock polarity(CLKRP)
 )
};

static Uint32 gpgc = GPIO_GPGC_RMK(
 GPIO_GPGC_GP0M_GPIOMODE,
 GPIO_GPGC_GPINT0M_DEFAULT,
 GPIO_GPGC_GPINTPOL_DEFAULT,
 GPIO_GPGC_LOGIC_DEFAULT,
 GPIO_GPGC_GPINTDV_DEFAULT
);

static Uint32 gpen = GPIO_GPEN_OF(0x09);
static Uint32 gpdir = GPIO_GPDIR_OF(0x09);
static Uint32 gpval = GPIO_GPVAL_OF(0x09);
static Uint32 gphm = GPIO_GPHM_RMK(GPIO_GPHM_GPXHM_DEFAULT);
static Uint32 gplm = GPIO_GPLM_RMK(GPIO_GPLM_GPXLM_DEFAULT);
static Uint32 gppol = GPIO_GPPOL_RMK(GPIO_GPPOL_GPINTXPOL_DEFAULT);

static GPIO_Handle hGpio;
static MCBSP_Handle hMcbsp;

volatile short ii;

extern far void vectors();
void main(void);
interrupt void c_int07(void);

short sinetable[48] = {
0x0000, 0x10b4, 0x2120, 0x30fb, 0x3fff, 0x4dea, 0x5a81, 0x658b,
0x6ed8, 0x763f, 0x7ba1, 0x7ee5, 0x7ffd, 0x7ee5, 0x7ba1, 0x76ef,
0x6ed8, 0x658b, 0x5a81, 0x4dea, 0x3fff, 0x30fb, 0x2120, 0x10b4,
0x0000, 0xef4c, 0xdee0, 0xcf06, 0xc002, 0xb216, 0xa57f, 0x9a75,
0x9128, 0x89c1, 0x845f, 0x811b, 0x8002, 0x811b, 0x845f, 0x89c1,
0x9128, 0x9a76, 0xa57f, 0xb216, 0xc002, 0xcf06, 0xdee0, 0xef4c
};
void main()
 {

 ii=10; 
 CSL_init();

 hGpio = GPIO_open(GPIO_DEV0,GPIO_OPEN_RESET);
 GPIO_configArgs(hGpio,gpgc,gpen,gpdir,gpval,gphm,gplm,gppol);
 init_aic23();
 hMcbsp = MCBSP_open(MCBSP_DEV2, MCBSP_OPEN_RESET);
 MCBSP_config(hMcbsp, &MyMcbspConfig);
   MCBSP_start(hMcbsp, MCBSP_XMIT_START, 3000);
 IRQ_globalEnable();
 evid=MCBSP_getXmtEventId(hMcbsp);

 IRQ_nmiEnable();
 IRQ_map(evid, 7);
 IRQ_reset(evid);
 IRQ_enable(evid); 
 IRQ_setVecs(vectors); 
 IRQ_globalEnable();
 
 for(;;)
 {

// while (!MCBSP_xrdy(hMcbsp));
 
// MCBSP_write(hMcbsp,sinetable[ii]);
// ii=ii+1;
// if (ii==48)
// {ii=0;
// }
// int output;
  
 }
 
}

interrupt void c_int07(void)
{
 MCBSP_write(hMcbsp,sinetable[ii]);
 ii=ii+1;
 if (ii==48)
 { ii=0;
 }

    return;
}

void init_aic23(void)
{
 Write_Command(Reset_Register,RR_STATUS);
 Write_Command(Power_Down_Control,PDC_DEFAULT);
 Write_Command(Digital_Audio_Inteface_Format,DAIF_MS+DAIF_LRSWAP+DAIF_LRP+DAIF_IWL+DAIF_FOR);
 Write_Command(Analog_Aduio_Path_Control,AAPC_STA+AAPC_STE+AAPC_DAC+AAPC_BYP+AAPC_INSEL+AAPC_MICM+AAPC_MICB);
 Write_Command(Digital_Audio_Path_Control,DAPC_DACM+DAPC_DEEMP+DAPC_ADCHP);
 Write_Command(Sample_Rate_Control,SRC_CLKIN+SRC_CLKOUT+SRC_SR+SRC_BOSR+SRC_USB);
 Write_Command(Left_Headphone_Volume_Control,LHVC_LRS+LHVC_LZC+LHVC_LHV);
 Write_Command(Left_Line_Input_Volume_Control,LLIVC_LRS+LLIVC_LIM+LLIVC_LIV);
 Write_Command(Right_Headphone_Volume_Control,RHVC_RLS+RHVC_RZC+RHVC_RHV);
 Write_Command(Right_Line_Input_Volume_Control,RLIVC_RLS+RLIVC_RIM+RLIVC_RIV);
 Write_Command(Digital_Interface_Activation,DIA_ACT);
}

void delay_time(Uint32 value)
{
 Uint32 i;
 for(i = 0; i < value; i++);
}

void IIC_SCL_DIR(Uint32 dir)
{
 Uint32 Current_dir;
 switch(dir)
 {
  case OUTPUT:
   Current_dir = GPIO_pinDirection(hGpio,GPIO_PIN0,GPIO_OUTPUT);
   break;
   
  case INPUT:
   Current_dir = GPIO_pinDirection(hGpio,GPIO_PIN0,GPIO_INPUT);
   break;
   
  default:
   break;
 }
}

void IIC_SDA_DIR(Uint32 dir)
{
 Uint32 Current_dir;
 switch(dir)
 {
  case OUTPUT:
   Current_dir = GPIO_pinDirection(hGpio,GPIO_PIN3,GPIO_OUTPUT);
   break;
   
  case INPUT:
   Current_dir = GPIO_pinDirection(hGpio,GPIO_PIN3,GPIO_INPUT);
   break;
   
  default:
   break;
 }
}

void IIC_SCL_OUT(Uint32 data)
{
 GPIO_pinWrite(hGpio,GPIO_PIN0,data);
}

void IIC_SDA_OUT(Uint32 data)
{
 GPIO_pinWrite(hGpio,GPIO_PIN3,data);
}

unsigned int IIC_SDA_IN(void)
{
 unsigned int i;
 i = GPIO_pinRead(hGpio,GPIO_PIN3);
 return i;
}

void Write_Command(unsigned int address,unsigned int data)
{
 unsigned int i,temp;
 IIC_SDA_DIR(OUTPUT);
 Write_Start_bit();
 Write_IIC(CS_STATE_0);
 i = Read_IIC_ACK();
 if(i == 1)
 {
  while(1);
 }
 temp = (address << 1) & 0xfe;
 if((data & 0x100) == 0x100)
 {
  temp = temp | 0x01;
 }
 Write_IIC(temp); 
 i = Read_IIC_ACK();
 if(i == 1)
 {
  while(1);
 }
 temp = data & 0xff;
 Write_IIC(temp); 
 i = Read_IIC_ACK();
 if(i == 1)
 {
  while(1);
 }
 Write_Stop_bit();
}

void Write_Start_bit(void)
{
 IIC_SDA_DIR(OUTPUT);
 IIC_SCL_OUT(HIGH_LEVEL);
 IIC_SDA_OUT(HIGH_LEVEL);
 delay_time(600);
 IIC_SDA_OUT(LOW_LEVEL);
 delay_time(600);
 IIC_SCL_OUT(LOW_LEVEL);
 delay_time(1300); 
}

void Write_Stop_bit(void)
{
 IIC_SDA_DIR(OUTPUT);
 IIC_SDA_OUT(LOW_LEVEL);
 IIC_SCL_OUT(HIGH_LEVEL);
 delay_time(600);
 IIC_SDA_OUT(HIGH_LEVEL);
 delay_time(1300);
 IIC_SCL_OUT(LOW_LEVEL);
 delay_time(1300);
}

void Write_IIC(unsigned int Rtc_Var)
{
 int i;
 IIC_SDA_DIR(OUTPUT);
 for(i = 7; i >= 0; i--)
 {
  IIC_SDA_OUT((Rtc_Var >> i) & 1);
  IIC_SCL_OUT(HIGH_LEVEL);
  delay_time(600);
  IIC_SCL_OUT(LOW_LEVEL);
  delay_time(1300);
 }
}

unsigned int Read_IIC_ACK(void)
{
 unsigned int i;
 IIC_SDA_DIR(INPUT);
 IIC_SCL_OUT(HIGH_LEVEL);
 delay_time(100);
 i = IIC_SDA_IN();
 i = i & 1;
 delay_time(600);
 IIC_SCL_OUT(LOW_LEVEL);
 delay_time(1300);
 return(i);
}

/*********************************************************************
 filename: CODEC.h
 *********************************************************************/

#define  OUTPUT  0
#define  INPUT  1

#define  HIGH_LEVEL 1
#define  LOW_LEVEL 0 

#define  CS_STATE_0 0x34
#define  CS_STATE_1 0x36

#define  Left_Line_Input_Volume_Control 0x00  //左线形输入通道音频控制
#define  Right_Line_Input_Volume_Control  0x01  //右线形输入通道音频控制
#define  Left_Headphone_Volume_Control 0x02  //左通道耳机音频控制
#define  Right_Headphone_Volume_Control  0x03  //右通道耳机音频控制
#define  Analog_Aduio_Path_Control 0x04  //模拟音频控制
#define  Digital_Audio_Path_Control 0x05  //数字音频控制
#define  Power_Down_Control 0x06  //功耗控制
#define  Digital_Audio_Inteface_Format 0x07  //数字音频接口格式
#define  Sample_Rate_Control  0x08  //采样率控制
#define  Digital_Interface_Activation  0x09  //数字接口激活
#define  Reset_Register  0x0A  //复位寄存器

/* Power_Down_Control register control data */
#define  PDC_DEFAULT  0x0  //各部分功能使能

/* Digital_Audio_Inteface_Format register control data */
#define  DAIF_MS   0x40  //AIC23主模式
#define  DAIF_LRSWAP  0x00  //DAC左右通道交换关闭
#define  DAIF_LRP  0x10  //
#define  DAIF_IWL  0x00  //输入字节长度16BIT
#define  DAIF_FOR  0x03  //设置IIS数据格式

/* Sample_Rate_Control register control data */
#define  SRC_CLKIN  0x00  //时钟输入MCLK
#define  SRC_CLKOUT  0x00  //时钟输出MCLK
#define  SRC_SR   0x00  //ADC采样率设置
#define  SRC_BOSR  0x00  //256fs
#define  SRC_USB   0x00  //时钟模式选择normal

/* Reset_Register register control data */
#define  RR_STATUS  0x00  //复位

/* Analog_Aduio_Path_Control register control data */
#define  AAPC_STA  0x00  //关闭
#define  AAPC_STE  0x00  //关闭
#define  AAPC_DAC  0x10  //DAC选择
#define  AAPC_BYP  0x00  //旁路关闭
#define  AAPC_INSEL  0x00  //ADC输入选择线形
#define  AAPC_MICM  0x00  //MICROPHONE弱音
#define  AAPC_MICB  0x01  //MICROPHONE推进

/* Digital_Audio_Path_Control register control data */
#define  DAPC_DACM  0x00  //DAC软弱音关闭
#define  DAPC_DEEMP  0x00  //不强调关闭
#define  DAPC_ADCHP  0x01  //ADC高通滤波

/* Digital_Interface_Activation register control data */
#define  DIA_ACT   0x01  //数字接口激活

/* Left_Line_Input_Volume_Control register control data */
#define  LLIVC_LRS  0x100  //左/右通道线形同步升级关闭
#define  LLIVC_LIM  0x00  //左通道线形弱音正常
#define  LLIVC_LIV  0x17  //左通道线形输入音频控制

/* Right_Line_Input_Volume_Control register control data */
#define  RLIVC_RLS  0x100  //左/右通道线形同步升级关闭
#define  RLIVC_RIM  0x00  //右通道线形弱音正常
#define  RLIVC_RIV  0x17  //右通道线形输入音频控制

/* Left_Headphone_Volume_Control register control data */
#define  LHVC_LRS  0x100  //左/右通道耳机同步升级关闭
#define  LHVC_LZC  0x80  //左通道零通过检测关闭
#define  LHVC_LHV  0x7f  //左通道耳机音频控制

/* Right_Headphone_Volume_Control register control data */
#define  RHVC_RLS  0x100  //左/右通道耳机同步升级关闭
#define  RHVC_RZC  0x80  //右通道零通过检测关闭
#define  RHVC_RHV  0x7f  //右通道耳机音频控制

extern far void vectors();
void init_aic23(void);
void delay_time(Uint32 value);
void IIC_SCL_DIR(Uint32 dir);
void IIC_SCL_OUT(Uint32 data);
void IIC_SDA_DIR(Uint32 dir);
void IIC_SDA_OUT(Uint32 data);
void Write_Command(unsigned int address,unsigned int data);
void Write_IIC(unsigned int Rtc_Var);
void Write_Start_bit(void);
void Write_Stop_bit(void);
unsigned int Read_IIC_ACK(void);

sineirq.cmd

/*
 * 
 */
/*
 *---------sineirq.cmd---------
 *
 */
MEMORY
{
  L1 : o = 0h l = 400h
  L2 : o = 00000400h l = 00040000h /* all SRAM       */
  CE0: o = 80000000h l = 00100000h /* external memory   */
}

SECTIONS
{
/*    .boot_load > L1*/
    .cinit      >       L2
    .text       >       L2
    .stack      >       L2
    .bss        >       L2
    .const      >       L2
    .data       >       L2
    .far        >       L2
    .switch     >       L2
    .sysmem     >       L2
    .tables     >       L2
    .cio        >       L2
    .vector  >  L2
    .external   >       CE0
}                            

vectors.asm

********************************************************************************
*  
*
********************************************************************************

*------------------------------------------------------------------------------
* Global symbols defined here and exported out of this file
*------------------------------------------------------------------------------

    .global _vectors
    .global _c_int00
    .global _c_int07
    .global _vector1
    .global _vector2
    .global _vector3
    .global _vector4
    .global _vector5
    .global _vector6
    .global _vector7
    .global _vector8
    .global _vector9    
    .global _vector10
    .global _vector11
    .global _vector12
    .global _vector13
    .global _vector14
    .global _vector15
    .global _vec_dummy
*------------------------------------------------------------------------------
* Global symbols referenced in this file but defined somewhere else.
* Remember that your interrupt service routines need to be referenced here.
*------------------------------------------------------------------------------
   .ref _c_int00
   .ref _c_int07
*------------------------------------------------------------------------------
* This is a macro that instantiates one entry in the interrupt service table.
*------------------------------------------------------------------------------
VEC_ENTRY  .macro addr
    STW  B0,*--B15
    MVKL addr,B0
    MVKH addr,B0
    B  B0
    LDW  *B15++,B0
    NOP  2
    NOP  
    NOP  
    .endm

*------------------------------------------------------------------------------
* This is a dummy interrupt service routine used to initialize the IST.
*------------------------------------------------------------------------------
    .sect ".text:isr"
_vec_dummy:
    B    B3
    NOP  5

*------------------------------------------------------------------------------
* This is the actual interrupt service table (IST). It is properly aligned and
* is located in the subsection .text:vecs. This means if you don't explicitly
* specify this section in your linker command file, it will default and link
* into the .text section. Remember to set the ISTP register to point to this
* table.
*------------------------------------------------------------------------------
    .sect ".vector"
    .align 1024

_vectors:  
_vector0:  VEC_ENTRY _c_int00
_vector1:  VEC_ENTRY _vec_dummy
_vector2:  VEC_ENTRY _vec_dummy
_vector3:  VEC_ENTRY _vec_dummy
_vector4:  VEC_ENTRY _vec_dummy
_vector5:  VEC_ENTRY _vec_dummy
_vector6:  VEC_ENTRY _vec_dummy
_vector7:  VEC_ENTRY _c_int07
_vector8:  VEC_ENTRY _vec_dummy  ; Hookup the c_int08 ISR in main() for EDMA
_vector9:  VEC_ENTRY _vec_dummy ; Hookup the c_int09 ISR in main() for DMA
_vector10:  VEC_ENTRY _vec_dummy
_vector11:  VEC_ENTRY _vec_dummy ; Hookup the c_int11 ISR in main() for DMA
_vector12:  VEC_ENTRY _vec_dummy
_vector13:  VEC_ENTRY _vec_dummy
_vector14:  VEC_ENTRY _vec_dummy
_vector15:  VEC_ENTRY _vec_dummy

*------------------------------------------------------------------------------

********************************************************************************
* End of vecs.asm
********************************************************************************

this is the complete program, now can someone tell me what's wrong with my program? thank you.

You flatter the forum to think we can look at your program and figure out what you have not been able to figure out with the CCS debugger. I will tell you a few small points to consider, but likely none will directly affect your problem.

What versions of CCS and CSL and Code Generation tools are you using?

jinfei tang said:

 IRQ_globalEnable();
 evid=MCBSP_getXmtEventId(hMcbsp);

 IRQ_nmiEnable();
 IRQ_map(evid, 7);
 IRQ_reset(evid);
 IRQ_enable(evid); 
 IRQ_setVecs(vectors); 
 IRQ_globalEnable();

IRQ_globalEnable should not be called so early, but should only be called after all of the other IRQ commands have been executed. If an erroneous interrupt were pending when this first call to IRQ_globalEnable is made, you could have bad results where the program gets lost immediately.

jinfei tang said:

MEMORY
{
  L1 : o = 0h l = 400h
  L2 : o = 00000400h l = 00040000h /* all SRAM       */
  CE0: o = 80000000h l = 00100000h /* external memory   */
}

You create the chance for confusion by using the name L1 here for the lowest memory segment. This is not the location of either L1P or L1D, but is a part of the physical L2 memory. This is only a suggestion. Usually, this lowest memory part is allocated separately like this to allow it to be used for the interrupt vectors. Since the reset vector would always go to 0, that is a convenient place for the interrupt vector table to be placed. A name like VECS would be very descriptive here.

Since the "L2" sections starts with an offset, the length should be reduced or else you have the chance for the linker to create an invalid .out file that will not fit in the available memory.

jinfei tang said:

    .vector  >  L2

My recommendation is to change this to ".vector > L1" or if you change the memory part to VECS, then ".vector > VECS". Either way will place the interrupt vector table at the lowest part of internal memory which is an appropriate place since RESET will always start there.

jinfei tang said:

*------------------------------------------------------------------------------
* This is a dummy interrupt service routine used to initialize the IST.
*------------------------------------------------------------------------------
    .sect ".text:isr"
_vec_dummy:
    B    B3
    NOP  5

This is not a valid "dummy isr". If you got this from a TI example, please tell me where so it can be corrected.

This uses a standard C function return by branching to B3. But for an interrupt you must use B IRP. Please change the B B3 line to B IRP. If you did experience an invalid interrupt when you ran your program, this would cause it to behave incorrectly and would cause the GIE bit to be cleared while returning to the wrong place in the program.

Another option for debug purposes would be to change the vec_dummy branch instruction to B $. This would mean that if you ever get an invalid interrupt, it will get trapped in the dummy ISR and never return. From CCS you will then be able to Halt the processor and see that it is trapped there and can then try to figure out which interrupt occurred to cause this. An even better debug solution would be to use a VEC_DUMMY macro in place of the VEC_ENTRY macro such as the following:

VEC_DUMMY  .macro
    B  $
    NOP   
    NOP   
    NOP   
    NOP   
    NOP   
    NOP   
    NOP  
    .endm

For example,

_vector15:  VEC_DUMMY  

With this macro, an invalid interrupt would get trapped within the interrupt vector table and would allow you to figure out that it was interrupt 15, for example, that cause the invalid interrupt.

I am sorry that I cannot tell you more about your program by reading the code. It is not possible for me to read every constant to determine whether you have configured the peripherals correctly, but since you are able to communicate with the AIC23 using polling, the interrupt setup is most likely where the problem lies.

thank randy for his patience and advice.

the problem has been solved. i tried many methods and modified my program many times, and suddenly it started to work well. i guess the most effective one is i reset cpu and then things changed. what really made it happen i will check it  later. i have a few more questions and i will post it in the forum.