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DM3730

Other Parts Discussed in Thread: DM3730, SYSCONFIG

Hi, We are interacing an LCD on McSPI4 of DM3730. The slave (In our case LCD) needs contineous words on the MOSI line. we are able to send words one after other but there is a delay between two words and that is not acceptable by the slave. The delay is because, after transmission of one word the CS goes up and clock stops and it again start for the next word. Have tested with modified configuration (Forced bit, single mode ) as well. Kindly help on this.

 

  • For continuous data transfer I would be inclined to use McBSP over SPI.  The nature of SPI is to start and stop transfers while the McBSP is meant to run continuously (e.g. to send data to audio codecs, etc.).

    A couple thoughts:

    • Are you using DMA to send the data?  The CPU will stall while it waits for the write to complete assuming you have set up the register space as non-cacheable, non-bufferable.  Therefore you want to use DMA to send the data or else you may end up with gaps in the transfer.
    • Be careful with power optimizations.  In particular take a close look at the MCSPI_SYSCONFIG register.  It has various settings related to clock gating, etc.  I have seen cases with other peripherals where there is a small latency involved due to the clock turning off and then a small delay until it can turn back on due to further activity.
  • When you used the SINGLE/FORCE setup did you still see CS toggle? CS with this ocnfiguration is under s/w control and therefore should not toggle automatically. In addition, you should be able to achieve a continous transfer but there will be a single clock cycle delay between words while the shift register is reloaded but this is unlikely to cause an issue.

      Paul