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AM5718: Failed mentest

Cherry Zhou
Mastermind 22235 points
Part Number: AM5718


Hi team,

Here's an issue from the customer may need your help:

Project: AM5718 Core Board Algorithm Upgrade

Status: DDR3 1GB (256M*16bit*2pcs) and ECC DDR3 512MB (256M*16bit*1pcs) are currently configured.

Requirement: Core board requires DDR3 support for 2GB (512M*16bit*2pcs) without ECC DDR3.

SDK: ti-processor-sdk-linux 04.03.00.05

Issue: The test showed it cannot run 2GB, and can only run within 1GB, and it will get an error running 2GB. Modified dmm_lisa_map_regs and EMIF_regs in board.c using EMIF Tools and do startup test, both uboot and file system show 2GB DRAM, but fail the mentest. It can only call up to 128 MB at run time, and the system was not able to work if calling more than 128 MB(please see details here: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1163494/am5718-ddr3-2gb-memtest-kernel-crash?tisearch=e2e-sitesearch)

The customer also did the following tests:

  • Reduce the DDR frequency to 532MHz but the system still cannot work.
  • When replacing with 2GB DDR, configure with 1GB DDR, memtest can call more memory and the system is working properly.

Could you help check this case? Thanks.

Best Regards,

Cherry

  • 0
    TI__Mastermind 40140 points

    Hi,

    Cherry Zhou said:
    When replacing with 2GB DDR, configure with 1GB DDR, memtest can call more memory and the system is working properly.

    Can you further explain what is meant by the above statement. Does this imply that while using the 2GB memory, it works properly if configured as if the memory is a 1GB memory?

    Regards,

    Kevin

  • 0 in reply to Kevin S
    Prodigy 20 points

    Hi,

    Yes, memtest with memory configured as 1GB DDR will work when the actual memory is 2GB DDR, and running the mentest test with 2GB DDR memory configuration will Failed.

    diff --git a/arch/arm/mach-omap2/hwinit-common.c b/arch/arm/mach-omap2/hwinit-common.c
index f701239..83ff09e 100644
--- a/arch/arm/mach-omap2/hwinit-common.c
+++ b/arch/arm/mach-omap2/hwinit-common.c
@@ -299,7 +299,7 @@ u32 omap_sdram_size(void)
 int dram_init(void)
 {
        sdram_init();
-       gd->ram_size = omap_sdram_size();
+       gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_MAX_RAM_BANK_SIZE);
        return 0;
 }
 
diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h
index 429f7ca..d03f83f 100644
--- a/include/configs/am57xx_evm.h
+++ b/include/configs/am57xx_evm.h
@@ -22,6 +22,7 @@
 #define CONFIG_BOARD_EARLY_INIT_F
 
 #define CONFIG_NR_DRAM_BANKS           2
+#define CONFIG_MAX_RAM_BANK_SIZE       (2048 << 20)    /* 2048MB */
 
 /* MMC ENV related defines */
 #define CONFIG_ENV_IS_IN_MMC

    I also tried to add DDR capacity detection to U-Boot, run with a 2GB DDR configuration, and the DRAM only displayed as 1GB size. Does this indicate that I can only read half of SDRAM Address Mapping, What could be the reason? 

    Best Regards,

    terry

  • 0
    TI__Intellectual 1400 points

    Hello,

    Is this thread still open ?

    Best Regards,

    Kelvin