DM648 , ESS_Lock

Amna Rasul said:

1. Why do we need to set PLLCTL.PLLEN =0 ? and where should we add this line in code.

Where do you see this?

Amna Rasul said:

2. What value should ESS_Lock should be assigned . to lock and unlock the ethernet subsystem submodule.

Where do you see this?

Amna Rasul said:

3. I am receiving data from port0 and can see it in memory , but no data is being received from port2 , how can i resolve this issue?

Ports 0 and 1 are the Ethernet ports.  Port 2 is the Host port.  Can you clarify your issue?

Here's some info I received in the past from the DM648 apps team while helping other customers get Ethernet working:

DM648 Apps Team said:

 

It is not that whatever is transmitted through TX1 will come into RX1 and so on. Depending on the Priority settings (/re-mappings) and the type of Ethernet packet received the receiving channel no. might vary.

In the case of DM648, the GMAC0 and GMAC1 are Ethernet ports and Port 2 is Host Port (has the DMA interface). Let us say that a priority tagged Ethernet Packet arrives at GMAC Port x with priority information (0-7). The received packet priority is the port priority for untagged packets (as specified in the Px_Port_VLAN register), and the actual packet priority for priority tagged and VLAN tagged packets

Then the GMAC’s associated GMACx_RX_PRI_MAP (can be used to remap the priorities) is used to remap the priority at the GMAC Port x. if it arrives at host port Port 2 then the P2_TX_PRI_MAP(Header priority to Switch Priority mapping register) will remap it to the different Switch priorities(0-3). Then the CPDMA_RX_CH_MAP (maps the specified switch priority to different channels of CPDMA). The multiple channels will be more useful in the case of an application where a different priority of packets are handled and is a feature to handle them very easily.

I hope that is useful in getting things working!

Hello

Amna Rasul:

1. Why do we need to set PLLCTL.PLLEN =0 ? and where should we add this line in code.

Where do you see this?

I was reading the earlier post , and that is where I saw this. So  I inquired

 Amna Rasul:

2. What value should ESS_Lock should be assigned . to lock and unlock the ethernet subsystem submodule.

Where do you see this?

I was reading the earlier post , and that is where I saw this. So  I inquired… But I have found the solution in the latest revision of the document SPRS372D–MAY 2007–REVISED APRIL 2009 , the codes are specific 32-bit lock code (0x4C6F436B) and a 32-bit unlock code (0x6F50654E) written to ESS_LOCK register will activate or clear this option,respectively 

 Amna Rasul:

3. I am receiving data from port0 and can see it in memory , but no data is being received from port2 , how can i resolve this issue?

Ports 0 and 1 are the Ethernet ports.  Port 2 is the Host port.  Can you clarify your issue?

Okay the problem I am facing is this :

I am working on TMX320DM648 , I have configured the Ethernet module in ALE bypass mode as I want to change certain bits of Ethernet packet and change the packet length.

 I have the following topology currently set:

Port 0 is connected to Computer A via Rj45 connecter

Port 1 is connected to Computer B via Rj45 connecter

What I hoped to achieve is that packet flow from Computer A to Computer B via the board vice versa.

Now when I launch packets by the help of packet builder on Computer A , the packets enter board via the Port 0 and arrive to Port2 . Where I do alternation to received packet. Once I call the send api , the packet goes to both port 0 and port 1 and can be seen by help of Wireshark on the Computer A & B.  I just want the packet to go to Port 1 … how can I resolve this issue.

And the second problem is this that , the board does not detect any packets coming on port 1 , how can I resolve this issue . I want Port 1 to work same as Port 0. What configuration do I have to …

Here's some info I received in the past from the DM648 apps team while helping other customers get Ethernet working:

 DM648 Apps Team:

It is not that whatever is transmitted through TX1 will come into RX1 and so on.

 Depending on the Priority settings (/re-mappings) and the type of Ethernet packet received the receiving channel no. might vary.

In the case of DM648, the GMAC0 and GMAC1 are Ethernet ports and Port 2 is Host Port (has the DMA interface).

 Let us say that a priority tagged Ethernet Packet arrives at GMAC Port x with priority information (0-7).

 The received packet priority is the port priority for untagged packets (as specified in the Px_Port_VLAN register), and the actual packet priority for priority tagged and VLAN tagged packets

Then the GMAC’s associated GMACx_RX_PRI_MAP (can be used to remap the priorities) is used to remap the priority at the GMAC Port x. if it arrives at host port Port 2 then the P2_TX_PRI_MAP(Header priority to Switch Priority mapping register) will remap it to the different Switch priorities(0-3). Then the CPDMA_RX_CH_MAP (maps the specified switch priority to different channels of CPDMA). The multiple channels will be more useful in the case of an application where a different priority of packets are handled and is a feature to handle them very easily.

I hope that is useful in getting things working!

Thank you for sharing the above information.

Kindly provide me more guidance on the problems I have mentioned above.

Thank u

Waiting for a reply

Amna Rasul said:

Hello

Amna Rasul:

1. Why do we need to set PLLCTL.PLLEN =0 ? and where should we add this line in code.

Where do you see this?

I was reading the earlier post , and that is where I saw this. So  I inquired

 

The earlier post asked which PLL multipliers were supported on the device because at that time the datasheet only mentioned some specific multipliers.  I was giving a complete list of supported multipliers, one of which was 0 (bypass).  You don't NEED to set it in bypass and in fact I recommend you do not!

Thanks for sharing the answer.

Amna Rasul said:

 Amna Rasul:

3. I am receiving data from port0 and can see it in memory , but no data is being received from port2 , how can i resolve this issue?

Ports 0 and 1 are the Ethernet ports.  Port 2 is the Host port.  Can you clarify your issue?

Okay the problem I am facing is this :

I am working on TMX320DM648 , I have configured the Ethernet module in ALE bypass mode as I want to change certain bits of Ethernet packet and change the packet length.

 I have the following topology currently set:

Port 0 is connected to Computer A via Rj45 connecter

Port 1 is connected to Computer B via Rj45 connecter

What I hoped to achieve is that packet flow from Computer A to Computer B via the board vice versa.

Now when I launch packets by the help of packet builder on Computer A , the packets enter board via the Port 0 and arrive to Port2 . Where I do alternation to received packet. Once I call the send api , the packet goes to both port 0 and port 1 and can be seen by help of Wireshark on the Computer A & B.  I just want the packet to go to Port 1 … how can I resolve this issue.

And the second problem is this that , the board does not detect any packets coming on port 1 , how can I resolve this issue . I want Port 1 to work same as Port 0. What configuration do I have to …

In the current case the ALE is configured in Bypass mode. The MAC Packet sent out is not priority tagged.  The arriving packets always have the same priority which is mapped to channel 0 and all the packets arrive in Channel 0 only.  That is why in this case all the packets are getting mapped to RX channel 0 only.

Here's a quote from the User Guide:

"The ALE may be configured to operate in bypass mode by setting the ALE_BYPASS bit in the
ALE_CONTROL register. When in bypass mode, all GMACn received packets are forwarded only to the
host port (port 2). Packets from GMAC0 (port 0) are forwarded with the supervisory bit cleared. Packets
from GMAC1 (port 1) are forwarded with the supervisory bit set. The supervisory bit allows packets from
the two ports to be on separate RX DMA channels by configuring the 3pGSw CPDMA RX (Port 2 TX)
switch priority to DMA channel mapping register (CPDMA_RX_CH_MAP). In bypass mode, the ALE
processes host port transmit packets the same as in normal mode."

It sounds like you have not configured CPDMA_RX_CH_MAP correctly.

Brad

Hello Brad

I read that passage as well , but still confused with which values should i configure the register you have mentioned. can you help me ? 

Kindly if you can help it would be just great

Regards

Amna

Hello

The passage you mentioned was very useful; I was able to configure the register CPDMA_RX_CH_MAP.

But now I am facing this problem :

Let’s say packet was received by Port 0 , it reaches Port2 where the packet is altered. Now when I call the API llpacketsend() , the packet is forwarded to both the Ethernet ports namely Port0 and Port1.

But I only want the packet to be forwarded to Port1, how can I ensure this?

  I want to establish the following topology:

Packet received at Port0 -> Forwarded to Port2 -> Send only to Port1      

Packet received at Port1 -> Forwarded to Port2 -> Send only to Port0

Kindly tell me how can I mange this , so far what I have been able to achieve is that the packet is being forwarded to port2 from both port0 and port1 , where I can see it in memory. But the port2 forwards it to both ports namely 0 and 1.

How can I configure it port2 such that it sends packet only to one of the two Ethernet physical ports?

Thank you for sharing the above information.

Kindly provide me more guidance on the problems I have mentioned above.

Thank u

Waiting for a reply

Here is some info that one of our ethernet gurus passed to me regarding your issue:

I do not know what is the implementation of llpacketsend() but let me answer the question with respect to hardware

The CPDMA TX buffer descriptors has a field called to port. When the TO_PORT_EN is set to 1 and the TO_PORT no is set to 0 or 1 it is forwarded to Port 0 or Port 1 accordingly. The address of this buffer descriptor is then written to the HDP register to start the transfer.(Details of Transmit operation can be found in sections 3.1 and 3.2 of the PRG SPRUF57).

Hello

The information was very helpful ,Thank you.

 I was able to send the packet to the desire ports , namely port0 or port1 from the port2 .

How can I be sure that the packet is forwarded to the right port after the packet has been altered at port2?

Is there a way of knowing at port2 , form which port (namely port0 or port1) has the received packet come from? So I can forward the packet to the right Ethernet physical port.

Which registers do I have to configure or what bits need to be checked?

Kindly provide me more guidance on the problems I have mentioned above.

Thank u

Waiting for a reply

Have you looked at the supervisory bit? 

Here's a quote from the User Guide:

"The ALE may be configured to operate in bypass mode by setting the ALE_BYPASS bit in the
ALE_CONTROL register. When in bypass mode, all GMACn received packets are forwarded only to the
host port (port 2). Packets from GMAC0 (port 0) are forwarded with the supervisory bit cleared. Packets
from GMAC1 (port 1) are forwarded with the supervisory bit set. The supervisory bit allows packets from
the two ports to be on separate RX DMA channels by configuring the 3pGSw CPDMA RX (Port 2 TX)
switch priority to DMA channel mapping register (CPDMA_RX_CH_MAP). In bypass mode, the ALE
processes host port transmit packets the same as in normal mode."

hello

Yes i have read this passage , but the supervisory bit has not been mention hardware or softtware .

So i dont know where to check it from , can kindly where to check this bit from?

Second when the coomunication is build up between to computers via the board , the first packet from coming from either computer is drop and can not received at the other end , after this all packet r transmitted and received sucessfully why is this happening?

And if i configured the board in ALE bypass mode , the board will not communicate in normal mode even if an error occurs?

Please guide me

Waiting for ur reply

Thank you

Regards

Amna 

hello

Kindly find a solution to the problems i brought forward , waiting for a reply.

Regards

Amna

I see some mentions of supervisory packets in Section 3.5 of spruf57a.  Is that not it?

Hello

Yes I have read the section 3.5 , but it is very confusing .

 Because to what I understand the MAC address have to be mentioned in the ALE table , packets which are to enter the DM648 via the Port – 1 their  Mac address is added in ALE table with the supervisory bit set.

Meaning the supervisory bit has to configured in advance with particular Mac address, whose packets may enter the Board via Port 1 .

So I cannot check origination of packet based on supervisory bit , is there any another method to know which physical port forwarded the packet to Port2?

I have added a few code lines to source code, which actually compress the packet being received from both physical ports before being retransmitted to one of two physical port to be routed to the desired destination.  But the behavior of source code is very different , sometime the variables I have declared get initialized other times they don’t , what could be wrong and how can I fix it….?

Any suggest why is that the first packets are dropped from both physical ports when communication is established for the first time?

Kindly guide me

Waiting for a reply

Regards

Amna

There is no direct register/memory to find out whether a packet from Port 0 or Port 1.

The following method will let the user find the Packet it came from. This could be used when the switch operates in non-VLAN mode.

1)       In the CPSW_CONTROL register enable RX_VLAN_ENCAP(by setting that bit 8 to 1)

2)       This adds a 32 bit word to the buffer being transferred to memory at the beginning of each packet received. Bits13,12 of that word will indicate the from_port the port from where the packet came from.

To answer the second question I am not sure on why the first packet is dropped. We need to look into the ALE configuration, use case further to figure that out.

Hello;

Thank you, your reply was most helpful but where did you get this information from – kindly do tell me the documents you have referred too.

Since in my implementation involves, compressing all the frames that are not broadcast causing additional processing by the DSP – this is causing some packets to be not received at, is there a way to resolve this issue?

Like for example, if I launch 10 packets from packet builder from station A, only about 8 are received at station B, under following topology:

Station A - > Port 0 --- (BOARD) --- Port 1 -> Station B

Secondly, is there a non-bios application or code available for configuring, transmitting and receiving frames via the Ethernet physical port?

In my current project I have an asm file added to source code, which compresses each incoming frame from both physical ports. The code runs perfectly fine for the first 1 min and then all communication is halted no packet are received or send from either port. If I write the compression scheme in C such an error doesn’t happen, why my assembly implementation of compression scheme is giving such an odd behavior?

I run the asm compression scheme separately and it works fine – I have tested it in simulator.

Are there any registers tht hve to save before jumping from C to assembly and vice vera. I hve already (saved )pushed the values A10 to A15 & B10 to B15 upon entering the asm file and popped them out upon leavening the asm file.

What else could be causing the error – kindly guide me?

Waiting for a reply

Regards

Amna