TDA4VM: Questions about TDA4 GPIO interrupts

Hi,

Is this the main domain GPIO? Then this requires to first configure 2 or 3 intermediate interrupt router in the application. This is not taken care in the driver, so requires to be done in the application.

Regards,

Brijesh

Hi,

We use the main domain GPIO.

The interrupt route we configured is as follows:

Is there any problem with this configuration?

/* GPIO interrupts go to Interrupt router. The outputs of Interrupt router
* goes to A72 or to another router to go to R5 cores
* We use SciClient to program the routers.
* SciClient only supports GPIO bank interrupts at the moment so we use
* GPIO bank interrupt instead. Each bank has 16 pins
*/
int32_t GPIO_configIntRouter(uint32_t portNum, uint32_t pinNum, uint32_t gpioIntRtrOutIntNum, GPIO_v0_HwAttrs *cfg, uint32_t setIntrPath)
{
GPIO_IntCfg *intCfg;
uint32_t bankNum;
int32_t retVal = CSL_PASS;

struct tisci_msg_rm_irq_set_req rmIrqReq;
struct tisci_msg_rm_irq_set_resp rmIrqResp;
struct tisci_msg_rm_irq_release_req rmIrqRelease;
int32_t src_id,src_index,dst_id,dst_host_irq;

#if defined(BUILD_MCU1_0) || defined(BUILD_MCU1_1)
CSL_ArmR5CPUInfo r5CpuInfo;
#endif

intCfg = cfg->intCfg;

/* remove the default interrupt path configuration */
cfg->socConfigIntrPath = 0;

bankNum = pinNum / 16;

/* GPIO1_2 is used for USB type C cable orientation detection */
cfg->baseAddr = CSL_GPIO1_BASE;

/* WKUP GPIO int router input interrupt is the GPIO bank interrupt */
#if (BUILD_MPU)
intCfg[pinNum].intNum = CSLR_COMPUTE_CLUSTER0_GIC500SS_SPI_GPIOMUX_INTRTR0_OUTP_8 + bankNum;
#else
intCfg[pinNum].intNum = CSLR_MCU_R5FSS0_CORE0_INTR_WKUP_GPIOMUX_INTRTR0_OUTP_0 + bankNum;
#endif
intCfg[pinNum].eventId = 0;
intCfg[pinNum].intcMuxNum = INVALID_INTC_MUX_NUM;
intCfg[pinNum].intcMuxInEvent = 0;
intCfg[pinNum].intcMuxOutEvent = 0;

#if defined(BUILD_MCU1_0) || defined(BUILD_MCU1_1)
CSL_armR5GetCpuID(&r5CpuInfo);
#endif

/* We route bank interrupts to the cpu interrupts */
src_id = TISCI_DEV_GPIO1;
src_index = bankNum; /* bank number */

/* GPIO uses bank interrupts. So choose the bank interrupts from bus_gpio_bank with valid values from
* the DMSC firmware user guide */
#if defined(BUILD_MCU1_0) || defined(BUILD_MCU1_1)
if(r5CpuInfo.cpuID == 0) {
dst_id = TISCI_DEV_MCU_R5FSS0_CORE0;
} else {
dst_id = TISCI_DEV_MCU_R5FSS0_CORE1;
}
#elif defined(BUILD_MPU1_0) || defined(BUILD_MPU1_1)
dst_id = TISCI_DEV_COMPUTE_CLUSTER0_GIC500SS;
#endif

dst_host_irq = intCfg[pinNum].intNum;

if(setIntrPath) {
memset (&rmIrqReq,0,sizeof(rmIrqReq));

rmIrqReq.secondary_host = TISCI_MSG_VALUE_RM_UNUSED_SECONDARY_HOST;
rmIrqReq.src_id = src_id;
rmIrqReq.src_index = src_index; /* This is the event coming out of
the peripheral */

/* Set the destination interrupt */
rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_ID_VALID;
rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID;

/* Set the destination based on the core */
rmIrqReq.dst_id = dst_id;
rmIrqReq.dst_host_irq = dst_host_irq;
} else {
memset (&rmIrqRelease,0,sizeof(rmIrqRelease));

rmIrqRelease.secondary_host = TISCI_MSG_VALUE_RM_UNUSED_SECONDARY_HOST;
rmIrqRelease.src_id = src_id;
rmIrqRelease.src_index = src_index; /* This is the event coming out of the peripheral */

/* Set the destination interrupt */
rmIrqRelease.valid_params |= TISCI_MSG_VALUE_RM_DST_ID_VALID;
rmIrqRelease.valid_params |= TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID;

/* Set the destination based on the core */
rmIrqRelease.dst_id = dst_id;
rmIrqRelease.dst_host_irq = dst_host_irq;
}

/* Config event */
if(setIntrPath) {
retVal = Sciclient_rmIrqSet(
(const struct tisci_msg_rm_irq_set_req *)&rmIrqReq,
&rmIrqResp,
SCICLIENT_SERVICE_WAIT_FOREVER);

} else {
retVal = Sciclient_rmIrqRelease(
(const struct tisci_msg_rm_irq_release_req *)&rmIrqRelease,
SCICLIENT_SERVICE_WAIT_FOREVER);

}

/* Setup interrupt router configuration for gpio port/pin */
// consolePrintf("\nIntConfig: portNum[%d],pinNum[%d], bankNum=%d, intNum[%d]",
// portNum, pinNum, bankNum, intCfg[pinNum].intNum);

return retVal;
}

Regards,

bingxian

Hi binxian,

Couple of questions on above code,

1,  Why interrupt number for GPIO driver is set for WKUP GPIO?

intCfg[pinNum].intNum = CSLR_MCU_R5FSS0_CORE0_INTR_WKUP_GPIOMUX_INTRTR0_OUTP_0 + bankNum;

2, Can you please check if Sciclient_rmIrqSet API is successful? 

3, what's value if dst_host_irq? 

Regards,

Brijesh

Hi ,Brijesh

1.intCfg[pinNum].intNum I tried several values, The previous value is the modified value.Now refer to usb_c_handler.c and change the value to CSLR_MCU_R5FSS0_CORE0_INTR_MAIN2MCU_LVL_INTRTR0_OUTL_0 + bankNum, but again no interrupt is generated, and dst_host_irq is 160.

2.The Sciclient_rmIrqSet function returns -1,as if the interrupt was not set successfully.

What should be the value of dst_host_irq?

Regards,

bingxian

Hi ,Brijesh

I found that the program returned CSL_EFAIL on Sciclient_rmIrqFindRoute, as shown in the following figure:

What is the reason for returning CSL_EFAIL?

Regards,

bingxian

Hi bingxian,

Can you please run a loop on IRQ number from 0 to 512 on R5F core and see if it succeeds for any irq number? 

If this also does not work, we may have configure individual interrupt router to route interrupt to R5F. 

Regards,

Brijesh

Hi ,Brijesh

Sciclient_rmIrqSet returns CSL_PASS when dts_host_irq is CSLR_MCU_R5FSS0_CORE0_INTR_MAIN2MCU_PLS_INTRTR0_OUTP_0(this value is 224). However, when the interrupt event is generated, the interrupt function still does not take effect

Regards,

bingxian

Hi ,Brijesh

Thank you for your patient reply, We solved the problem according to your suggestion.

Thanks again

Regards,

bingxian