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How to save power consumption with the external oscillator?

Part Number: TMS320C6748

Hi,

    According to the TMS320C6748 Fixed- and Floating-Point DSP Silicon Revisions 2.3, 2.1, 2.0, 1.1 and 1.0, external oscillator should be used for ESD consideration.

      But with the above suggested resistor, 3.3/265=12.5mA, concerning the 50% duty cycle, 6.25mA current is wasted on the resistor.

      6.25mA is too much, because when our product works on low power mode, the system is only 35mA@3.8V.

      Is there any better way considering the power consumption and the ESD?

      Thank you.

Frank

  • The TMS320C6748 OSCIN input is very susceptible to noise which can cause glitches on the internal reference clock. The circuit recommendation shown above has been validated as an acceptable solution by providing a low impedance clock source with fast non-monotonic edges that makes it difficult for noise to couple into the OSCIN input. Changing this clock source to reduce power consumption is likely to increase the source impedance and make it easier for noise to couple into the OSCIN input. You may be able to increase the voltage divider impedance, but you need to understand this may also increase exposure to noise coupling into the OSCIN input which can cause the processor to do unpredictable things when a glitch occurs on the internal reference clock.

    Regards,
    Paul

  • Hi Paul,

        Thank you for your reply.

        What is the input impedance value of the OSCIN pin?

    Frank

  • The low source impedance of the resistor divider is required to drive the input capacitance without causing a significant reduction in rise/fall time. Noise is more likely to couple into the reference clock as the rise/fall time increases.

    You may be able to eliminate the resistor divider if you could find a LVCMOS clock source that operates at the same voltage as CVDD. This would allow you to connect the LVCMOS clock source output directly to the OSCIN pin.

    Regards,
    Paul