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In video_vga example only some VPFE registers are initialized, then the program can complete the image data collection. I want to know how to transfer the image data to sdram in dm6437. how should i know a frame image has been obtained? interruption or other method?
kexin
are you referring to some application?
no, the video_vga example is a simple program in the SEED-DEC6437 development kit .
In the code the tvp5150, vpfe and vpbe are initialized respectively, and then the program can complete the image input and output. But i am not familiar with the dm6437. I want to know what is the interior mechanism because i need insert the process algorithm in my program. For example, as we know the dm642 control image data acquisition by the interruption and transfer the image data by DMA.
The codes are listed as follows:
#include "stdio.h"
#include "evmdm6437.h"
extern Int16 video_vga_test();
/* ------------------------------------------------------------------------ *
* *
* main( ) *
* *
* ------------------------------------------------------------------------ */
#define reset_5150 *( volatile Uint8* )0x44000000
void main( void )
{
/* Initialize BSL */
EVMDM6437_init( );
reset_5150=2;//not reset 5150
video_vga_test();
for(;;);
}
#include "stdio.h"
#include "evmdm6437.h"
#define tvp5150_I2C_ADDR 0x5c
Uint16 temp;
Uint32 temp1,temp2[5];
/* ------------------------------------------------------------------------ *
* *
* tvp5150_rset *
* *
* Set codec register regnum to value regval *
* *
* ------------------------------------------------------------------------ */
void tvp5150_rset( Uint8 regnum, Uint8 regval )
{
Uint8 cmd[2];
cmd[0] = regnum; // 8-bit Register Address
cmd[1] = regval; // 8-bit Register Data
temp=EVMDM6437_I2C_write( tvp5150_I2C_ADDR, cmd, 2);
}
/* ------------------------------------------------------------------------ *
* *
* tvp5150_rget *
* *
* Return value of codec register regnum *
* *
* ------------------------------------------------------------------------ */
Uint8 tvp5150_rget( Uint8 regnum )
{
Uint8 cmd[2];
cmd[0] = regnum; // 8-bit Register Address
cmd[1] = 0; // 8-bit Register Data
EVMDM6437_I2C_write ( tvp5150_I2C_ADDR, cmd, 1 );
EVMDM6437_I2C_read ( tvp5150_I2C_ADDR, cmd, 1 );
return cmd[0];
}
/* ------------------------------------------------------------------------ *
* *
* tvp5150_init( ) *
* *
* Initialize the TVP5146 *
* *
* ------------------------------------------------------------------------ */
void tvp5150_init( )
{
_waitusec( 1000 );
//选择输入源
tvp5150_rset( 0x00, 0x00 ); // Input Video: CVBS : VI_2_B
// tvp5150_rset( 0x01, 0x15 );
//tvp5150_rset( 0x02, 0x00 );
//GPCL激活状态，输出为1
//YOUT[7:0] active;HSYNC, VSYNC/PALI, AVID, and FID/GLCO are active.
//Vertical blanking (VBLK) off;CLK output is enabled
tvp5150_rset( 0x03, 0x6d);
//tvp5150_rset( 0x03, 0x6d ); // NTSC
//tvp5150_rset( 0x04, 0x00);
//tvp5150_rset( 0x05, 0x00 ); //配置CLK edge and SCLK are configured through register 05h.
//tvp5150_rset( 0x06, 0x10 );
//tvp5150_rset( 0x07, 0x20 );
//tvp5150_rset( 0x08, 0x00 );
//亮度控制寄存器Y
tvp5150_rset( 0x09, 0x8B);
//颜色饱和度控制Cb
tvp5150_rset( 0x0a, 0x80 );
//色调控制Cr
tvp5150_rset( 0x0b, 0x00 );
//对比度控制
//tvp5150_rset( 0x0c, 0x80 );
//输出范围、编码格式，数据通道，输出格式
tvp5150_rset( 0x0D, 0x07 ); // Enabling clock & Y/CB/CR input format
//tvp5150_rset( 0x0e, 0x00 );
//配置共享管脚
tvp5150_rset( 0x0F, 0x02 );
//tvp5150_rset( 0x11, 0x00 );
//tvp5150_rset( 0x12, 0x00 );
//tvp5150_rset( 0x13, 0x00 );
//tvp5150_rset( 0x14, 0x00 );
//dto控制
tvp5150_rset( 0x15, 0x05 );
//tvp5150_rset( 0x16, 0x80 );
//tvp5150_rset( 0x18, 0x00 );
//tvp5150_rset( 0x19, 0x01 );
//tvp5150_rset( 0x1a, 0x0c );
//色度控制2
tvp5150_rset( 0x1B, 0x14 );
//tvp5150_rset( 0x1c, 0x00 );
//tvp5150_rset( 0x1d, 0x00 );
// tvp5150_rset( 0x1e, 0x00 );
// tvp5150_rset( 0x28, 0x00 );
_waitusec( 1000 ); // wait 1 msec
}
//#define NTSC 1
///#if NTSC
// #define BASEP_X 0x7A // 122
// #define BASEP_Y 0x12 // 18
#define BASEP_X 0x78 // 132
#define BASEP_Y 0x26 // 22
//#elif PAL
// #define BASEP_X 0x84 // 132
// #define BASEP_Y 0x16 // 22
//#endif
/* ------------------------------------------------------------------------ *
* *
* vpfe_init( ) *
* *
* NTSC: *
* Width: 720 *
* Height: 480 *
* *
* *
* ------------------------------------------------------------------------ */
void vpfe_init( Uint32 buffer, Uint32 width, Uint32 height)
{
VPFE_CCDC_SYN_MODE = 0x00032F87; // interlaced, with VD pority as negative
// VPFE_CCDC_SYN_MODE = 0x00031084; //linger interlaced, with VD pority as negative
VPFE_CCDC_HD_VD_WID = 0;
// VPFE_CCDC_PIX_LINES = 0x02CF0271;
VPFE_CCDC_PIX_LINES = 0; //linger 720x624
//VPFE_CCDC_PIX_LINES=0x020d0271;;
/*
* sph = 1, nph = 1440, according to page 32-33 of the CCDC spec
* for BT.656 mode, this setting captures only the 720x480 of the
* active NTSV video window
*/
VPFE_CCDC_HORZ_INFO = width << 1; // Horizontal lines
VPFE_CCDC_HSIZE_OFF = width << 1; // Horizontal line offset
// VPFE_CCDC_HORZ_INFO = width<< 1; // Horizontal lines
// VPFE_CCDC_HSIZE_OFF = 0; // Horizontal line offset
VPFE_CCDC_VERT_START = 0; // Vertical start line
VPFE_CCDC_VERT_LINES = height >> 1; // Vertical lines
VPFE_CCDC_CULLING = 0xFFFF00FF; // Disable cullng
/*
* Interleave the two fields
*/
VPFE_CCDC_SDOFST = 0x00000249;
VPFE_CCDC_SDR_ADDR = buffer;
VPFE_CCDC_CLAMP = 0;
VPFE_CCDC_DCSUB = 0;
VPFE_CCDC_COLPTN = 0xEE44EE44;
VPFE_CCDC_BLKCMP = 0;
VPFE_CCDC_FPC_ADDR = 0x86800000;
VPFE_CCDC_FPC = 0;
VPFE_CCDC_VDINT = 0;
VPFE_CCDC_ALAW = 0;
VPFE_CCDC_REC656IF = 0x00000003;
// VPFE_CCDC_REC656IF = 0x00000002; //linger
/*
* Input format is Cb:Y:Cr:Y, w/ Y in odd-pixel position
*/
// VPFE_CCDC_CCDCFG = 0x00000800;
VPFE_CCDC_CCDCFG = 0x00008800;
// VPFE_CCDC_FMTCFG = 0;
VPFE_CCDC_FMTCFG = 0x00008000; //linger
VPFE_CCDC_FMT_HORZ = 0x000002D0;
VPFE_CCDC_FMT_VERT = 0x00000240;//0x00000272;
VPFE_CCDC_FMT_ADDR0 = 0;
VPFE_CCDC_FMT_ADDR1 = 0;
VPFE_CCDC_FMT_ADDR2 = 0;
VPFE_CCDC_FMT_ADDR3 = 0;
VPFE_CCDC_FMT_ADDR4 = 0;
VPFE_CCDC_FMT_ADDR5 = 0;
VPFE_CCDC_FMT_ADDR6 = 0;
VPFE_CCDC_FMT_ADDR7 = 0;
VPFE_CCDC_PRGEVEN_0 = 0;
VPFE_CCDC_PRGEVEN_1 = 0;
VPFE_CCDC_PRGODD_0 = 0;
VPFE_CCDC_PRGODD_1 = 0;
VPFE_CCDC_VP_OUT = 0x04E22D00;
VPFE_CCDC_PCR = 0x00000001; // Enable CCDC
}
/* ------------------------------------------------------------------------ *
* *
* vpbe_init( ) *
* *
* NTSC: *
* Width: 720 *
* Height: 480 *
* *
* *
* ------------------------------------------------------------------------ */
void vpbe_init( Uint32 buffer, Uint32 width, Uint32 height, Uint32 cb_enable )
{
VPSS_CLK_CTRL = 0x00000018; // Enable DAC and VENC clock, both at 27 MHz
VPBE_PCR = 0; // No clock div, clock enable
/*
* Setup OSD
*/
VPBE_OSD_MODE = 0x0000007f; // Blackground color blue using clut in ROM0
// VPBE_OSD_MODE = 0x00006C00; //linger
VPBE_OSD_OSDWIN0MD = 0; // Disable both osd windows and cursor window
VPBE_OSD_OSDWIN1MD = 0;
VPBE_OSD_RECTCUR = 0;
VPBE_OSD_VIDWIN0OFST = width >> 4;
VPBE_OSD_VIDWIN0ADR = buffer;
VPBE_OSD_BASEPX = BASEP_X;
VPBE_OSD_BASEPY = BASEP_Y;
VPBE_OSD_VIDWIN0XP = 0;
VPBE_OSD_VIDWIN0YP = 0;
VPBE_OSD_VIDWIN0XL = width;
// VPBE_OSD_VIDWIN0YL = height >> 1;
VPBE_OSD_VIDWIN0YL = height; //linger:full height
VPBE_OSD_MISCCTL = 0;
VPBE_OSD_VIDWINMD = 0x00000007; // linger width X2
// Frame mode with no up-scaling
/*
* Setup VENC
*/
// VPBE_VENC_VMOD = 0x00002043; // 50HZ 854X625
VPBE_VENC_VMOD = 0x00002103; //linger 60HZ 854x525
VPBE_VENC_VIOCTL = 0x00002000;
VPBE_VENC_VDPRO = 0x00000870|(cb_enable << 8);
VPBE_VENC_DACTST = 0x00000000;
VPBE_VENC_CMPNT = 0x00008000;
VPBE_VENC_DACSEL = 0x00000435;
//linger
VPBE_VENC_SYNCCTL = 0x00000003;
/*********************************/
// VPBE_VENC_HINT = 0x;
VPBE_VENC_HSTART = 0x0;
VPBE_VENC_HVALID = 0x0;
// VPBE_VENC_VINT = 0x;
VPBE_VENC_VSTART = 0x0;
VPBE_VENC_VVALID = 0x0;
VPBE_VENC_OSDCLK0 = 0x0;
VPBE_VENC_OSDCLK1 = 0x1;
VPBE_VENC_ARGBX0 = 1024;
VPBE_VENC_ARGBX1 = 1404;
VPBE_VENC_ARGBX2 = 345;
VPBE_VENC_ARGBX3 = 715;
VPBE_VENC_ARGBX4 = 1774;
VPBE_VENC_RGBCTL = 0x00000000;
}
/* ------------------------------------------------------------------------ *
* *
* video_loopback_test( ) *
* *
* *
* *
* ------------------------------------------------------------------------ */
Int16 video_vga_test( )
{
tvp5150_init();
vpfe_init( 0x81000000, 720, 480); // Setup Front-End
vpbe_init( 0x81000000, 720, 480, 0); // Setup Back-End
return 0;
}
/********************/
Hi Kexin,
Not sure if I am answering the right question...
VPBE and VPFE have internal DMA to read & write respectively to memory, and will automatically transfer data after the peripherals are enabled. See the following two lines, and refer to the user guides.
VPFE_CCDC_SDR_ADDR = buffer;
VPBE_OSD_VIDWIN0ADR = buffer;
If you plan to use multi buffering, you will need to use interrupt. If you have any algorithm, you will need multi buffering; so you will need interrupt, mainly to update the above two registers.
regards,
Paul
I don't have any existing code handy at the moment. I know the SW package in DVDP http://focus.ti.com/docs/toolsw/folders/print/tmdsvdp6437.html has several capture/display demos and docs you can study. SEED might offer similar package.
You can also try our processor wiki, or google, for additional examples.
