Clock Manager

Hi Burli,

The clock rate for the timer is a division of the DSP clock speed. So if you go to you .tcf file, System, right click on Global Settings and select Properties - you can see the DSP Speed in MHz(CLKOUT) field. That frequency has to match your DSP frequency. So if you are using C6455 1GHz, that value should be 1000.

If you look at the C6455 datasheet page 134, you can see that SYSCLK3 is the CPU clock/6. And at the bottom of the same page you can see that this is the input clock for the timers.

That configurable field in the tcf file probably applies to other DSPs that you can configure the divider, but not for C6455.

As Mariana mentions the typical use case is that the timer clock is derived from the CPU clock and it runs at CPU/6.  Alternatively you can supply your own time base through the TINPL pins to drive the clock.  In that scenario you need to specify what speed you are clocking the timer through that option.

SYSCLK3 (CPU/6 = 166.666MHz = 6ns) clocks the PCI, HPI, UTOPIA, McBSP, GPIO, TIMER, and I2C peripherals, as well as the configuration bus of the PLL2 Controller. 

This means that the fastest periodic function that i can get runs every 6 ns and the other functions that i can get are multiples of 6? If I read the McBSP in that function, the data will be reliable (i have a signal at 50MHz so the sampling should be <100 MHz)  if i cannot get a function at 10 ns is it possible to read it every 6ns? 

Burli said:

This means that the fastest periodic function that i can get runs every 6 ns and the other functions that i can get are multiples of 6?

This means that the timer clock ticks will have a granularity of 6ns.  There's no way you could run periodic functions at a rate of 6ns.  That would correspond to a new function running every 6 cycles on a 1 GHz device.  It would take many more cycles than that to do the context save/restore plus the corresponding branches to/from the interrupt.

Burli said:

If I read the McBSP in that function, the data will be reliable (i have a signal at 50MHz so the sampling should be <100 MHz)  if i cannot get a function at 10 ns is it possible to read it every 6ns? 

You should not read the McBSP from a periodic function.  At a minimum you should use the RRDY interrupt from the McBSP.  Better yet, you should use the RRDY EDMA event to buffer multiple data elements.

PS.  The amount of time you set up for the "tick" in the clock manager will correspond to the frequency at which the BIOS scheduler is invoked.  Generally this should be 1ms.  If you make it faster than 1ms then you start to spend significant time doing context switches.  If you make it a lot slower than 1ms you don't have very good granularity for APIs like TSK_sleep.

Brad

Brad is right, to read a high frequency serial signal from a McBSP you really need to configure a EDMA channel to service it and fill up a buffer for processing, using a PRD is virtually impossible with the context changing overhead, and having a CPU polling loop is innefficient and typically impractical. Have you looked into using the EDMA to service your McBSP?